Simulation Results: flash_ctrl

 
03/08/2026 15:30:55 DVSim: v1.50.0 sha: 2719cd7 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.41 %
  • code
  • 93.65 %
  • assert
  • 97.02 %
  • func
  • 95.57 %
  • line
  • 95.93 %
  • branch
  • 97.10 %
  • cond
  • 93.54 %
  • toggle
  • 95.97 %
  • FSM
  • 85.71 %
Validation stages
V1
100.00%
V2
96.55%
V2S
95.83%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
flash_ctrl_smoke 45.570s 83.739us 1 1 100.00
smoke_hw 1 1 100.00
flash_ctrl_smoke_hw 13.700s 33.238us 1 1 100.00
csr_hw_reset 1 1 100.00
flash_ctrl_csr_hw_reset 22.530s 195.372us 1 1 100.00
csr_rw 1 1 100.00
flash_ctrl_csr_rw 9.730s 20.151us 1 1 100.00
csr_bit_bash 1 1 100.00
flash_ctrl_csr_bit_bash 28.660s 1852.115us 1 1 100.00
csr_aliasing 1 1 100.00
flash_ctrl_csr_aliasing 15.040s 216.741us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
flash_ctrl_csr_mem_rw_with_rand_reset 12.310s 224.011us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
flash_ctrl_csr_rw 9.730s 20.151us 1 1 100.00
flash_ctrl_csr_aliasing 15.040s 216.741us 1 1 100.00
mem_walk 1 1 100.00
flash_ctrl_mem_walk 8.800s 30.505us 1 1 100.00
mem_partial_access 1 1 100.00
flash_ctrl_mem_partial_access 8.290s 38.432us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sw_op 1 1 100.00
flash_ctrl_sw_op 12.230s 77.723us 1 1 100.00
host_read_direct 1 1 100.00
flash_ctrl_host_dir_rd 52.940s 147.258us 1 1 100.00
rma_hw_if 3 3 100.00
flash_ctrl_hw_rma 1143.180s 342491.249us 1 1 100.00
flash_ctrl_hw_rma_reset 474.410s 40124.039us 1 1 100.00
flash_ctrl_lcmgr_intg 6.340s 58.306us 1 1 100.00
host_controller_arb 1 1 100.00
flash_ctrl_host_ctrl_arb 1576.370s 273625.792us 1 1 100.00
erase_suspend 1 1 100.00
flash_ctrl_erase_suspend 221.640s 2766.797us 1 1 100.00
program_reset 1 1 100.00
flash_ctrl_prog_reset 7.450s 315.061us 1 1 100.00
full_memory_access 1 1 100.00
flash_ctrl_full_mem_access 1881.620s 359273.632us 1 1 100.00
rd_buff_eviction 1 1 100.00
flash_ctrl_rd_buff_evict 41.430s 95.341us 1 1 100.00
rd_buff_eviction_w_ecc 3 3 100.00
flash_ctrl_rw_evict 16.520s 49.475us 1 1 100.00
flash_ctrl_rw_evict_all_en 15.590s 111.204us 1 1 100.00
flash_ctrl_re_evict 17.000s 60.761us 1 1 100.00
host_arb 1 1 100.00
flash_ctrl_phy_arb 145.990s 1376.243us 1 1 100.00
host_interleave 1 1 100.00
flash_ctrl_phy_arb 145.990s 1376.243us 1 1 100.00
memory_protection 1 1 100.00
flash_ctrl_mp_regions 81.370s 2566.532us 1 1 100.00
fetch_code 1 1 100.00
flash_ctrl_fetch_code 12.150s 1586.044us 1 1 100.00
all_partitions 1 1 100.00
flash_ctrl_rand_ops 397.330s 509.335us 1 1 100.00
error_mp 1 1 100.00
flash_ctrl_error_mp 343.380s 4222.746us 1 1 100.00
error_prog_win 1 1 100.00
flash_ctrl_error_prog_win 292.930s 5863.200us 1 1 100.00
error_prog_type 1 1 100.00
flash_ctrl_error_prog_type 1071.160s 2001.019us 1 1 100.00
error_read_seed 1 1 100.00
flash_ctrl_hw_read_seed_err 6.280s 71.643us 1 1 100.00
read_write_overflow 1 1 100.00
flash_ctrl_oversize_error 132.650s 3924.486us 1 1 100.00
flash_ctrl_disable 1 1 100.00
flash_ctrl_disable 10.820s 97.927us 1 1 100.00
flash_ctrl_connect 1 1 100.00
flash_ctrl_connect 7.770s 29.455us 1 1 100.00
stress_all 1 1 100.00
flash_ctrl_stress_all 27.060s 86.619us 1 1 100.00
secret_partition 2 2 100.00
flash_ctrl_hw_sec_otp 87.610s 17486.983us 1 1 100.00
flash_ctrl_otp_reset 45.500s 67.537us 1 1 100.00
isolation_partition 1 1 100.00
flash_ctrl_hw_rma 1143.180s 342491.249us 1 1 100.00
interrupts 3 4 75.00
flash_ctrl_intr_rd 135.430s 8799.296us 1 1 100.00
flash_ctrl_intr_wr 50.990s 2858.042us 1 1 100.00
flash_ctrl_intr_rd_slow_flash 81.630s 5978.337us 1 1 100.00
flash_ctrl_intr_wr_slow_flash 3604.013s 0.000us 0 1 0.00
invalid_op 1 1 100.00
flash_ctrl_invalid_op 39.550s 5073.065us 1 1 100.00
mid_op_rst 1 1 100.00
flash_ctrl_mid_op_rst 37.440s 680.940us 1 1 100.00
double_bit_err 4 5 80.00
flash_ctrl_read_word_sweep_derr 11.090s 30.008us 1 1 100.00
flash_ctrl_ro_derr 101.020s 2114.909us 1 1 100.00
flash_ctrl_rw_derr 154.290s 9088.893us 1 1 100.00
flash_ctrl_derr_detect 99.620s 1018.843us 1 1 100.00
flash_ctrl_integrity 3237.240s 200000.000us 0 1 0.00
single_bit_err 3 3 100.00
flash_ctrl_read_word_sweep_serr 11.530s 108.964us 1 1 100.00
flash_ctrl_ro_serr 118.890s 1962.642us 1 1 100.00
flash_ctrl_rw_serr 100.600s 1678.392us 1 1 100.00
singlebit_err_counter 1 1 100.00
flash_ctrl_serr_counter 52.800s 6497.404us 1 1 100.00
singlebit_err_address 1 1 100.00
flash_ctrl_serr_address 36.120s 675.582us 1 1 100.00
scramble 5 5 100.00
flash_ctrl_wo 110.980s 4924.880us 1 1 100.00
flash_ctrl_write_word_sweep 7.350s 44.280us 1 1 100.00
flash_ctrl_read_word_sweep 6.940s 31.335us 1 1 100.00
flash_ctrl_ro 93.060s 780.070us 1 1 100.00
flash_ctrl_rw 394.540s 18819.809us 1 1 100.00
filesystem_support 1 1 100.00
flash_ctrl_fs_sup 20.820s 1288.729us 1 1 100.00
rma_write_process_error 2 2 100.00
flash_ctrl_rma_err 568.650s 41410.298us 1 1 100.00
flash_ctrl_hw_prog_rma_wipe_err 73.040s 10020.864us 1 1 100.00
alert_test 1 1 100.00
flash_ctrl_alert_test 6.040s 21.342us 1 1 100.00
intr_test 1 1 100.00
flash_ctrl_intr_test 5.780s 29.036us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
flash_ctrl_tl_errors 9.280s 159.326us 1 1 100.00
tl_d_illegal_access 1 1 100.00
flash_ctrl_tl_errors 9.280s 159.326us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
flash_ctrl_csr_hw_reset 22.530s 195.372us 1 1 100.00
flash_ctrl_csr_rw 9.730s 20.151us 1 1 100.00
flash_ctrl_csr_aliasing 15.040s 216.741us 1 1 100.00
flash_ctrl_same_csr_outstanding 10.380s 1395.319us 1 1 100.00
tl_d_partial_access 4 4 100.00
flash_ctrl_csr_hw_reset 22.530s 195.372us 1 1 100.00
flash_ctrl_csr_rw 9.730s 20.151us 1 1 100.00
flash_ctrl_csr_aliasing 15.040s 216.741us 1 1 100.00
flash_ctrl_same_csr_outstanding 10.380s 1395.319us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
flash_ctrl_shadow_reg_errors 34.540s 236.220us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
flash_ctrl_shadow_reg_errors 34.540s 236.220us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
flash_ctrl_shadow_reg_errors 34.540s 236.220us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
flash_ctrl_shadow_reg_errors 34.540s 236.220us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
flash_ctrl_shadow_reg_errors_with_csr_rw 24.180s 107.188us 1 1 100.00
tl_intg_err 2 2 100.00
flash_ctrl_sec_cm 1805.320s 1047.031us 1 1 100.00
flash_ctrl_tl_intg_err 406.370s 1370.682us 1 1 100.00
sec_cm_reg_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 406.370s 1370.682us 1 1 100.00
sec_cm_host_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 406.370s 1370.682us 1 1 100.00
sec_cm_mem_bus_integrity 2 2 100.00
flash_ctrl_rd_intg 16.800s 119.613us 1 1 100.00
flash_ctrl_wr_intg 7.510s 91.699us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
flash_ctrl_smoke 45.570s 83.739us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 4 4 100.00
flash_ctrl_otp_reset 45.500s 67.537us 1 1 100.00
flash_ctrl_disable 10.820s 97.927us 1 1 100.00
flash_ctrl_sec_info_access 46.340s 11975.874us 1 1 100.00
flash_ctrl_connect 7.770s 29.455us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
flash_ctrl_config_regwen 6.120s 22.690us 1 1 100.00
sec_cm_data_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 9.730s 20.151us 1 1 100.00
sec_cm_data_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 34.540s 236.220us 1 1 100.00
sec_cm_info_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 9.730s 20.151us 1 1 100.00
sec_cm_info_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 34.540s 236.220us 1 1 100.00
sec_cm_bank_config_regwen 1 1 100.00
flash_ctrl_csr_rw 9.730s 20.151us 1 1 100.00
sec_cm_bank_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 34.540s 236.220us 1 1 100.00
sec_cm_mem_ctrl_global_esc 1 1 100.00
flash_ctrl_disable 10.820s 97.927us 1 1 100.00
sec_cm_mem_ctrl_local_esc 2 2 100.00
flash_ctrl_rd_intg 16.800s 119.613us 1 1 100.00
flash_ctrl_access_after_disable 6.120s 57.180us 1 1 100.00
sec_cm_mem_addr_infection 1 1 100.00
flash_ctrl_host_addr_infection 15.020s 70.465us 1 1 100.00
sec_cm_mem_disable_config_mubi 1 1 100.00
flash_ctrl_disable 10.820s 97.927us 1 1 100.00
sec_cm_exec_config_redun 1 1 100.00
flash_ctrl_fetch_code 12.150s 1586.044us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
flash_ctrl_rw 394.540s 18819.809us 1 1 100.00
sec_cm_mem_integrity 2 3 66.67
flash_ctrl_rw_serr 100.600s 1678.392us 1 1 100.00
flash_ctrl_rw_derr 154.290s 9088.893us 1 1 100.00
flash_ctrl_integrity 3237.240s 200000.000us 0 1 0.00
sec_cm_rma_entry_mem_sec_wipe 1 1 100.00
flash_ctrl_hw_rma 1143.180s 342491.249us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1805.320s 1047.031us 1 1 100.00
sec_cm_phy_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1805.320s 1047.031us 1 1 100.00
sec_cm_phy_prog_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1805.320s 1047.031us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1805.320s 1047.031us 1 1 100.00
sec_cm_phy_arbiter_ctrl_redun 1 1 100.00
flash_ctrl_phy_arb_redun 10.830s 761.949us 1 1 100.00
sec_cm_phy_host_grant_ctrl_consistency 1 1 100.00
flash_ctrl_phy_host_grant_err 7.160s 108.041us 1 1 100.00
sec_cm_phy_ack_ctrl_consistency 1 1 100.00
flash_ctrl_phy_ack_consistency 11.080s 155.526us 1 1 100.00
sec_cm_fifo_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1805.320s 1047.031us 1 1 100.00
sec_cm_mem_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1805.320s 1047.031us 1 1 100.00
sec_cm_prog_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1805.320s 1047.031us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
asymmetric_read_path 1 1 100.00
flash_ctrl_rd_ooo 20.990s 242.430us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
flash_ctrl_basic_rw 157.470s 528.611us 1 1 100.00

Error Messages

   Test seed line log context
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ns hit, indicating a probable testbench issue 1 test run
flash_ctrl_integrity 17795104364503270446363323361706917328681900795637558417021993469301063174134 108
UVM_INFO @ 200000000.0 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 1 test run
flash_ctrl_intr_wr_slow_flash 81798499020614533304884240981901718057394309970378840129504000185234961435340 None