Simulation Results: kmac/masked

 
04/08/2026 15:30:33 DVSim: v1.50.0 sha: ff213b0 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 79.33 %
  • code
  • 65.54 %
  • assert
  • 94.23 %
  • func
  • 78.22 %
  • line
  • 96.90 %
  • branch
  • 89.24 %
  • cond
  • 83.69 %
  • toggle
  • 23.06 %
  • FSM
  • 34.81 %
Validation stages
V1
100.00%
V2
65.52%
V2S
62.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 36.160s 11708.937us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.920s 178.321us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.750s 42.453us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 10.310s 871.755us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 6.150s 999.864us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.180s 26.971us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.750s 42.453us 1 1 100.00
kmac_csr_aliasing 6.150s 999.864us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.670s 45.898us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 0.880s 18.265us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2196.080s 344655.273us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 965.180s 114325.788us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1695.980s 163850.116us 1 1 100.00
kmac_test_vectors_sha3_256 2254.320s 156394.407us 1 1 100.00
kmac_test_vectors_sha3_384 1466.090s 287958.025us 1 1 100.00
kmac_test_vectors_sha3_512 1080.290s 278558.843us 1 1 100.00
kmac_test_vectors_shake_128 126.800s 26936.727us 1 1 100.00
kmac_test_vectors_shake_256 105.960s 8360.372us 1 1 100.00
kmac_test_vectors_kmac 1.730s 83.199us 1 1 100.00
kmac_test_vectors_kmac_xof 2.000s 49.083us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 218.730s 19634.025us 1 1 100.00
app 0 1 0.00
kmac_app 6.090s 417.059us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 2.510s 652.162us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 2.480s 108.815us 0 1 0.00
error 0 1 0.00
kmac_error 65.950s 17199.660us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.710s 11.894us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.730s 7.324us 0 1 0.00
edn_timeout_error 0 1 0.00
kmac_edn_timeout_error 10.660s 524.040us 0 1 0.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.720s 18.911us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.680s 7.586us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 0.730s 16.131us 0 1 0.00
stress_all 0 1 0.00
kmac_stress_all 230.250s 9011.401us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.680s 16.351us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.690s 38.645us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.310s 137.482us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.310s 137.482us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.920s 178.321us 1 1 100.00
kmac_csr_rw 0.750s 42.453us 1 1 100.00
kmac_csr_aliasing 6.150s 999.864us 1 1 100.00
kmac_same_csr_outstanding 1.710s 94.264us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.920s 178.321us 1 1 100.00
kmac_csr_rw 0.750s 42.453us 1 1 100.00
kmac_csr_aliasing 6.150s 999.864us 1 1 100.00
kmac_same_csr_outstanding 1.710s 94.264us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.060s 139.551us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.060s 139.551us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.060s 139.551us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.060s 139.551us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 1.600s 63.011us 1 1 100.00
tl_intg_err 1 2 50.00
kmac_sec_cm 0.950s 118.640us 0 1 0.00
kmac_tl_intg_err 3.420s 1408.483us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.420s 1408.483us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 0.730s 16.131us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 36.160s 11708.937us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 218.730s 19634.025us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.060s 139.551us 1 1 100.00
sec_cm_fsm_sparse 0 1 0.00
kmac_sec_cm 0.950s 118.640us 0 1 0.00
sec_cm_ctr_redun 0 1 0.00
kmac_sec_cm 0.950s 118.640us 0 1 0.00
sec_cm_packer_ctr_redun 0 1 0.00
kmac_sec_cm 0.950s 118.640us 0 1 0.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 36.160s 11708.937us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 0.730s 16.131us 0 1 0.00
sec_cm_fsm_local_esc 0 1 0.00
kmac_sec_cm 0.950s 118.640us 0 1 0.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 10.280s 2729.529us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 36.160s 11708.937us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 26.510s 1768.558us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. 6 test runs
kmac_app 48834541784250831084988683029878463629711480651879688000404120690152136063026 85
UVM_INFO @ 417059292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 83419260649000452299680522909225171909866495868069319655119592267942809783261 83
UVM_INFO @ 652162481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 49500503324803117088169133990407562584754855063251604957033396664148700635201 83
UVM_INFO @ 108815265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 83902598800179537098103818472666368810291825704936668042253760906127519761970 82
UVM_INFO @ 11893610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 106846656341089471302655023495166294618942182869038530731509217591334813783210 82
UVM_INFO @ 7585750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_lc_escalation 53738476920137156457903710565548193780911337896126304537830121545461021834404 84
UVM_INFO @ 16130557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_sideload_invalid 107292663013543358133562967755886090015983206819216957454170316267928453123460 84
UVM_ERROR @ 7324222 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 7324222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_edn_timeout_error 43366716914370873939527089257236315703115182001808638395355628479597175402163 92
UVM_ERROR @ 524040134 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 524040134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:1673) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 2 test runs
kmac_error 95528838459658683660835113598432105874985844973525455421742530572312618304549 114
UVM_INFO @ 17199659946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 67300880270576247706929433358965173973157816868623079685969690156385587073272 129
UVM_INFO @ 9011400828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (kmac_scoreboard.sv:601) scoreboard [scoreboard] Unexpected m_error value in the app response (*) 1 test run
kmac_mubi 70140926181000528540932379420274465970782790746080654257728721385356870650290 89
UVM_INFO @ 2729529002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
kmac_stress_all_with_rand_reset 109497909386171910772799940245611470233953823096528528602920658850957337298139 129
UVM_INFO @ 1768557729 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). 1 test run
kmac_sec_cm 101550560398928171919679360515490068636050694707344278281851664129504845717690 84
UVM_INFO @ 118639542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---