Simulation Results: otp_ctrl

 
04/08/2026 15:30:33 DVSim: v1.50.0 sha: ff213b0 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 83.16 %
  • code
  • 78.24 %
  • assert
  • 94.70 %
  • func
  • 76.54 %
  • line
  • 88.60 %
  • branch
  • 83.55 %
  • cond
  • 90.27 %
  • toggle
  • 83.13 %
  • FSM
  • 45.66 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 1.540s 188.174us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 4.250s 2502.195us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 1.370s 67.819us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 1.250s 78.955us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 4.850s 4968.510us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 4.170s 179.208us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otp_ctrl_csr_mem_rw_with_rand_reset 1.690s 280.129us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 1.250s 78.955us 1 1 100.00
otp_ctrl_csr_aliasing 4.170s 179.208us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.700s 540.088us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 1.160s 82.600us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 1 1 100.00
otp_ctrl_partition_walk 13.430s 1317.378us 1 1 100.00
init_fail 1 1 100.00
otp_ctrl_init_fail 3.530s 198.526us 1 1 100.00
partition_check 2 2 100.00
otp_ctrl_background_chks 20.750s 4292.349us 1 1 100.00
otp_ctrl_check_fail 12.780s 1588.219us 1 1 100.00
regwen_during_otp_init 1 1 100.00
otp_ctrl_regwen 8.110s 4413.646us 1 1 100.00
partition_lock 1 1 100.00
otp_ctrl_dai_lock 15.810s 1582.384us 1 1 100.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 14.650s 9222.498us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 9.120s 672.201us 1 1 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 13.130s 1417.443us 1 1 100.00
otp_macro_errors 1 1 100.00
otp_ctrl_macro_errs 4.200s 524.063us 1 1 100.00
test_access 1 1 100.00
otp_ctrl_test_access 12.490s 823.243us 1 1 100.00
stress_all 1 1 100.00
otp_ctrl_stress_all 102.210s 10918.324us 1 1 100.00
intr_test 1 1 100.00
otp_ctrl_intr_test 1.290s 157.140us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 1.720s 83.807us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 3.190s 54.502us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 3.190s 54.502us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 1.370s 67.819us 1 1 100.00
otp_ctrl_csr_rw 1.250s 78.955us 1 1 100.00
otp_ctrl_csr_aliasing 4.170s 179.208us 1 1 100.00
otp_ctrl_same_csr_outstanding 1.660s 187.287us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 1.370s 67.819us 1 1 100.00
otp_ctrl_csr_rw 1.250s 78.955us 1 1 100.00
otp_ctrl_csr_aliasing 4.170s 179.208us 1 1 100.00
otp_ctrl_same_csr_outstanding 1.660s 187.287us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
tl_intg_err 2 2 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
otp_ctrl_tl_intg_err 11.560s 2390.464us 1 1 100.00
prim_count_check 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
prim_fsm_check 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 11.560s 2390.464us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 4.250s 2502.195us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 4.250s 2502.195us 1 1 100.00
sec_cm_dai_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_kdi_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_lci_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_part_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_scrmbl_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_timer_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_dai_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_kdi_seed_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_kdi_entropy_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_lci_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_part_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_scrmbl_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_timer_integ_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_timer_cnsty_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_timer_lfsr_redun 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_dai_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
sec_cm_part_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
otp_ctrl_macro_errs 4.200s 524.063us 1 1 100.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
sec_cm_timer_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_dai_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
sec_cm_part_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
otp_ctrl_macro_errs 4.200s 524.063us 1 1 100.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
sec_cm_timer_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 11.560s 2687.391us 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_part_data_reg_integrity 1 1 100.00
otp_ctrl_init_fail 3.530s 198.526us 1 1 100.00
sec_cm_part_data_reg_bkgn_chk 1 1 100.00
otp_ctrl_check_fail 12.780s 1588.219us 1 1 100.00
sec_cm_part_mem_regren 1 1 100.00
otp_ctrl_dai_lock 15.810s 1582.384us 1 1 100.00
sec_cm_part_mem_sw_unreadable 1 1 100.00
otp_ctrl_dai_lock 15.810s 1582.384us 1 1 100.00
sec_cm_part_mem_sw_unwritable 1 1 100.00
otp_ctrl_dai_lock 15.810s 1582.384us 1 1 100.00
sec_cm_lc_part_mem_sw_noaccess 1 1 100.00
otp_ctrl_dai_lock 15.810s 1582.384us 1 1 100.00
sec_cm_access_ctrl_mubi 1 1 100.00
otp_ctrl_dai_lock 15.810s 1582.384us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 4.250s 2502.195us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
otp_ctrl_dai_lock 15.810s 1582.384us 1 1 100.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 4.250s 2502.195us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 102.770s 9563.972us 1 1 100.00
sec_cm_direct_access_config_regwen 1 1 100.00
otp_ctrl_regwen 8.110s 4413.646us 1 1 100.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 4.250s 2502.195us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 4.250s 2502.195us 1 1 100.00
sec_cm_macro_mem_integrity 1 1 100.00
otp_ctrl_macro_errs 4.200s 524.063us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 1 1 100.00
otp_ctrl_low_freq_read 10.130s 8392.075us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
otp_ctrl_stress_all_with_rand_reset 46.270s 5239.184us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (otp_ctrl_scoreboard.sv:1831) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 1 test run
otp_ctrl_stress_all_with_rand_reset 83604524212649834391045264474766248415558817443601362553088558549446289514708 24105
UVM_INFO @ 5239183638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---