Simulation Results: keymgr

 
05/08/2026 15:30:30 DVSim: v1.50.0 sha: 023bd59 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 87.04 %
  • code
  • 96.22 %
  • assert
  • 97.26 %
  • func
  • 67.63 %
  • line
  • 98.88 %
  • branch
  • 98.36 %
  • cond
  • 93.88 %
  • toggle
  • 96.95 %
  • FSM
  • 93.02 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.630s 146.233us 1 1 100.00
random 1 1 100.00
keymgr_random 3.080s 501.647us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.010s 31.809us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.800s 202.080us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 8.620s 386.352us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 3.100s 72.547us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.260s 33.335us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.800s 202.080us 1 1 100.00
keymgr_csr_aliasing 3.100s 72.547us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.470s 235.318us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.080s 977.816us 1 1 100.00
keymgr_sideload_kmac 2.120s 223.460us 1 1 100.00
keymgr_sideload_aes 2.270s 209.034us 1 1 100.00
keymgr_sideload_otbn 2.070s 95.136us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 1.970s 195.675us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.230s 423.188us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.290s 59.941us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.390s 137.866us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 3.090s 515.555us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.560s 201.082us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 22.860s 3033.140us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.700s 19.460us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.680s 11.232us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.500s 270.775us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.500s 270.775us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.010s 31.809us 1 1 100.00
keymgr_csr_rw 0.800s 202.080us 1 1 100.00
keymgr_csr_aliasing 3.100s 72.547us 1 1 100.00
keymgr_same_csr_outstanding 1.240s 22.928us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.010s 31.809us 1 1 100.00
keymgr_csr_rw 0.800s 202.080us 1 1 100.00
keymgr_csr_aliasing 3.100s 72.547us 1 1 100.00
keymgr_same_csr_outstanding 1.240s 22.928us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
keymgr_tl_intg_err 5.120s 327.068us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.960s 297.025us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.960s 297.025us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.960s 297.025us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.960s 297.025us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 7.600s 872.495us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 5.120s 327.068us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.960s 297.025us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.470s 235.318us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 3.080s 501.647us 1 1 100.00
keymgr_csr_rw 0.800s 202.080us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 3.080s 501.647us 1 1 100.00
keymgr_csr_rw 0.800s 202.080us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 3.080s 501.647us 1 1 100.00
keymgr_csr_rw 0.800s 202.080us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.230s 423.188us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.090s 515.555us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.090s 515.555us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 3.080s 501.647us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.630s 300.155us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.080s 187.265us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.230s 423.188us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.080s 187.265us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.080s 187.265us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.080s 187.265us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.730s 2374.927us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.080s 187.265us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 5.440s 309.922us 1 1 100.00