Simulation Results: otbn

 
06/08/2026 15:30:30 DVSim: v1.50.0 sha: 377160a json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.77 %
  • code
  • 84.69 %
  • assert
  • 87.14 %
  • func
  • 94.49 %
  • block
  • 99.22 %
  • line
  • 99.40 %
  • branch
  • 94.46 %
  • toggle
  • 81.51 %
  • FSM
  • 63.38 %
Validation stages
V1
100.00%
V2
92.86%
V2S
96.00%
V3
0.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
otbn_smoke 11.000s 55.972us 1 1 100.00
single_binary 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 33.000s 26.505us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 34.000s 26.017us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 35.000s 506.655us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 34.000s 16.622us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 36.000s 98.606us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 34.000s 26.017us 1 1 100.00
otbn_csr_aliasing 34.000s 16.622us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 116.000s 6727.787us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 54.000s 1186.736us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 1 1 100.00
otbn_reset 42.000s 147.385us 1 1 100.00
multi_error 0 1 0.00
otbn_multi_err 50.000s 140.541us 0 1 0.00
back_to_back 1 1 100.00
otbn_multi 72.000s 260.579us 1 1 100.00
stress_all 1 1 100.00
otbn_stress_all 18.000s 231.831us 1 1 100.00
lc_escalation 1 1 100.00
otbn_escalate 36.000s 15.805us 1 1 100.00
zero_state_err_urnd 1 1 100.00
otbn_zero_state_err_urnd 6.000s 29.146us 1 1 100.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 19.000s 99.117us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 35.000s 22.172us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 34.000s 17.423us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 5.000s 53.329us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 5.000s 53.329us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 33.000s 26.505us 1 1 100.00
otbn_csr_rw 34.000s 26.017us 1 1 100.00
otbn_csr_aliasing 34.000s 16.622us 1 1 100.00
otbn_same_csr_outstanding 4.000s 149.854us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 33.000s 26.505us 1 1 100.00
otbn_csr_rw 34.000s 26.017us 1 1 100.00
otbn_csr_aliasing 34.000s 16.622us 1 1 100.00
otbn_same_csr_outstanding 4.000s 149.854us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 2 2 100.00
otbn_imem_err 39.000s 19.224us 1 1 100.00
otbn_dmem_err 46.000s 77.102us 1 1 100.00
internal_integrity 4 4 100.00
otbn_alu_bignum_mod_err 40.000s 57.981us 1 1 100.00
otbn_controller_ispr_rdata_err 38.000s 64.438us 1 1 100.00
otbn_mac_bignum_acc_err 36.000s 52.753us 1 1 100.00
otbn_urnd_err 4.000s 29.081us 1 1 100.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 35.000s 16.562us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 34.000s 40.340us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 25.000s 16.818us 1 1 100.00
tl_intg_err 1 2 50.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
otbn_tl_intg_err 18.000s 232.398us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 42.000s 203.737us 1 1 100.00
prim_fsm_check 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
prim_count_check 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 11.000s 55.972us 1 1 100.00
sec_cm_data_mem_integrity 1 1 100.00
otbn_dmem_err 46.000s 77.102us 1 1 100.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 39.000s 19.224us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 18.000s 232.398us 1 1 100.00
sec_cm_controller_fsm_global_esc 1 1 100.00
otbn_escalate 36.000s 15.805us 1 1 100.00
sec_cm_controller_fsm_local_esc 4 5 80.00
otbn_imem_err 39.000s 19.224us 1 1 100.00
otbn_dmem_err 46.000s 77.102us 1 1 100.00
otbn_zero_state_err_urnd 6.000s 29.146us 1 1 100.00
otbn_illegal_mem_acc 35.000s 16.562us 1 1 100.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_controller_fsm_sparse 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 39.000s 19.224us 1 1 100.00
otbn_dmem_err 46.000s 77.102us 1 1 100.00
otbn_zero_state_err_urnd 6.000s 29.146us 1 1 100.00
otbn_illegal_mem_acc 35.000s 16.562us 1 1 100.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_scramble_ctrl_fsm_sparse 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_start_stop_ctrl_fsm_global_esc 1 1 100.00
otbn_escalate 36.000s 15.805us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 39.000s 19.224us 1 1 100.00
otbn_dmem_err 46.000s 77.102us 1 1 100.00
otbn_zero_state_err_urnd 6.000s 29.146us 1 1 100.00
otbn_illegal_mem_acc 35.000s 16.562us 1 1 100.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_start_stop_ctrl_fsm_sparse 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 36.000s 43.476us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 23.000s 123.771us 1 1 100.00
sec_cm_rnd_bus_consistency 1 1 100.00
otbn_rnd_sec_cm 19.000s 137.500us 1 1 100.00
sec_cm_rnd_rng_digest 1 1 100.00
otbn_rnd_sec_cm 19.000s 137.500us 1 1 100.00
sec_cm_rf_base_data_reg_sw_integrity 1 1 100.00
otbn_rf_base_intg_err 9.000s 68.888us 1 1 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_stack_wr_ptr_ctr_redun 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 10.000s 56.884us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_loop_stack_ctr_redun 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
sec_cm_loop_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 8.000s 24.044us 1 1 100.00
sec_cm_call_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 8.000s 24.044us 1 1 100.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 5.000s 11.158us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
sec_cm_write_mem_integrity 1 1 100.00
otbn_multi 72.000s 260.579us 1 1 100.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
sec_cm_data_mem_sw_noaccess 1 1 100.00
otbn_sw_no_acc 6.000s 19.689us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
otbn_single 8.000s 98.295us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 0 1 0.00
otbn_sec_cm 113.000s 2157.294us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 66.000s 3514.375us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
otbn_smoke_vectorized 7.000s 65.699us 1 1 100.00

Error Messages

   Test seed line log context
UVM_FATAL (otbn_scoreboard.sv:551) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a recov alert but it still hasn't arrived. 1 test run
otbn_multi_err 42288622036408629565036681991824947329427961176685042225017768028835809087334 329
UVM_INFO @ 140541138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:349) [otbn_imem_err_vseq] Check failed (!cfg.under_reset) 1 test run
otbn_stress_all_with_rand_reset 41675499997479471108799740247948618699705566167324789831999402640679348700095 283
UVM_INFO @ 3514375392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_otbn_*/rtl/otbn_rnd.sv,233): Assertion UrndNoReseedOnReset_A has failed 1 test run
otbn_sec_cm 28435996217071959701952937667633012702466170988025589310889568418162362062591 518
UVM_ERROR @ 2157294218 ps: (otbn_rnd.sv:233) [ASSERT FAILED] UrndNoReseedOnReset_A
UVM_INFO @ 2157294218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---