Simulation Results: aes/masked

 
10/08/2026 15:30:36 DVSim: v1.50.1 sha: af43bb2 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.98 %
  • code
  • 94.33 %
  • assert
  • 98.23 %
  • func
  • 74.38 %
  • block
  • 95.29 %
  • line
  • 96.31 %
  • branch
  • 89.71 %
  • toggle
  • 97.99 %
  • FSM
  • 93.33 %
Validation stages
V1
100.00%
V2
94.12%
V2S
93.75%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 81.727us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 172.655us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 1.000s 108.081us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 62.849us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 6.000s 579.363us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 469.849us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 124.829us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 62.849us 1 1 100.00
aes_csr_aliasing 2.000s 469.849us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 172.655us 1 1 100.00
aes_config_error 3.000s 183.441us 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 172.655us 1 1 100.00
aes_config_error 3.000s 183.441us 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
back2back 2 2 100.00
aes_stress 4.000s 132.878us 1 1 100.00
aes_b2b 8.000s 193.556us 1 1 100.00
backpressure 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 2.000s 172.655us 1 1 100.00
aes_config_error 3.000s 183.441us 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
aes_alert_reset 4.000s 290.589us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 113.589us 1 1 100.00
aes_config_error 3.000s 183.441us 1 1 100.00
aes_alert_reset 4.000s 290.589us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 302.508us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 8.000s 887.851us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 4.000s 290.589us 1 1 100.00
stress 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
sideload 2 2 100.00
aes_stress 4.000s 132.878us 1 1 100.00
aes_sideload 4.000s 125.737us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 185.497us 1 1 100.00
stress_all 0 1 0.00
aes_stress_all 23.000s 1581.063us 0 1 0.00
alert_test 1 1 100.00
aes_alert_test 2.000s 53.335us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 62.996us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 62.996us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 1.000s 108.081us 1 1 100.00
aes_csr_rw 1.000s 62.849us 1 1 100.00
aes_csr_aliasing 2.000s 469.849us 1 1 100.00
aes_same_csr_outstanding 2.000s 66.453us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 1.000s 108.081us 1 1 100.00
aes_csr_rw 1.000s 62.849us 1 1 100.00
aes_csr_aliasing 2.000s 469.849us 1 1 100.00
aes_same_csr_outstanding 2.000s 66.453us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 5.000s 201.489us 1 1 100.00
fault_inject 2 3 66.67
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_cipher_fi 2.000s 69.330us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 198.266us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 198.266us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 198.266us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 198.266us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 257.725us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 8.000s 1278.225us 1 1 100.00
aes_tl_intg_err 2.000s 197.404us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 197.404us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 4.000s 290.589us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 198.266us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 198.266us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 2.000s 172.655us 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
aes_alert_reset 4.000s 290.589us 1 1 100.00
aes_core_fi 2.000s 95.463us 1 1 100.00
sec_cm_gcm_config_sparse 3 3 100.00
aes_config_error 3.000s 183.441us 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
aes_core_fi 2.000s 95.463us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 198.266us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 111.931us 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 4.000s 132.878us 1 1 100.00
aes_sideload 4.000s 125.737us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 111.931us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 111.931us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 111.931us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 111.931us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 111.931us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 4.000s 132.878us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 3.000s 82.644us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_cipher_fi 2.000s 69.330us 1 1 100.00
aes_ctr_fi 2.000s 57.943us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 3.000s 82.644us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_cipher_fi 2.000s 69.330us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 69.330us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 3.000s 82.644us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_ctr_fi 2.000s 57.943us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 3.000s 82.644us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_cipher_fi 2.000s 69.330us 1 1 100.00
aes_ctr_fi 2.000s 57.943us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 4.000s 290.589us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_cipher_fi 2.000s 69.330us 1 1 100.00
aes_ctr_fi 2.000s 57.943us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_cipher_fi 2.000s 69.330us 1 1 100.00
aes_ctr_fi 2.000s 57.943us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_ctr_fi 2.000s 57.943us 1 1 100.00
sec_cm_ghash_fsm_local_esc 0 1 0.00
aes_fi 3.000s 82.644us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 3.000s 82.644us 0 1 0.00
aes_control_fi 2.000s 72.027us 1 1 100.00
aes_cipher_fi 2.000s 69.330us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 8.000s 3520.985us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 2 test runs
aes_stress_all 2850138387554138747439692615968207881191121707057456991845021338430817608035 69914
UVM_INFO @ 1581062634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 105362281153491824359276958836134607545823838976030312811344353266812635160639 329
UVM_INFO @ 3520985458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 1 test run
aes_fi 68290874701542437209544280006564730584603771186923466974674645751818638943614 7710
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0