Simulation Results: otbn

 
10/08/2026 15:30:36 DVSim: v1.50.1 sha: af43bb2 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 91.43 %
  • code
  • 86.19 %
  • assert
  • 89.80 %
  • func
  • 98.31 %
  • block
  • 99.26 %
  • line
  • 99.47 %
  • branch
  • 94.56 %
  • toggle
  • 84.51 %
  • FSM
  • 66.20 %
Validation stages
V1
100.00%
V2
92.86%
V2S
88.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
otbn_smoke 37.000s 283.325us 1 1 100.00
otbn_smoke_vectorized 8.000s 20.186us 1 1 100.00
single_binary 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 33.000s 31.571us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 32.000s 20.033us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 34.000s 92.531us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 32.000s 15.542us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 34.000s 122.294us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 32.000s 20.033us 1 1 100.00
otbn_csr_aliasing 32.000s 15.542us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 117.000s 11625.848us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 42.000s 2103.637us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 1 1 100.00
otbn_reset 28.000s 157.909us 1 1 100.00
multi_error 1 1 100.00
otbn_multi_err 59.000s 627.063us 1 1 100.00
back_to_back 1 1 100.00
otbn_multi 65.000s 895.884us 1 1 100.00
stress_all 1 1 100.00
otbn_stress_all 82.000s 318.249us 1 1 100.00
lc_escalation 0 1 0.00
otbn_escalate 30.000s 2.974us 0 1 0.00
zero_state_err_urnd 1 1 100.00
otbn_zero_state_err_urnd 7.000s 16.937us 1 1 100.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 10.000s 36.623us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 33.000s 47.003us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 26.000s 16.399us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 5.000s 186.143us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 5.000s 186.143us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 33.000s 31.571us 1 1 100.00
otbn_csr_rw 32.000s 20.033us 1 1 100.00
otbn_csr_aliasing 32.000s 15.542us 1 1 100.00
otbn_same_csr_outstanding 4.000s 157.027us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 33.000s 31.571us 1 1 100.00
otbn_csr_rw 32.000s 20.033us 1 1 100.00
otbn_csr_aliasing 32.000s 15.542us 1 1 100.00
otbn_same_csr_outstanding 4.000s 157.027us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 2 2 100.00
otbn_imem_err 35.000s 47.682us 1 1 100.00
otbn_dmem_err 37.000s 24.454us 1 1 100.00
internal_integrity 3 4 75.00
otbn_alu_bignum_mod_err 36.000s 191.710us 1 1 100.00
otbn_controller_ispr_rdata_err 37.000s 205.100us 1 1 100.00
otbn_mac_bignum_acc_err 27.000s 206.222us 1 1 100.00
otbn_urnd_err 6.000s 57.840us 0 1 0.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 30.000s 11.830us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 23.000s 54.414us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 6.000s 17.575us 1 1 100.00
tl_intg_err 2 2 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
otbn_tl_intg_err 12.000s 270.358us 1 1 100.00
passthru_mem_tl_intg_err 0 1 0.00
otbn_passthru_mem_tl_intg_err 20.000s 1205.906us 0 1 0.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 37.000s 283.325us 1 1 100.00
sec_cm_data_mem_integrity 1 1 100.00
otbn_dmem_err 37.000s 24.454us 1 1 100.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 35.000s 47.682us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 12.000s 270.358us 1 1 100.00
sec_cm_controller_fsm_global_esc 0 1 0.00
otbn_escalate 30.000s 2.974us 0 1 0.00
sec_cm_controller_fsm_local_esc 5 5 100.00
otbn_imem_err 35.000s 47.682us 1 1 100.00
otbn_dmem_err 37.000s 24.454us 1 1 100.00
otbn_zero_state_err_urnd 7.000s 16.937us 1 1 100.00
otbn_illegal_mem_acc 30.000s 11.830us 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 5 5 100.00
otbn_imem_err 35.000s 47.682us 1 1 100.00
otbn_dmem_err 37.000s 24.454us 1 1 100.00
otbn_zero_state_err_urnd 7.000s 16.937us 1 1 100.00
otbn_illegal_mem_acc 30.000s 11.830us 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 0 1 0.00
otbn_escalate 30.000s 2.974us 0 1 0.00
sec_cm_start_stop_ctrl_fsm_local_esc 5 5 100.00
otbn_imem_err 35.000s 47.682us 1 1 100.00
otbn_dmem_err 37.000s 24.454us 1 1 100.00
otbn_zero_state_err_urnd 7.000s 16.937us 1 1 100.00
otbn_illegal_mem_acc 30.000s 11.830us 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 35.000s 13.245us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 7.000s 13.710us 1 1 100.00
sec_cm_rnd_bus_consistency 1 1 100.00
otbn_rnd_sec_cm 22.000s 194.196us 1 1 100.00
sec_cm_rnd_rng_digest 1 1 100.00
otbn_rnd_sec_cm 22.000s 194.196us 1 1 100.00
sec_cm_rf_base_data_reg_sw_integrity 1 1 100.00
otbn_rf_base_intg_err 7.000s 48.530us 1 1 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 7.000s 576.353us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
sec_cm_loop_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 11.000s 35.534us 1 1 100.00
sec_cm_call_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 11.000s 35.534us 1 1 100.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 5.000s 25.963us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
sec_cm_write_mem_integrity 1 1 100.00
otbn_multi 65.000s 895.884us 1 1 100.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
sec_cm_data_mem_sw_noaccess 1 1 100.00
otbn_sw_no_acc 18.000s 137.742us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
otbn_single 7.000s 59.384us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 358.000s 3488.424us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 289.000s 2553.699us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (otbn_scoreboard.sv:322) [scoreboard] Check failed item.d_data == exp_read_data.val (* [*] vs * [*]) value for register otbn_reg_block.status 1 test run
otbn_escalate 55098060132122908710685449435773024511346782500540589024322522676874629524469 105
UVM_INFO @ 2974067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:349) [otbn_dmem_err_vseq] Check failed (!cfg.under_reset) 1 test run
otbn_stress_all_with_rand_reset 51994870435410000410716898178391441517605427202540952162270194489997394769917 471
UVM_INFO @ 2553699194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sva_*/otbn_idle_checker.sv,196): Assertion NotRunningWhenLocked_A has failed 1 test run
otbn_urnd_err 75041176353774083526708643361309026346328320798294007560853068753130372367381 111
UVM_ERROR @ 57839602 ps: (otbn_idle_checker.sv:196) [ASSERT FAILED] NotRunningWhenLocked_A
UVM_INFO @ 57839602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:551) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived. 1 test run
otbn_passthru_mem_tl_intg_err 26394958161967674272193059001230823604726002557455967838355398384637935731138 126
UVM_INFO @ 1205906374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---