| V1 |
|
100.00% |
| V2 |
|
92.86% |
| V2S |
|
92.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 2 | 2 | 100.00 | |||
| otbn_smoke | 12.000s | 45.396us | 1 | 1 | 100.00 | |
| otbn_smoke_vectorized | 7.000s | 73.018us | 1 | 1 | 100.00 | |
| single_binary | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| otbn_csr_hw_reset | 29.000s | 26.568us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| otbn_csr_rw | 29.000s | 42.808us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| otbn_csr_bit_bash | 31.000s | 48.846us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| otbn_csr_aliasing | 29.000s | 46.065us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| otbn_csr_mem_rw_with_rand_reset | 32.000s | 64.820us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| otbn_csr_rw | 29.000s | 42.808us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 29.000s | 46.065us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| otbn_mem_walk | 95.000s | 1487.706us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| otbn_mem_partial_access | 51.000s | 1332.559us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reset_recovery | 1 | 1 | 100.00 | |||
| otbn_reset | 23.000s | 211.684us | 1 | 1 | 100.00 | |
| multi_error | 0 | 1 | 0.00 | |||
| otbn_multi_err | 12.000s | 28.324us | 0 | 1 | 0.00 | |
| back_to_back | 1 | 1 | 100.00 | |||
| otbn_multi | 18.000s | 698.478us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| otbn_stress_all | 118.000s | 1653.826us | 1 | 1 | 100.00 | |
| lc_escalation | 1 | 1 | 100.00 | |||
| otbn_escalate | 32.000s | 23.549us | 1 | 1 | 100.00 | |
| zero_state_err_urnd | 1 | 1 | 100.00 | |||
| otbn_zero_state_err_urnd | 7.000s | 61.216us | 1 | 1 | 100.00 | |
| sw_errs_fatal_chk | 1 | 1 | 100.00 | |||
| otbn_sw_errs_fatal_chk | 7.000s | 52.058us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| otbn_alert_test | 31.000s | 41.623us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| otbn_intr_test | 20.000s | 36.845us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 6.000s | 224.224us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 6.000s | 224.224us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 29.000s | 26.568us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 29.000s | 42.808us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 29.000s | 46.065us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 5.000s | 19.088us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 29.000s | 26.568us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 29.000s | 42.808us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 29.000s | 46.065us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 5.000s | 19.088us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| mem_integrity | 2 | 2 | 100.00 | |||
| otbn_imem_err | 28.000s | 67.463us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 31.000s | 55.528us | 1 | 1 | 100.00 | |
| internal_integrity | 3 | 4 | 75.00 | |||
| otbn_alu_bignum_mod_err | 31.000s | 37.166us | 1 | 1 | 100.00 | |
| otbn_controller_ispr_rdata_err | 35.000s | 18.929us | 1 | 1 | 100.00 | |
| otbn_mac_bignum_acc_err | 24.000s | 66.100us | 1 | 1 | 100.00 | |
| otbn_urnd_err | 5.000s | 9.636us | 0 | 1 | 0.00 | |
| illegal_bus_access | 1 | 1 | 100.00 | |||
| otbn_illegal_mem_acc | 27.000s | 16.173us | 1 | 1 | 100.00 | |
| otbn_mem_gnt_acc_err | 1 | 1 | 100.00 | |||
| otbn_mem_gnt_acc_err | 6.000s | 44.473us | 1 | 1 | 100.00 | |
| otbn_non_sec_partial_wipe | 1 | 1 | 100.00 | |||
| otbn_partial_wipe | 6.000s | 19.961us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| otbn_tl_intg_err | 39.000s | 274.750us | 1 | 1 | 100.00 | |
| passthru_mem_tl_intg_err | 0 | 1 | 0.00 | |||
| otbn_passthru_mem_tl_intg_err | 6.000s | 10.755us | 0 | 1 | 0.00 | |
| prim_fsm_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| prim_count_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_mem_scramble | 1 | 1 | 100.00 | |||
| otbn_smoke | 12.000s | 45.396us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_dmem_err | 31.000s | 55.528us | 1 | 1 | 100.00 | |
| sec_cm_instruction_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_imem_err | 28.000s | 67.463us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| otbn_tl_intg_err | 39.000s | 274.750us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 32.000s | 23.549us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 28.000s | 67.463us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 31.000s | 55.528us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 7.000s | 61.216us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 27.000s | 16.173us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_scramble_key_sideload | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 28.000s | 67.463us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 31.000s | 55.528us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 7.000s | 61.216us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 27.000s | 16.173us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 32.000s | 23.549us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 28.000s | 67.463us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 31.000s | 55.528us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 7.000s | 61.216us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 27.000s | 16.173us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sca | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_redun | 1 | 1 | 100.00 | |||
| otbn_ctrl_redun | 35.000s | 136.738us | 1 | 1 | 100.00 | |
| sec_cm_pc_ctrl_flow_redun | 1 | 1 | 100.00 | |||
| otbn_pc_ctrl_flow_redun | 6.000s | 16.028us | 1 | 1 | 100.00 | |
| sec_cm_rnd_bus_consistency | 1 | 1 | 100.00 | |||
| otbn_rnd_sec_cm | 69.000s | 1642.924us | 1 | 1 | 100.00 | |
| sec_cm_rnd_rng_digest | 1 | 1 | 100.00 | |||
| otbn_rnd_sec_cm | 69.000s | 1642.924us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_base_intg_err | 29.000s | 132.215us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_stack_wr_ptr_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_bignum_intg_err | 12.000s | 77.546us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_addr_integrity | 1 | 1 | 100.00 | |||
| otbn_stack_addr_integ_chk | 7.000s | 51.196us | 1 | 1 | 100.00 | |
| sec_cm_call_stack_addr_integrity | 1 | 1 | 100.00 | |||
| otbn_stack_addr_integ_chk | 7.000s | 51.196us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_state_consistency | 1 | 1 | 100.00 | |||
| otbn_sec_wipe_err | 5.000s | 25.428us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| sec_cm_instruction_mem_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| sec_cm_write_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_multi | 18.000s | 698.478us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_flow_count | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_flow_sca | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_sw_noaccess | 1 | 1 | 100.00 | |||
| otbn_sw_no_acc | 7.000s | 13.310us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| otbn_single | 7.000s | 129.545us | 1 | 1 | 100.00 | |
| sec_cm_tlul_fifo_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 346.000s | 1641.913us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 1 | 1 | 100.00 | |||
| otbn_stress_all_with_rand_reset | 242.000s | 3921.722us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (otbn_scoreboard.sv:551) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a recov alert but it still hasn't arrived. | 2 test runs | |||
| otbn_multi_err | 55743459768719234825595124709304393900382991494396277340912145408479984933403 | 232 |
UVM_INFO @ 28323583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_passthru_mem_tl_intg_err | 21253265524865670376096933465383503308098476019301470749049961937362098932809 | 91 |
UVM_INFO @ 10754818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sva_*/otbn_idle_checker.sv,196): Assertion NotRunningWhenLocked_A has failed | 1 test run | |||
| otbn_urnd_err | 90712635041434217142099381140525678204907870220699639052049444671665845604443 | 110 |
UVM_ERROR @ 9636229 ps: (otbn_idle_checker.sv:196) [ASSERT FAILED] NotRunningWhenLocked_A
UVM_INFO @ 9636229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|