Simulation Results: entropy_src/rng_4bits

 
17/08/2026 15:30:35 DVSim: v1.50.1 sha: b9d39c6 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 74.15 %
  • code
  • 88.16 %
  • assert
  • 84.40 %
  • func
  • 49.89 %
  • block
  • 94.32 %
  • line
  • 97.09 %
  • branch
  • 86.31 %
  • toggle
  • 76.54 %
  • FSM
  • 92.71 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 31.791us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 1.000s 25.183us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 93.879us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 6.000s 419.796us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 3.000s 86.022us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 1.000s 5.064us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 93.879us 1 1 100.00
entropy_src_csr_aliasing 3.000s 86.022us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 31.791us 1 1 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
entropy_src_fw_ov 108.000s 13124.486us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 108.000s 13124.486us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 61.000s 13084.426us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
entropy_src_intr 8.000s 527.369us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
entropy_src_functional_alerts 5.000s 183.421us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 101.000s 13191.338us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 186.684us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 2.000s 22.923us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 2.000s 340.023us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 20.611us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 2.000s 127.289us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 2.000s 127.289us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 1.000s 25.183us 1 1 100.00
entropy_src_csr_rw 2.000s 93.879us 1 1 100.00
entropy_src_csr_aliasing 3.000s 86.022us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 251.645us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 1.000s 25.183us 1 1 100.00
entropy_src_csr_rw 2.000s 93.879us 1 1 100.00
entropy_src_csr_aliasing 3.000s 86.022us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 251.645us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 168.973us 1 1 100.00
entropy_src_tl_intg_err 3.000s 1521.685us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
entropy_src_cfg_regwen 2.000s 23.156us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
entropy_src_fw_ov 108.000s 13124.486us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 186.684us 1 1 100.00
entropy_src_sec_cm 2.000s 168.973us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 186.684us 1 1 100.00
entropy_src_sec_cm 2.000s 168.973us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 45.000s 14203.698us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 186.684us 1 1 100.00
entropy_src_sec_cm 2.000s 168.973us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 186.684us 1 1 100.00
entropy_src_sec_cm 2.000s 168.973us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 186.684us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 5.000s 183.421us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 3.000s 1521.685us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 52.000s 14081.997us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 15.000s 3727.271us 0 1 0.00

Error Messages

   Test seed line log context
UVM_WARNING (uvm_reg_field.svh:1186) [RegModel] Trying to predict value of field 'observe_fifo_depth' while register 'entropy_src_reg_block.observe_fifo_depth' is being accessed 1 test run
entropy_src_stress_all_with_rand_reset 77397868404445774704879551917202406453548993551871519592163879388051370978173 220
UVM_FATAL @ 3727271006 ps: (entropy_src_scoreboard.sv:1599) [uvm_test_top.env.scoreboard] Check failed (ral.observe_fifo_depth.observe_fifo_depth.predict( ral.observe_fifo_depth.observe_fifo_depth.get_mirrored_value()-1, .kind(UVM_PREDICT_DIRECT)))
UVM_INFO @ 3727271006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror alert_fail_counts 1 test run
entropy_src_csr_mem_rw_with_rand_reset 1560518123337809898107326279655280105106952515810951140853732386896343965161 113
UVM_INFO @ 5064032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---