Simulation Results: chip

 
18/08/2026 15:30:28 DVSim: v1.50.1 sha: 2c5d921 json Branch: master Tool: vcs [unknown]
Validation stages
V1
0.00%
V2
0.00%
V2S
0.00%
V3
0.00%
unmapped
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_example_tests 0 4 0.00
chip_sw_example_flash 0.000s 0.000us 0 1 0.00
chip_sw_example_rom 0.000s 0.000us 0 1 0.00
chip_sw_example_manufacturer 0.000s 0.000us 0 1 0.00
chip_sw_example_concurrency 0.000s 0.000us 0 1 0.00
csr_hw_reset 0 1 0.00
chip_csr_hw_reset 0.000s 0.000us 0 1 0.00
csr_rw 0 1 0.00
chip_csr_rw 0.000s 0.000us 0 1 0.00
csr_bit_bash 0 1 0.00
chip_csr_bit_bash 0.000s 0.000us 0 1 0.00
csr_aliasing 0 1 0.00
chip_csr_aliasing 0.000s 0.000us 0 1 0.00
csr_mem_rw_with_rand_reset 0 1 0.00
chip_csr_mem_rw_with_rand_reset 0.000s 0.000us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 0 2 0.00
chip_csr_aliasing 0.000s 0.000us 0 1 0.00
chip_csr_rw 0.000s 0.000us 0 1 0.00
xbar_smoke 0 1 0.00
xbar_smoke 0.000s 0.000us 0 1 0.00
chip_sw_gpio_out 0 1 0.00
chip_sw_gpio 0.000s 0.000us 0 1 0.00
chip_sw_gpio_in 0 1 0.00
chip_sw_gpio 0.000s 0.000us 0 1 0.00
chip_sw_gpio_irq 0 1 0.00
chip_sw_gpio 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx 0 1 0.00
chip_sw_uart_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_uart_rx_overflow 0 4 0.00
chip_sw_uart_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_idx1 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_idx2 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_idx3 0.000s 0.000us 0 1 0.00
chip_sw_uart_baud_rate 0 1 0.00
chip_sw_uart_rand_baudrate 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_alt_clk_freq 0 2 0.00
chip_sw_uart_tx_rx_alt_clk_freq 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_alt_clk_freq_low_speed 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_pin_mux 0 1 0.00
chip_padctrl_attributes 0.000s 0.000us 0 1 0.00
chip_padctrl_attributes 0 1 0.00
chip_padctrl_attributes 0.000s 0.000us 0 1 0.00
chip_sw_sleep_pin_mio_dio_val 0 1 0.00
chip_sw_sleep_pin_mio_dio_val 0.000s 0.000us 0 1 0.00
chip_sw_sleep_pin_wake 0 1 0.00
chip_sw_sleep_pin_wake 0.000s 0.000us 0 1 0.00
chip_sw_sleep_pin_retention 0 1 0.00
chip_sw_sleep_pin_retention 0.000s 0.000us 0 1 0.00
chip_sw_tap_strap_sampling 0 4 0.00
chip_tap_straps_dev 0.000s 0.000us 0 1 0.00
chip_tap_straps_testunlock0 0.000s 0.000us 0 1 0.00
chip_tap_straps_rma 0.000s 0.000us 0 1 0.00
chip_tap_straps_prod 0.000s 0.000us 0 1 0.00
chip_sw_data_integrity 0 1 0.00
chip_sw_data_integrity_escalation 0.000s 0.000us 0 1 0.00
chip_sw_instruction_integrity 0 1 0.00
chip_sw_data_integrity_escalation 0.000s 0.000us 0 1 0.00
chip_sw_ast_clk_outputs 0 1 0.00
chip_sw_ast_clk_outputs 0.000s 0.000us 0 1 0.00
chip_sw_ast_clk_rst_inputs 0 1 0.00
chip_sw_ast_clk_rst_inputs 0.000s 0.000us 0 1 0.00
chip_sw_ast_sys_clk_jitter 0 10 0.00
chip_sw_flash_ctrl_ops_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_edn_entropy_reqs_jitter 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_key_derivation_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter 0.000s 0.000us 0 1 0.00
chip_sw_ast_usb_clk_calib 0 1 0.00
chip_sw_usb_ast_clk_calib 0.000s 0.000us 0 1 0.00
chip_sw_sensor_ctrl_ast_alerts 0 2 0.00
chip_sw_sensor_ctrl_alert 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_sensor_ctrl_ast_status 0 1 0.00
chip_sw_sensor_ctrl_status 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 0 1 0.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_smoketest 0 16 0.00
chip_sw_aes_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_csrng_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_gpio_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_hmac_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_kmac_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_otbn_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_usbdev_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rv_plic_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rv_timer_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_uart_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_otp_smoketest 0 1 0.00
chip_sw_otp_ctrl_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rom_functests 0 1 0.00
rom_keymgr_functest 0.000s 0.000us 0 1 0.00
chip_sw_boot 0 1 0.00
chip_sw_uart_tx_rx_bootstrap 0.000s 0.000us 0 1 0.00
chip_sw_secure_boot 0 1 0.00
rom_e2e_smoke 0.000s 0.000us 0 1 0.00
chip_sw_rom_raw_unlock 0 1 0.00
rom_raw_unlock 0.000s 0.000us 0 1 0.00
chip_sw_power_idle_load 0 1 0.00
chip_sw_power_idle_load 0.000s 0.000us 0 1 0.00
chip_sw_power_sleep_load 0 1 0.00
chip_sw_power_sleep_load 0.000s 0.000us 0 1 0.00
chip_sw_exit_test_unlocked_bootstrap 0 1 0.00
chip_sw_exit_test_unlocked_bootstrap 0.000s 0.000us 0 1 0.00
chip_sw_inject_scramble_seed 0 1 0.00
chip_sw_inject_scramble_seed 0.000s 0.000us 0 1 0.00
tl_d_oob_addr_access 0 1 0.00
chip_tl_errors 0.000s 0.000us 0 1 0.00
tl_d_illegal_access 0 1 0.00
chip_tl_errors 0.000s 0.000us 0 1 0.00
tl_d_outstanding_access 0 4 0.00
chip_csr_aliasing 0.000s 0.000us 0 1 0.00
chip_same_csr_outstanding 0.000s 0.000us 0 1 0.00
chip_csr_hw_reset 0.000s 0.000us 0 1 0.00
chip_csr_rw 0.000s 0.000us 0 1 0.00
tl_d_partial_access 0 4 0.00
chip_csr_aliasing 0.000s 0.000us 0 1 0.00
chip_same_csr_outstanding 0.000s 0.000us 0 1 0.00
chip_csr_hw_reset 0.000s 0.000us 0 1 0.00
chip_csr_rw 0.000s 0.000us 0 1 0.00
xbar_base_random_sequence 0 1 0.00
xbar_random 0.000s 0.000us 0 1 0.00
xbar_random_delay 0 6 0.00
xbar_smoke_zero_delays 0.000s 0.000us 0 1 0.00
xbar_smoke_large_delays 0.000s 0.000us 0 1 0.00
xbar_smoke_slow_rsp 0.000s 0.000us 0 1 0.00
xbar_random_zero_delays 0.000s 0.000us 0 1 0.00
xbar_random_large_delays 0.000s 0.000us 0 1 0.00
xbar_random_slow_rsp 0.000s 0.000us 0 1 0.00
xbar_unmapped_address 0 2 0.00
xbar_unmapped_addr 0.000s 0.000us 0 1 0.00
xbar_error_and_unmapped_addr 0.000s 0.000us 0 1 0.00
xbar_error_cases 0 2 0.00
xbar_error_random 0.000s 0.000us 0 1 0.00
xbar_error_and_unmapped_addr 0.000s 0.000us 0 1 0.00
xbar_all_access_same_device 0 2 0.00
xbar_access_same_device 0.000s 0.000us 0 1 0.00
xbar_access_same_device_slow_rsp 0.000s 0.000us 0 1 0.00
xbar_all_hosts_use_same_source_id 0 1 0.00
xbar_same_source 0.000s 0.000us 0 1 0.00
xbar_stress_all 0 2 0.00
xbar_stress_all 0.000s 0.000us 0 1 0.00
xbar_stress_all_with_error 0.000s 0.000us 0 1 0.00
xbar_stress_with_reset 0 2 0.00
xbar_stress_all_with_rand_reset 0.000s 0.000us 0 1 0.00
xbar_stress_all_with_reset_error 0.000s 0.000us 0 1 0.00
rom_e2e_smoke 0 1 0.00
rom_e2e_smoke 0.000s 0.000us 0 1 0.00
rom_e2e_shutdown_output 0 1 0.00
rom_e2e_shutdown_output 0.000s 0.000us 0 1 0.00
rom_e2e_shutdown_exception_c 0 1 0.00
rom_e2e_shutdown_exception_c 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid 0 15 0.00
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_dev 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_prod 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_rma 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_dev 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_prod 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_rma 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_dev 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_prod 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_rma 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always 0 15 0.00
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_dev 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_prod 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_rma 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_dev 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_prod 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_rma 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_dev 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_prod 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_rma 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init 0 5 0.00
rom_e2e_asm_init_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init_dev 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init_prod 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init_rma 0.000s 0.000us 0 1 0.00
rom_e2e_keymgr_init 0 3 0.00
rom_e2e_keymgr_init_rom_ext_meas 0.000s 0.000us 0 1 0.00
rom_e2e_keymgr_init_rom_ext_no_meas 0.000s 0.000us 0 1 0.00
rom_e2e_keymgr_init_rom_ext_invalid_meas 0.000s 0.000us 0 1 0.00
rom_e2e_static_critical 0 1 0.00
rom_e2e_static_critical 0.000s 0.000us 0 1 0.00
chip_sw_adc_ctrl_debug_cable_irq 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc 0 2 0.00
chip_sw_aes_enc 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_aes_entropy 0 1 0.00
chip_sw_aes_entropy 0.000s 0.000us 0 1 0.00
chip_sw_aes_idle 0 1 0.00
chip_sw_aes_idle 0.000s 0.000us 0 1 0.00
chip_sw_aes_sideload 0 1 0.00
chip_sw_keymgr_sideload_aes 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_alerts 0 1 0.00
chip_sw_alert_test 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_escalations 0 1 0.00
chip_sw_alert_handler_escalation 0.000s 0.000us 0 1 0.00
chip_sw_all_escalation_resets 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_irqs 0 3 0.00
chip_plic_all_irqs_0 0.000s 0.000us 0 1 0.00
chip_plic_all_irqs_10 0.000s 0.000us 0 1 0.00
chip_plic_all_irqs_20 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_entropy 0 1 0.00
chip_sw_alert_handler_entropy 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_crashdump 0 1 0.00
chip_sw_rstmgr_alert_info 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_ping_timeout 0 1 0.00
chip_sw_alert_handler_ping_timeout 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_alerts 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_alerts 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_pings 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_pings 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_clock_off 0 1 0.00
chip_sw_alert_handler_lpg_clkoff 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_reset_toggle 0 1 0.00
chip_sw_alert_handler_lpg_reset_toggle 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_ping_ok 0 1 0.00
chip_sw_alert_handler_ping_ok 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_reverse_ping_in_deep_sleep 0 1 0.00
chip_sw_alert_handler_reverse_ping_in_deep_sleep 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wakeup_irq 0 1 0.00
chip_sw_aon_timer_irq 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_sleep_wakeup 0 1 0.00
chip_sw_pwrmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wdog_bark_irq 0 1 0.00
chip_sw_aon_timer_irq 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_sleep_wdog_bite_reset 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_sleep_wdog_sleep_pause 0 1 0.00
chip_sw_aon_timer_sleep_wdog_sleep_pause 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wdog_lc_escalate 0 1 0.00
chip_sw_aon_timer_wdog_lc_escalate 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_idle_trans 0 4 0.00
chip_sw_otbn_randomness 0.000s 0.000us 0 1 0.00
chip_sw_aes_idle 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_idle 0.000s 0.000us 0 1 0.00
chip_sw_kmac_idle 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_trans 0 4 0.00
chip_sw_clkmgr_off_aes_trans 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_hmac_trans 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_kmac_trans 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_otbn_trans 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_peri 0 1 0.00
chip_sw_clkmgr_off_peri 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_div 0 7 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 0.000s 0.000us 0 1 0.00
chip_sw_ast_clk_outputs 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_lc 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_lc 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw 0 2 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter 0 10 0.00
chip_sw_flash_ctrl_ops_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_edn_entropy_reqs_jitter 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_key_derivation_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_extended_range 0 11 0.00
chip_sw_clkmgr_jitter_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_access_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_flash_init_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_csrng_edn_concurrency_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_deep_sleep_frequency 0 1 0.00
chip_sw_ast_clk_outputs 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_sleep_frequency 0 1 0.00
chip_sw_clkmgr_sleep_frequency 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_reset_frequency 0 1 0.00
chip_sw_clkmgr_reset_frequency 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_alert_handler_clock_enables 0 1 0.00
chip_sw_alert_handler_lpg_clkoff 0.000s 0.000us 0 1 0.00
chip_sw_csrng_edn_cmd 0 1 0.00
chip_sw_entropy_src_csrng 0.000s 0.000us 0 1 0.00
chip_sw_csrng_fuse_en_sw_app_read 0 1 0.00
chip_sw_csrng_fuse_en_sw_app_read_test 0.000s 0.000us 0 1 0.00
chip_sw_csrng_lc_hw_debug_en 0 1 0.00
chip_sw_csrng_lc_hw_debug_en_test 0.000s 0.000us 0 1 0.00
chip_sw_csrng_known_answer_tests 0 1 0.00
chip_sw_csrng_kat_test 0.000s 0.000us 0 1 0.00
chip_sw_edn_entropy_reqs 0 3 0.00
chip_sw_csrng_edn_concurrency 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_ast_rng_req 0.000s 0.000us 0 1 0.00
chip_sw_edn_entropy_reqs 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_ast_rng_req 0 1 0.00
chip_sw_entropy_src_ast_rng_req 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_csrng 0 1 0.00
chip_sw_entropy_src_csrng 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_known_answer_tests 0 1 0.00
chip_sw_entropy_src_kat_test 0.000s 0.000us 0 1 0.00
chip_sw_flash_init 0 1 0.00
chip_sw_flash_init 0.000s 0.000us 0 1 0.00
chip_sw_flash_host_access 0 2 0.00
chip_sw_flash_ctrl_access 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_ops 0 2 0.00
chip_sw_flash_ctrl_ops 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_ops_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_rma_unlocked 0 1 0.00
chip_sw_flash_rma_unlocked 0.000s 0.000us 0 1 0.00
chip_sw_flash_scramble 0 1 0.00
chip_sw_flash_init 0.000s 0.000us 0 1 0.00
chip_sw_flash_idle_low_power 0 1 0.00
chip_sw_flash_ctrl_idle_low_power 0.000s 0.000us 0 1 0.00
chip_sw_flash_keymgr_seeds 0 1 0.00
chip_sw_keymgr_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_flash_lc_creator_seed_sw_rw_en 0 1 0.00
chip_sw_flash_ctrl_lc_rw_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_creator_seed_wipe_on_rma 0 1 0.00
chip_sw_flash_rma_unlocked 0.000s 0.000us 0 1 0.00
chip_sw_flash_lc_owner_seed_sw_rw_en 0 1 0.00
chip_sw_flash_ctrl_lc_rw_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_lc_iso_part_sw_rd_en 0 1 0.00
chip_sw_flash_ctrl_lc_rw_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_lc_iso_part_sw_wr_en 0 1 0.00
chip_sw_flash_ctrl_lc_rw_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_lc_seed_hw_rd_en 0 1 0.00
chip_sw_flash_ctrl_lc_rw_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_lc_escalate_en 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_flash_prim_tl_access 0 1 0.00
chip_prim_tl_access 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_clock_freqs 0 1 0.00
chip_sw_flash_ctrl_clock_freqs 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_escalation_reset 0 1 0.00
chip_sw_flash_crash_alert 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_write_clear 0 1 0.00
chip_sw_flash_crash_alert 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc 0 2 0.00
chip_sw_hmac_enc 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_hmac_idle 0 1 0.00
chip_sw_hmac_enc_idle 0.000s 0.000us 0 1 0.00
chip_sw_hmac_all_configurations 0 1 0.00
chip_sw_hmac_oneshot 0.000s 0.000us 0 1 0.00
chip_sw_hmac_multistream_mode 0 1 0.00
chip_sw_hmac_multistream 0.000s 0.000us 0 1 0.00
chip_sw_i2c_host_tx_rx 0 3 0.00
chip_sw_i2c_host_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_i2c_host_tx_rx_idx1 0.000s 0.000us 0 1 0.00
chip_sw_i2c_host_tx_rx_idx2 0.000s 0.000us 0 1 0.00
chip_sw_i2c_device_tx_rx 0 1 0.00
chip_sw_i2c_device_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_key_derivation 0 2 0.00
chip_sw_keymgr_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_key_derivation_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_sideload_kmac 0 1 0.00
chip_sw_keymgr_sideload_kmac 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_sideload_aes 0 1 0.00
chip_sw_keymgr_sideload_aes 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_sideload_otbn 0 1 0.00
chip_sw_keymgr_sideload_otbn 0.000s 0.000us 0 1 0.00
chip_sw_kmac_enc 0 3 0.00
chip_sw_kmac_mode_cshake 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_kmac_app_keymgr 0 1 0.00
chip_sw_keymgr_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_kmac_app_lc 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_kmac_app_rom 0 1 0.00
chip_sw_kmac_app_rom 0.000s 0.000us 0 1 0.00
chip_sw_kmac_entropy 0 1 0.00
chip_sw_kmac_entropy 0.000s 0.000us 0 1 0.00
chip_sw_kmac_idle 0 1 0.00
chip_sw_kmac_idle 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_alert_handler_escalation 0 1 0.00
chip_sw_alert_handler_escalation 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_jtag_access 0 3 0.00
chip_tap_straps_dev 0.000s 0.000us 0 1 0.00
chip_tap_straps_rma 0.000s 0.000us 0 1 0.00
chip_tap_straps_prod 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_otp_hw_cfg0 0 1 0.00
chip_sw_lc_ctrl_otp_hw_cfg0 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_init 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_transitions 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_kmac_req 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_key_div 0 1 0.00
chip_sw_keymgr_key_derivation_prod 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_broadcast 0 22 0.00
chip_sw_flash_ctrl_lc_rw_en 0.000s 0.000us 0 1 0.00
chip_sw_flash_rma_unlocked 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_dev 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_prod 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_rma 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_rom_ctrl_integrity_check 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_execution_main 0.000s 0.000us 0 1 0.00
chip_prim_tl_access 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_lc 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 0.000s 0.000us 0 1 0.00
chip_tap_straps_dev 0.000s 0.000us 0 1 0.00
chip_tap_straps_rma 0.000s 0.000us 0 1 0.00
chip_tap_straps_prod 0.000s 0.000us 0 1 0.00
chip_rv_dm_lc_disabled 0.000s 0.000us 0 1 0.00
chip_lc_scrap 0 4 0.00
chip_sw_lc_ctrl_rma_to_scrap 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_raw_to_scrap 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_test_locked0_to_scrap 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_rand_to_scrap 0.000s 0.000us 0 1 0.00
chip_lc_test_locked 0 2 0.00
chip_sw_lc_walkthrough_testunlocks 0.000s 0.000us 0 1 0.00
chip_rv_dm_lc_disabled 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough 0 5 0.00
chip_sw_lc_walkthrough_dev 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough_prod 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough_prodend 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough_rma 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough_testunlocks 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_volatile_raw_unlock 0 3 0.00
chip_sw_lc_ctrl_volatile_raw_unlock 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz 0.000s 0.000us 0 1 0.00
rom_volatile_raw_unlock 0.000s 0.000us 0 1 0.00
chip_sw_otbn_op 0 2 0.00
chip_sw_otbn_ecdsa_op_irq 0.000s 0.000us 0 1 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_otbn_rnd_entropy 0 1 0.00
chip_sw_otbn_randomness 0.000s 0.000us 0 1 0.00
chip_sw_otbn_urnd_entropy 0 1 0.00
chip_sw_otbn_randomness 0.000s 0.000us 0 1 0.00
chip_sw_otbn_idle 0 1 0.00
chip_sw_otbn_randomness 0.000s 0.000us 0 1 0.00
chip_sw_otbn_mem_scramble 0 1 0.00
chip_sw_otbn_mem_scramble 0.000s 0.000us 0 1 0.00
chip_otp_ctrl_init 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_keys 0 5 0.00
chip_sw_flash_init 0.000s 0.000us 0 1 0.00
chip_sw_otbn_mem_scramble 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_icache_invalidate 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_entropy 0 5 0.00
chip_sw_flash_init 0.000s 0.000us 0 1 0.00
chip_sw_otbn_mem_scramble 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_icache_invalidate 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_program 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_program_error 0 1 0.00
chip_sw_lc_ctrl_program_error 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_hw_cfg0 0 1 0.00
chip_sw_lc_ctrl_otp_hw_cfg0 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals 0 6 0.00
chip_sw_otp_ctrl_lc_signals_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_dev 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_prod 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_rma 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_prim_tl_access 0.000s 0.000us 0 1 0.00
chip_sw_otp_prim_tl_access 0 1 0.00
chip_prim_tl_access 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_dai_lock 0 1 0.00
chip_sw_otp_ctrl_dai_lock 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_external_full_reset 0 1 0.00
chip_sw_pwrmgr_full_aon_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_wake_ups 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_wake_ups 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_wake_ups 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_wake_ups 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_por_reset 0 1 0.00
chip_sw_pwrmgr_deep_sleep_por_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_por_reset 0 1 0.00
chip_sw_pwrmgr_normal_sleep_por_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_all_wake_ups 0 1 0.00
chip_sw_pwrmgr_deep_sleep_all_wake_ups 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 0 2 0.00
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_wdog_reset 0 1 0.00
chip_sw_pwrmgr_wdog_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_full_aon_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_main_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_main_power_glitch_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_random_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_random_sleep_power_glitch_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_sleep_power_glitch_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sysrst_ctrl_reset 0 2 0.00
chip_sw_pwrmgr_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_b2b_sleep_reset_req 0 1 0.00
chip_sw_pwrmgr_b2b_sleep_reset_req 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_disabled 0 1 0.00
chip_sw_pwrmgr_sleep_disabled 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_rom_access 0 1 0.00
chip_sw_rom_ctrl_integrity_check 0.000s 0.000us 0 1 0.00
chip_sw_rom_ctrl_integrity_check 0 1 0.00
chip_sw_rom_ctrl_integrity_check 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_non_sys_reset_info 0 4 0.00
chip_sw_pwrmgr_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_wdog_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_sys_reset_info 0 1 0.00
chip_rv_dm_ndm_reset_req 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_cpu_info 0 1 0.00
chip_sw_rstmgr_cpu_info 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_sw_req_reset 0 1 0.00
chip_sw_rstmgr_sw_req 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_alert_info 0 1 0.00
chip_sw_rstmgr_alert_info 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_sw_rst 0 1 0.00
chip_sw_rstmgr_sw_rst 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_alert_handler_reset_enables 0 1 0.00
chip_sw_alert_handler_lpg_reset_toggle 0.000s 0.000us 0 1 0.00
chip_sw_nmi_irq 0 1 0.00
chip_sw_rv_core_ibex_nmi_irq 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_rnd 0 1 0.00
chip_sw_rv_core_ibex_rnd 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_address_translation 0 1 0.00
chip_sw_rv_core_ibex_address_translation 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_icache_scrambled_access 0 1 0.00
chip_sw_rv_core_ibex_icache_invalidate 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_fault_dump 0 1 0.00
chip_sw_rstmgr_cpu_info 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_double_fault 0 1 0.00
chip_sw_rstmgr_cpu_info 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_mcounteren_writable 0 1 0.00
chip_sw_rv_core_ibex_mcounteren_writable 0.000s 0.000us 0 1 0.00
chip_jtag_csr_rw 0 1 0.00
chip_jtag_csr_rw 0.000s 0.000us 0 1 0.00
chip_jtag_mem_access 0 1 0.00
chip_jtag_mem_access 0.000s 0.000us 0 1 0.00
chip_rv_dm_ndm_reset_req 0 1 0.00
chip_rv_dm_ndm_reset_req 0.000s 0.000us 0 1 0.00
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 0 1 0.00
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 0.000s 0.000us 0 1 0.00
chip_rv_dm_access_after_wakeup 0 1 0.00
chip_sw_rv_dm_access_after_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_rv_dm_jtag_tap_sel 0 1 0.00
chip_tap_straps_rma 0.000s 0.000us 0 1 0.00
chip_rv_dm_lc_disabled 0 1 0.00
chip_rv_dm_lc_disabled 0.000s 0.000us 0 1 0.00
chip_sw_plic_all_irqs 0 3 0.00
chip_plic_all_irqs_0 0.000s 0.000us 0 1 0.00
chip_plic_all_irqs_10 0.000s 0.000us 0 1 0.00
chip_plic_all_irqs_20 0.000s 0.000us 0 1 0.00
chip_sw_plic_sw_irq 0 1 0.00
chip_sw_plic_sw_irq 0.000s 0.000us 0 1 0.00
chip_sw_timer 0 1 0.00
chip_sw_rv_timer_irq 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_flash_mode 0 1 0.00
rom_e2e_smoke 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_pass_through 0 1 0.00
chip_sw_spi_device_pass_through 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_pass_through_collision 0 1 0.00
chip_sw_spi_device_pass_through_collision 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_tpm 0 1 0.00
chip_sw_spi_device_tpm 0.000s 0.000us 0 1 0.00
chip_sw_spi_host_tx_rx 0 1 0.00
chip_sw_spi_host_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_sram_scrambled_access 0 2 0.00
chip_sw_sram_ctrl_scrambled_access 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_sleep_sram_ret_contents 0 2 0.00
chip_sw_sleep_sram_ret_contents_no_scramble 0.000s 0.000us 0 1 0.00
chip_sw_sleep_sram_ret_contents_scramble 0.000s 0.000us 0 1 0.00
chip_sw_sram_execution 0 1 0.00
chip_sw_sram_ctrl_execution_main 0.000s 0.000us 0 1 0.00
chip_sw_sram_lc_escalation 0 2 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_data_integrity_escalation 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_reset 0 2 0.00
chip_sw_pwrmgr_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_inputs 0 1 0.00
chip_sw_sysrst_ctrl_inputs 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_outputs 0 1 0.00
chip_sw_sysrst_ctrl_outputs 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_in_irq 0 1 0.00
chip_sw_sysrst_ctrl_in_irq 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_sleep_wakeup 0 1 0.00
chip_sw_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_sleep_reset 0 1 0.00
chip_sw_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_ec_rst_l 0 1 0.00
chip_sw_sysrst_ctrl_ec_rst_l 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_flash_wp_l 0 1 0.00
chip_sw_sysrst_ctrl_ec_rst_l 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_ulp_z3_wakeup 0 2 0.00
chip_sw_sysrst_ctrl_ulp_z3_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_vbus 0 1 0.00
chip_sw_usbdev_vbus 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_pullup 0 1 0.00
chip_sw_usbdev_pullup 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_aon_pullup 0 1 0.00
chip_sw_usbdev_aon_pullup 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_setup_rx 0 1 0.00
chip_sw_usbdev_setuprx 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_config_host 0 1 0.00
chip_sw_usbdev_config_host 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_pincfg 0 1 0.00
chip_sw_usbdev_pincfg 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_tx_rx 0 1 0.00
chip_sw_usbdev_dpi 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_toggle_restore 0 1 0.00
chip_sw_usbdev_toggle_restore 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_aes_masking_off 0 1 0.00
chip_sw_aes_masking_off 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_lockstep_glitch 0 1 0.00
chip_sw_rv_core_ibex_lockstep_glitch 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_coremark 0 1 0.00
chip_sw_coremark 0.000s 0.000us 0 1 0.00
chip_sw_power_max_load 0 1 0.00
chip_sw_power_virus 0.000s 0.000us 0 1 0.00
rom_e2e_debug 0 3 0.00
rom_e2e_jtag_debug_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_debug_dev 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_debug_rma 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_inject 0 3 0.00
rom_e2e_jtag_inject_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_inject_dev 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_inject_rma 0.000s 0.000us 0 1 0.00
rom_e2e_self_hash 0 1 0.00
rom_e2e_self_hash 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter_cycle_measurements 0 1 0.00
chip_sw_clkmgr_jitter_frequency 0.000s 0.000us 0 1 0.00
chip_sw_edn_boot_mode 0 1 0.00
chip_sw_edn_boot_mode 0.000s 0.000us 0 1 0.00
chip_sw_edn_auto_mode 0 1 0.00
chip_sw_edn_auto_mode 0.000s 0.000us 0 1 0.00
chip_sw_edn_sw_mode 0 1 0.00
chip_sw_edn_sw_mode 0.000s 0.000us 0 1 0.00
chip_sw_edn_kat 0 1 0.00
chip_sw_edn_kat 0.000s 0.000us 0 1 0.00
chip_sw_flash_memory_protection 0 1 0.00
chip_sw_flash_ctrl_mem_protection 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_escalation 0 1 0.00
chip_sw_otp_ctrl_escalation 0.000s 0.000us 0 1 0.00
chip_sw_sensor_ctrl_deep_sleep_wake_up 0 1 0.00
chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_usb_clk_disabled_when_active 0 1 0.00
chip_sw_pwrmgr_usb_clk_disabled_when_active 0.000s 0.000us 0 1 0.00
chip_sw_all_resets 0 1 0.00
chip_sw_pwrmgr_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_rv_dm_perform_debug 0 3 0.00
rom_e2e_jtag_debug_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_debug_dev 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_debug_rma 0.000s 0.000us 0 1 0.00
chip_sw_rv_dm_access_after_hw_reset 0 1 0.00
chip_sw_rv_dm_access_after_escalation_reset 0.000s 0.000us 0 1 0.00
chip_sw_plic_alerts 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
tick_configuration 0 1 0.00
chip_sw_rv_timer_systick_test 0.000s 0.000us 0 1 0.00
counter_wrap 0 1 0.00
chip_sw_rv_timer_systick_test 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_output_when_disabled_or_sleeping 0 1 0.00
chip_sw_spi_device_pinmux_sleep_retention 0.000s 0.000us 0 1 0.00
chip_sw_uart_watermarks 0 1 0.00
chip_sw_uart_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_stream 0 1 0.00
chip_sw_usbdev_stream 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 0 11 0.00
chip_sival_flash_info_access 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_rst_cnsty_escalation 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_rot_auth_config 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_descrambling 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_lowpower_cancel 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_wake_5_bug 0.000s 0.000us 0 1 0.00
chip_sw_flash_ctrl_write_clear 0.000s 0.000us 0 1 0.00
chip_sw_flash_scrambling_smoketest 0.000s 0.000us 0 1 0.00
ate_bootstrap_flash_erase 0.000s 0.000us 0 1 0.00
ate_bootstrap_one_frame 0.000s 0.000us 0 1 0.00
ate_bootstrap_disjoint 0.000s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
Job cancelled because one of its dependencies failed or was killed. 327 test runs
chip_csr_bit_bash 103413323806526005703177367682452385578615479738965959666666424922313781114294 None
chip_csr_aliasing 109862733327142653576470273801517585467818568440489946983685633009840835471525 None
chip_same_csr_outstanding 51168831632256241354523416336393358944819890998923308378939937999354514840997 None
chip_sw_example_flash 57270501093643820728836852655667332132502948530371195204843658861283572794798 None
chip_sw_example_rom 17805014035905500456808115087917417604781074902636478484755762651998471395524 None
chip_sw_example_manufacturer 65529627149985851747567373402584097530021770191662912039952591817787533919625 None
chip_sw_example_concurrency 31491475730737324115495676481594529486813856142333588983322152558811049935311 None
chip_sival_flash_info_access 106617526438957776796177651970754054010690375500941932210301842462324743743233 None
chip_sw_all_escalation_resets 68586276765369943222605618086438163010742054596422453972925935435051843763067 None
chip_sw_rstmgr_rst_cnsty_escalation 42887385431213655289019589817857438574277799717901969897970663347634485394471 None
chip_sw_data_integrity_escalation 16690559063058853150691519125019954516459837815031780267927081227946811490662 None
chip_sw_sleep_pin_mio_dio_val 14092868018223610065393550316286548753143024835186285112141414357579335987029 None
chip_sw_sleep_pin_wake 63756989477421171320875608193372620863787866267383361761088251054480817392757 None
chip_sw_sleep_pin_retention 50911463862396015671833311901673994791051077532496351480163944420353078649386 None
chip_sw_uart_tx_rx 1560906191228047741038713194869898494355865560012131344000251543159746673152 None
chip_sw_uart_tx_rx_idx1 47572377041423589096086805694714358152354355475549017780241234824871163848338 None
chip_sw_uart_tx_rx_idx2 57591172650530928401485182080652299832788553224312886469649751154898648234800 None
chip_sw_uart_tx_rx_idx3 8540089523816037654451146799275530213810473847305023368264264745974785511700 None
chip_sw_uart_tx_rx_bootstrap 88612793012996913482954443399394167847899293807278755602168258284962450507454 None
chip_sw_usbdev_vbus 61295813677693317961695629503412180036333354760110581453095978897703570886531 None
chip_sw_usbdev_dpi 26135724893294392964721994338908915875886511757343738465124915991787733132900 None
chip_sw_usbdev_pullup 75498203133164008555975643442510798583525423445688853468368331312471752605273 None
chip_sw_usbdev_aon_pullup 15786136410033315790864798284751139626419318353301179188647405668966463661965 None
chip_sw_usbdev_setuprx 83901432801409600711333736710254394804066631364539387649963004175803693015093 None
chip_sw_usbdev_config_host 72768671638697787219205795354980836918684516084272951338478383991036549007103 None
chip_sw_usbdev_pincfg 101418758379306178563530712147865084387996374700059856286732888791367940799812 None
chip_sw_usbdev_stream 39091375403697574960713807849562175988907847277496742690223891827149719806088 None
chip_sw_usbdev_toggle_restore 85333549511457580174382132926545849161127075899496651648653072558326407961647 None
chip_sw_inject_scramble_seed 20152595702789515494693699607010580435874430059713111260245160385311174706326 None
chip_sw_exit_test_unlocked_bootstrap 100013960060626869326783867233294747625700560923641823165793215075747915445726 None
chip_sw_uart_rand_baudrate 41049058130581514176397258968366222600173604699584023919134590739885615101598 None
chip_sw_uart_tx_rx_alt_clk_freq 65013087209948043652857428456847701945792045998546076873658768788497354139741 None
chip_sw_uart_tx_rx_alt_clk_freq_low_speed 97275119604565345270093547816914524941924509120538459847435144895986404011417 None
chip_sw_i2c_host_tx_rx 75554357780061068102386615095130328478596854736273106769400054959818390404222 None
chip_sw_i2c_host_tx_rx_idx1 46661130243115344959935080069380156329305500728319036134538396034345594401525 None
chip_sw_i2c_host_tx_rx_idx2 96405308029024330166744651892578222164977022769103147801599175954655604598242 None
chip_sw_i2c_device_tx_rx 100262820582433063178132685228723520185272706165405908989647969348154025777544 None
chip_sw_spi_device_tpm 115420137667336922019447301228188558489397126964350504403259489271140600055788 None
chip_sw_spi_host_tx_rx 58796057807609358734511533648717865137080473610074128794600568678302113356564 None
chip_sw_spi_device_pinmux_sleep_retention 114553704394417359538224652344210198159372365682925942327068927087573529051641 None
chip_sw_spi_device_pass_through 51231988243525469497901688030625513503895138620107973057942914413065920455991 None
chip_sw_spi_device_pass_through_collision 77390082031221700676585535353550986039965871527479051393126240196957895531880 None
chip_sw_gpio 44575203979484354509114182003497973345508789483051319815797551813056807847691 None
chip_sw_flash_ctrl_ops 12595950454453006189626060175565619131648979080017958253762100916093508859292 None
chip_sw_flash_ctrl_ops_jitter_en 82818483228340392364210824748969566678653222813680889948128486436757655729856 None
chip_sw_flash_ctrl_lc_rw_en 26261047245316580718623470007821035664734545431029638165183995818627910810439 None
chip_sw_flash_ctrl_access 34634084666728904044987477224771679845255684165994783267421334822522159872317 None
chip_sw_flash_ctrl_access_jitter_en 48140186679534686190802443714079402729622502767139581310602268828270817683103 None
chip_sw_flash_ctrl_idle_low_power 44988568526127246822931010153874884362324154983401013747777784562488171511644 None
chip_sw_flash_init 103650737393483014130783566008747532965367299579552611241109491763989013934817 None
chip_sw_flash_rma_unlocked 86595922439125504046586222506856905055322613133390899814083408490646497982767 None
chip_sw_flash_ctrl_clock_freqs 105635006975004542680754699767954137156510120247786628375587946395257684231100 None
chip_sw_kmac_entropy 72553344344388541227509122239191390038721224402399391709301212854984791409098 None
chip_sw_lc_ctrl_otp_hw_cfg0 54402357421258793292864880688345644511422605602129957866479656064918408425915 None
chip_sw_otp_ctrl_lc_signals_test_unlocked0 53173890071915561773188979921726363612524497397083146336127426559446778058715 None
chip_sw_otp_ctrl_lc_signals_dev 40287278189331294465714995381518432291562986968962976684587083767087849035075 None
chip_sw_otp_ctrl_lc_signals_prod 95246211284975142294208342633686453562014567079976751269277479420846388312742 None
chip_sw_otp_ctrl_lc_signals_rma 100134726738565434273315035761067420303739648837897058165950993791672412311989 None
chip_sw_otp_ctrl_escalation 96849282503136504475332334237844598524591740907513057530409437960197383419137 None
chip_sw_otp_ctrl_dai_lock 94043298925898036496134867871160228741017361359325025635626473805137181395975 None
chip_sw_otp_ctrl_rot_auth_config 30762001208604269178070671095147942113987718773943165431901311294624695544927 None
chip_sw_otp_ctrl_descrambling 57314312697775000790750026349921816231792478226641197246073082491001539734766 None
chip_sw_lc_ctrl_transition 15396120501649400784036695606971127147454825349557335372692944483610438538944 None
chip_sw_lc_ctrl_rma_to_scrap 47078663143502750700739790668112532945677763847446712019928878128819293960389 None
chip_sw_lc_ctrl_raw_to_scrap 43358917077544165257345661220436802874395218949037797663059512907897610971710 None
chip_sw_lc_ctrl_test_locked0_to_scrap 22847393009964987895270721640812404121071140364777723773306099082817682035502 None
chip_sw_lc_ctrl_rand_to_scrap 37049643124323413793668927954736618354248738580327668422769756301440753665038 None
chip_sw_lc_walkthrough_dev 72969938069460823764153205881723259182413814771723370547763375913848603854178 None
chip_sw_lc_walkthrough_prod 40067705133204129891952538295868985269191136143341381468895963280523082219605 None
chip_sw_lc_walkthrough_prodend 34973770655956921593389047021493049165705837247630875898712143927520157392113 None
chip_sw_lc_ctrl_volatile_raw_unlock 726673097275403441331254022323019836036150280880035897847061021009890901938 None
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz 44223053887487562430145640595672137276745493019700601157282084266530770443461 None
chip_sw_lc_walkthrough_rma 115713529951033042674903385814635505918805295583069517884137144525807410934907 None
chip_sw_lc_walkthrough_testunlocks 89191808594548303690750983438778944366834280132716537341905072758184625346758 None
chip_sw_rstmgr_sw_req 84645283110593536648241629124224889829728856144599296412829949677416201102435 None
chip_sw_rstmgr_sw_rst 29131548238628836868748152492936508485534739444520079903827572935183092221577 None
chip_sw_rstmgr_alert_info 67144539242701815452461851369890025654155596749902135474234215866810262155682 None
chip_sw_rstmgr_cpu_info 54689639417763748155082378652050881102041264103562759545499885894009093910117 None
chip_sw_pwrmgr_full_aon_reset 1598192546089575658061402040064295464522596116983713691918300509349668200144 None
chip_sw_pwrmgr_main_power_glitch_reset 105202327242748070093081287395836215188459403921073941422984391798693245060412 None
chip_sw_pwrmgr_sysrst_ctrl_reset 57263226803018810493669802557712930823014942593037366972445599190550007339433 None
chip_sw_pwrmgr_all_reset_reqs 62641206493158970399544433168797772470094497704077090972402695036910789308637 None
chip_sw_pwrmgr_random_sleep_all_reset_reqs 23610308922959495549588317979731604102854864828760295703328359137575693779371 None
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 33641886817970897891526481883234820269622393448747657349290061751594184051378 None
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 112842188277613518885956064051736852442028587663230495592811090505292387940526 None
chip_sw_pwrmgr_deep_sleep_por_reset 101149811190768382310083606159170822548529212809065557360428716501906942395800 None
chip_sw_pwrmgr_normal_sleep_por_reset 65249200293345562664653848303910729525429747720399649368918101019879008180874 None
chip_sw_pwrmgr_sleep_power_glitch_reset 106319832275904848038711114364544108476361045632379203837579531916165384294317 None
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 68593275961383349934525494172267810743596279896845804020923440995463257687747 None
chip_sw_pwrmgr_random_sleep_power_glitch_reset 71815419234791227224247132946645781786413389600077196947777492348019297264090 None
chip_sw_pwrmgr_sleep_disabled 101809568363874617029050125343995700676752072764766848176049171159532287882663 None
chip_sw_pwrmgr_usb_clk_disabled_when_active 65901813579691339034327369091971194936252247028693284926604001025192178281052 None
chip_sw_rv_timer_irq 67024270675585070798540695256328374134913842475194926173038390007932313449743 None
chip_sw_rv_timer_systick_test 37565584539302715689939545156493286915300904807245704868231061418985816862400 None
chip_sw_sysrst_ctrl_inputs 23023595339332152112351436158465138751298080429351007313567518661680373865349 None
chip_sw_sysrst_ctrl_in_irq 45230043360895030915164345660455326103567753391015820645675601795938336847472 None
chip_sw_sysrst_ctrl_ulp_z3_wakeup 66600292905371879508992723706916364121029509622173565388126149245427376487087 None
chip_sw_sysrst_ctrl_reset 20941345699642783341254430242127711460366115135532182930256638347363190948657 None
chip_sw_sysrst_ctrl_outputs 56467601498069034699807103266283721512208362232160427474353029530044841906057 None
chip_sw_sysrst_ctrl_ec_rst_l 14370503271963709464045985858374169622373988140435386011647217858936393761459 None
chip_sw_aon_timer_irq 88181842805716566958284107810889991838261472219202394145351447527554122544953 None
chip_sw_aon_timer_sleep_wdog_sleep_pause 62987859557047433018832166186692111362285505993193681745596564880259764083765 None
chip_sw_aon_timer_wdog_bite_reset 115357853662956500477083809609095353972999426896405503762891357555055811821060 None
chip_sw_pwrmgr_wdog_reset 59657569064914036613089564083199737462278490520670890207780047202107138811124 None
chip_sw_aon_timer_wdog_lc_escalate 78611377165748318976378109513641035554878862639803468301776063450195980082895 None
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 85179327077325510197200193926602785951355573742402162396175051449164514608142 None
chip_sw_otbn_randomness 9125039710621547599971956819450828601033536826929258210981742436897482054907 None
chip_sw_otbn_ecdsa_op_irq 37608511289483915492257843709619995627954813498243806005529835920249019227511 None
chip_sw_otbn_ecdsa_op_irq_jitter_en 87215200858068984173062999577296631112820331748367888553677231454497674586961 None
chip_sw_otbn_mem_scramble 87987897618691308114322965751637428965403285331200052237317194573679703378287 None
chip_sw_rv_core_ibex_rnd 28107638802603417613199706285355480420254626355398395690143272969686653641410 None
chip_sw_rv_core_ibex_nmi_irq 66013341226932499826593622942567179522722587080671839186058045811526989464930 None
chip_sw_aes_enc 19009969620903589950958472145329404241000462020965230289123421190764488707764 None
chip_sw_aes_enc_jitter_en 84821199078506523573231530602359415147902876055928395434514779381059422647514 None
chip_sw_aes_idle 55544633612942489943693990507302394484508853529523673703095925138804784745548 None
chip_sw_aes_masking_off 49479272042454354694083364098907935235436400856163228405366763708129990584635 None
chip_sw_alert_test 45555762974397929632016182137034595491769990039321089247022305780322800839571 None
chip_sw_alert_handler_escalation 41318558329066468730929812067398570057255292179140096372615305487603414083991 None
chip_sw_alert_handler_ping_timeout 38065690363979082965664984186637342375920284196316572251777230358016394905345 None
chip_sw_alert_handler_ping_ok 92533432291000952818071635940434852738139800001733499887275681294776842833658 None
chip_sw_alert_handler_reverse_ping_in_deep_sleep 17966579381963981846374135968492477659064163326697996706965487789338442030738 None
chip_sw_alert_handler_lpg_sleep_mode_alerts 46742124679465272726629320898911729348255423913019518752136473764867432025152 None
chip_sw_alert_handler_lpg_sleep_mode_pings 60680903561028105637652079818898691018794586024483806566880100006660047483597 None
chip_sw_alert_handler_lpg_clkoff 53227761141886624485413209593179389115540917668463911921378402863205285658587 None
chip_sw_alert_handler_lpg_reset_toggle 19796071603412323100865256620911719667105242587821008247376435904906656772073 None
chip_sw_alert_handler_entropy 59833274947679166214073572593157342833995155088887071315487648264078198016008 None
chip_sw_aes_entropy 23915105630656122602670053909272009215112464251376957032753515681536138727229 None
chip_sw_entropy_src_kat_test 54076346094883695862662277300781665370272064633221899834648712577607919906336 None
chip_sw_edn_auto_mode 91716029867448121226010857201280382331369690323571140056653231122020351287484 None
chip_sw_edn_boot_mode 52152310939333081273656440854207335342378429826290211984540815889597491518318 None
chip_sw_edn_kat 71621002618590604909111040955556476089832785329863370329683922039895258705476 None
chip_sw_edn_sw_mode 111234668588753007314143928380577572577004512216708201928847115372868693248591 None
chip_sw_csrng_lc_hw_debug_en_test 114612461220729674131606664839970613092202531760255584371063443681954424117576 None
chip_sw_csrng_edn_concurrency 44617314836969944217071742714946052045196138251788064236599166260727367235792 None
chip_sw_csrng_kat_test 81680885282291177521825043406978289384291570258155386311435545481639352481219 None
chip_sw_csrng_fuse_en_sw_app_read_test 47151141456051317010766542581264439866957613177942364887794537069238663804475 None
chip_sw_entropy_src_ast_rng_req 47331054889149492057021359721580999471866320086925872644071624185723896707918 None
chip_sw_entropy_src_csrng 62554065691932390070634946836576030242394186426833293115470289853891999406232 None
chip_sw_edn_entropy_reqs 63586041703419717922822108094142408545799441341432916975827214124081662938906 None
chip_sw_edn_entropy_reqs_jitter 50203284747915475110799133031166376117834202251038140944126068434311213742390 None
chip_sw_hmac_enc 3434165875875508222624596497926038085024916294355931201977583524141059081056 None
chip_sw_hmac_enc_jitter_en 78080479980926941486426301859577518408250589153572607055645394307951190976276 None
chip_sw_hmac_enc_idle 104608215915003776305355641811932898375379498860512927289451612039966321386998 None
chip_sw_hmac_oneshot 27616789666876714984562522016103632229827180723038469620523357881625785222723 None
chip_sw_hmac_multistream 70031776098380042387347634112649365165214294738202352721724700165328219742234 None
chip_sw_keymgr_key_derivation 35818674694799713870931520602947354833362025690320541219056961118296119052463 None
chip_sw_keymgr_key_derivation_prod 51644350672570290816704182639772101571420593946118576429097570586157174045574 None
chip_sw_keymgr_key_derivation_jitter_en 3106481946831916896868365434619629351880608037990804267833874226017199837971 None
chip_sw_keymgr_sideload_kmac 10863184177914088135744268060057665827840096777345175166957948051112837867510 None
chip_sw_keymgr_sideload_aes 77646611864727503588489202354544682813081680882198332183690379919044833988625 None
chip_sw_keymgr_sideload_otbn 101912806735872018935571522033069040985862240090431812994910636304263943180563 None
chip_sw_kmac_mode_cshake 66466013191265238895150554352493247074872057707348870296458015620055829968347 None
chip_sw_kmac_mode_kmac 23400307739954794837554998605105459894738566844472800200346534318531547551264 None
chip_sw_kmac_mode_kmac_jitter_en 39491372149360146074329851688724645231442970273845797508806560148150426202498 None
chip_sw_kmac_app_rom 13534196089483157336651671705401868825358236857187984323210168290909116006759 None
chip_sw_kmac_idle 77590147504042832273590841747401073472942274067431587911859621404683793876456 None
chip_sw_rom_ctrl_integrity_check 103800006920056850442236501460249941487423203060243217664588221033004893475924 None
chip_sw_sram_ctrl_scrambled_access 5125628708528382041765298996957989930210169000611012185746108660129013331290 None
chip_sw_sram_ctrl_scrambled_access_jitter_en 85328714195724104796553479300369049397329494220055291141619451891897323979532 None
chip_sw_sram_ctrl_execution_main 105348504373712698990134308805129237306916612132235319721795676982514285626110 None
chip_sw_sleep_sram_ret_contents_no_scramble 91221603723942381681814792650710116768223417727121973716078807205508150123630 None
chip_sw_sleep_sram_ret_contents_scramble 19989212417891723069625445565136969901886417982376441500770170708583984899323 None
chip_sw_sensor_ctrl_alert 43612230996772101476304337868384238070228780674155658836524942023025262681807 None
chip_sw_sensor_ctrl_status 72058464080076653109855415978016960966194472750004896566694549417391492124407 None
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 76644825066000124236117153055321544810015185305194166489342630758155174650653 None
chip_sw_coremark 19331189700663157597791678077285872047694218275190085398832886307385999350107 None
chip_sw_pwrmgr_b2b_sleep_reset_req 44873978514937278281075957779871102434948919577239719277137712533336864932960 None
chip_tl_errors 9653056702340161480247733597907836980783978884414267823878724478787364799305 None
chip_prim_tl_access 9026697212828627662581549920596454373689902904586261773471130527631722735770 None
chip_plic_all_irqs_0 108302002867670745909896584249965141444254231210111524039557324248836946460784 None
chip_plic_all_irqs_10 33832567433171425905291913080408544568338039142974127968229832773504962040878 None
chip_plic_all_irqs_20 45793247522712990339876030452831378840964994179439849445459645545069213523019 None
chip_sw_plic_sw_irq 102614445988125987272002958031378675192619887545028177356444015211869333139091 None
chip_sw_clkmgr_off_peri 98599521023062149619131140053062766569846446053781939029319975340441641004861 None
chip_sw_clkmgr_off_aes_trans 106123642963797972988874802086642855489633140707547895338501608664827054740736 None
chip_sw_clkmgr_off_hmac_trans 97023627013790932645039978190815337346013223675571655483034359569937063043821 None
chip_sw_clkmgr_off_kmac_trans 87270806506361706732180648518737244491221282568761529256306274385217041706029 None
chip_sw_clkmgr_off_otbn_trans 48212716777815590472010856172160339299353988544596176851606246088024431928009 None
chip_sw_clkmgr_external_clk_src_for_lc 105867520797047648833344049554269594596454128093880100506476400592729916271225 None
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 44442664104953148748004050730425044025358991301804581865900967862678717408570 None
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 111906975798839839768900026320081270974166391190731543927479336801188908418024 None
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 24278030612997040522561409750313611753665090545993823144533631853230698767399 None
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 21960039378829073397829141610922034105173204692726085718217021686373157448506 None
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 52756138041972740054380160288755880704110382757258387377854974606093437998954 None
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 112311137814684939582955024503250876546272499122822872616525229746988401626252 None
chip_sw_clkmgr_reset_frequency 80458243236555682304742506877059899975862115994571269413778791854878032252877 None
chip_sw_clkmgr_jitter_frequency 76138174999165655929287856280786649116399384885220357724601030596786622836472 None
chip_sw_clkmgr_jitter 109096511652168152243147159053041472406714145055306698760411181762330870354975 None
chip_sw_clkmgr_sleep_frequency 44154856953199026559584075384917400546656812096721124573514198381226217594729 None
chip_jtag_csr_rw 14190250225008463077006461086200217402555668346208756216523633594534183848050 None
chip_jtag_mem_access 111693093675644731856603112456092450860912628561148483316212500773422537643458 None
chip_sw_ast_clk_outputs 71143172377938603592465833215950512815828771429664131481609171571718961591296 None
chip_sw_lc_ctrl_program_error 76736409022744488544639467426161785397254215253856159051568057670496619515527 None
chip_sw_pwrmgr_normal_sleep_all_wake_ups 47066110227004789016239000012040298739892729019817525279097434223934819107897 None
chip_sw_pwrmgr_lowpower_cancel 96110314978701057306235029934250592624139114088691785958830585516945605039470 None
chip_sw_pwrmgr_deep_sleep_all_wake_ups 20998832778353158916309076736290322394447996099344445964982867791241617671271 None
chip_sw_pwrmgr_random_sleep_all_wake_ups 86584779346779176284155247694191015257982388576380018454394679633396188908060 None
chip_sw_pwrmgr_sleep_wake_5_bug 63588709942287204793192465229383304559236840319102562225863813009761561785852 None
chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up 2896491222764672629348523616563487652185661565921335844906889306161389950370 None
chip_rv_dm_ndm_reset_req 104863030218174726749532163741819212920306441426854113245842123017573428827836 None
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 37818927804711839167684210839449976840287757314546994894995177809171960247719 None
chip_sw_rv_dm_access_after_wakeup 81462775232865529969335859736317327019028689311409720343911532643744066464751 None
chip_sw_rv_dm_access_after_escalation_reset 86374156717406417936448147477827695291255810343822793118555747848629312176586 None
chip_tap_straps_dev 22478671827217743066773664795943732814446885001740679758971590935860889781196 None
chip_tap_straps_testunlock0 21761593791224332418877088615583724894587076439306690622664465045883406770524 None
chip_tap_straps_rma 89208919086568078778764130743697000976569941432971446767374160899166311198193 None
chip_tap_straps_prod 99875118823167934325198266011349036858050000752417504552899495049635868324624 None
chip_rv_dm_lc_disabled 57104975657219684145986388553392112608449682631156813622970912237834676150760 None
chip_sw_rv_core_ibex_address_translation 56753049376368648012420878860004362881211305509857896287262043635429983639856 None
chip_sw_rv_core_ibex_lockstep_glitch 107504022442706541079116746922103354038137427779500555369928860552444543893815 None
chip_sw_rv_core_ibex_icache_invalidate 58984922796406833973212822079648783905201709826977778186171100535630547243012 None
chip_sw_rv_core_ibex_mcounteren_writable 37135799323748312772087060352621571595534428026500292856726177418586042181770 None
chip_sw_usb_ast_clk_calib 98921594420727636224908232914523599480432486296857737828682352806098380051936 None
chip_sw_flash_crash_alert 51874682573804125538094517056670832506050063134834502790382268987117389831150 None
chip_sw_flash_ctrl_write_clear 96673677926082164948208344862433957011222060907499169160791343412184950522011 None
chip_padctrl_attributes 59649715936661831352013025978350392480134354042068743116042640985820613915647 None
chip_sw_clkmgr_jitter_reduced_freq 46792158075234205297525973254166981742488507272850265883759988704802718333223 None
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq 99328870531799856352908428787990040340389840517310840006269606536287714726782 None
chip_sw_flash_ctrl_access_jitter_en_reduced_freq 73973125574266826713032678719708168971655391489503774023256436050805839883209 None
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq 69671854338048825263455257044965882043812497819632982730325386859253133878343 None
chip_sw_aes_enc_jitter_en_reduced_freq 112238363095035706420414277854118427765150902045319887184805827481096745434139 None
chip_sw_hmac_enc_jitter_en_reduced_freq 42165013662425390710814858655224077739946673730695915323900801344004277890435 None
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq 88623351387555444569598361106170825064008310449036161287684210923155499043959 None
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq 27067314860283282566349812024594699340034119102810749613364369991461714620335 None
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq 69045461487454891482045047158174519761356909805456386537778036479050768622563 None
chip_sw_flash_init_reduced_freq 99095508629400459757026964996338444545510172051332599940966486085590824964977 None
chip_sw_csrng_edn_concurrency_reduced_freq 26512543877180880330607055312137117341299668425235876878436852107569128854997 None
chip_sw_power_idle_load 39182495082338878299307974821449165984878039967834731559442231043528900072467 None
chip_sw_power_sleep_load 45584832211500518733706151463617105236841389733278266827224475246369177762556 None
chip_sw_ast_clk_rst_inputs 25776840055780977835828046776491449084863055413200560716760358105580158561319 None
chip_sw_power_virus 109626004572218864592348360867904238819408332774492206578480339894299891989557 None
chip_sw_flash_scrambling_smoketest 114603228776071513878887295626670700403552242823974185129809523180399364529429 None
chip_sw_flash_ctrl_mem_protection 98483820297704472494894240333847095119424638471462138384261184808826199048347 None
ate_bootstrap_flash_erase 47562489525860583223118565148480847709219206577650376640721983544090702369079 None
ate_bootstrap_one_frame 106326450672030331408820894889972433143908169064959162200897183722902404579792 None
ate_bootstrap_disjoint 73733853637857197968302735985404769316376090989497618263674314425060079564302 None
rom_e2e_smoke 87115540029718341007445297166635598636205811543260847587178780334796109886554 None
rom_e2e_shutdown_exception_c 8343235436723413944428018138412257182392572404962297323001636336844435733976 None
rom_e2e_shutdown_output 93743064597250191852377432007039790970052467822661737043673555087995261407505 None
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 100632977708408082791686276039287669922292151938901406662225763091582374396302 None
rom_e2e_boot_policy_valid_a_good_b_good_dev 102345492719122991571647297593617996127710166050541675473119407254708899860202 None
rom_e2e_boot_policy_valid_a_good_b_good_prod 83969088119216756271474324824669414876093123467837320167844643313541263430268 None
rom_e2e_boot_policy_valid_a_good_b_good_prod_end 38482640250639260366624589612162916685045272541042031454933770690006213441709 None
rom_e2e_boot_policy_valid_a_good_b_good_rma 75649537054272728432756770878226136527956432715919895686974027324664727673733 None
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 43691461852601357417938253613334920281664989195498025983945597163998837202952 None
rom_e2e_boot_policy_valid_a_good_b_bad_dev 75012295647534455267431615193003108866850378869201642936836095027837437364759 None
rom_e2e_boot_policy_valid_a_good_b_bad_prod 29804281078697520163581048062138517085953235065691779436218181951445070235535 None
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end 11124454084081398611693399462297935058614916550105590387909779779306332389202 None
rom_e2e_boot_policy_valid_a_good_b_bad_rma 25498370691587844246441572237400620294397797330689456756889075235843284088884 None
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 48388387716376129828553291759452485647695211509104824923864248830290581741304 None
rom_e2e_boot_policy_valid_a_bad_b_good_dev 13950203845217570889450848121945863357736073546774487264159311758619905780970 None
rom_e2e_boot_policy_valid_a_bad_b_good_prod 95484415777352467727915947447909843171395473910165132192554351410858317446892 None
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end 74245409281623108859969957416928791870437462288321374911597426560728260749209 None
rom_e2e_boot_policy_valid_a_bad_b_good_rma 76378940258565190849921317260431279249602714332048943280124494504465468067524 None
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 77628439992008569842672920845960295023762760746767900427894815392173044262938 None
rom_e2e_sigverify_always_a_bad_b_bad_dev 5777383960821806448073074032522541164262242840258357514318351614872469362909 None
rom_e2e_sigverify_always_a_bad_b_bad_prod 107540396917546334897865987521936205707228461138599398095445433933090197363841 None
rom_e2e_sigverify_always_a_bad_b_bad_prod_end 96136461205308357835638534560568868666103573737512991983562408653145217762776 None
rom_e2e_sigverify_always_a_bad_b_bad_rma 24596922239149810574011628099798246336400073167104807372576866379215900959515 None
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 28422688583786992095542475437439113885708682629395280424597408640282861581940 None
rom_e2e_sigverify_always_a_bad_b_nothing_dev 102211371289683181340359020908398308753985684625040989042803904816489871109388 None
rom_e2e_sigverify_always_a_bad_b_nothing_prod 10415052048067923025302631245184810847452623515908509641419530771835862119856 None
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end 57753032960955756690406105071887291636754891860038251142680772378185834317886 None
rom_e2e_sigverify_always_a_bad_b_nothing_rma 4183139618614388627310235963814299885445377663923780323457189277829314370299 None
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 106941268236934910854395105543931872596479005452684025061626898372408196126436 None
rom_e2e_sigverify_always_a_nothing_b_bad_dev 37956382321825228685892201942225087093877728902959067289086492169807225512052 None
rom_e2e_sigverify_always_a_nothing_b_bad_prod 95656065264139096353866561235396650075204741981015528170829434573678719678830 None
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end 11844617841687382470239276701593442358538392612403216534692150704511584051504 None
rom_e2e_sigverify_always_a_nothing_b_bad_rma 27214610469009370606986371707252026265064825485761518232037081141043771847924 None
rom_e2e_asm_init_test_unlocked0 107294377808336074390297003027998427478196648987847319279787032131406691197584 None
rom_e2e_asm_init_dev 91580907854813451049727932889625944048754821452241441257036371552274507776676 None
rom_e2e_asm_init_prod 50939603876831966769679241504668988507351858684797558101107025818120165789734 None
rom_e2e_asm_init_prod_end 62150231992022687070470429556549519782532272551068087741118245210431069501347 None
rom_e2e_asm_init_rma 107681053057943439174973049269932123619493378666840667706961966328737929150237 None
rom_e2e_jtag_debug_test_unlocked0 72155811637598723699450303921349991420878932676657861573119053269228965356803 None
rom_e2e_jtag_debug_dev 104214478481403073384772333279699709446693820156614108583751396142871303070455 None
rom_e2e_jtag_debug_rma 62455317416097940747938339419987221974478107008569661498163856742130469813837 None
rom_e2e_jtag_inject_test_unlocked0 114563249735828889872487266266064873611367578455156970695260127941269169316030 None
rom_e2e_jtag_inject_dev 92195680128670875370626124900266444151818289210726238695234416128617569165516 None
rom_e2e_jtag_inject_rma 31704863419170385305091197857687743631905326982734734933223487382781082371065 None
rom_e2e_static_critical 79276877721704008167406534674421950105991021621469603949020556307557769253898 None
rom_e2e_keymgr_init_rom_ext_meas 95258106877337629193770730009882359048784440365062760721664038638256756737510 None
rom_e2e_keymgr_init_rom_ext_no_meas 4025998377895149778979389652641977294018871691145699949790895938349562613980 None
rom_e2e_keymgr_init_rom_ext_invalid_meas 27466587888332621589637824589440184453847671952951797012841613312606096247092 None
rom_volatile_raw_unlock 85532961040028343191424519082533406771139329983535429427321447207709494191671 None
rom_raw_unlock 58427802728387027124672737104030770746318566540733798999615969674385559122551 None
rom_e2e_self_hash 46672767075281033688449776446717964491522339487198036577483529369094777631240 None
rom_keymgr_functest 1844756062771868683217915868673795539359830039552737382244879357789934179307 None
chip_sw_aes_smoketest 75422783593364354609492682771507584357026978845479845756194694831496083325101 None
chip_sw_aon_timer_smoketest 26014831983337316457750861869614205218704213898201591352636167207196594190633 None
chip_sw_clkmgr_smoketest 104839803192861473606483973015311838075631161892520529966632023537152592512355 None
chip_sw_csrng_smoketest 22208351923468719923203963001730980580056656232106323099899152113982955166696 None
chip_sw_entropy_src_smoketest 12400775282202558422760411085844348363715464168103803931570709056140296184100 None
chip_sw_gpio_smoketest 70662280422985732114251163324421803493577838074758896277065549585759478530304 None
chip_sw_hmac_smoketest 48223283449881784068903160983296007549761775476077670783693208154883351998254 None
chip_sw_kmac_smoketest 52007620712367172848193731395122167950223578134033677181555586340653542245701 None
chip_sw_otbn_smoketest 98703523723371427983423285285931683020459271942701929662249280480398214589422 None
chip_sw_otp_ctrl_smoketest 8735090570041815751359186226626395887579495775613176710881093004489437536079 None
chip_sw_pwrmgr_smoketest 232839896758661082367917344539481319339425645226112328769314713784071149233 None
chip_sw_pwrmgr_usbdev_smoketest 68693048675532147296029922910020745169828141718382672495861062659623364403791 None
chip_sw_rv_plic_smoketest 38889295573184371578025220266483407289297259997826770289619530294844735805574 None
chip_sw_rv_timer_smoketest 68097474206798022716061368881196636988192253128883344403303006654181880627269 None
chip_sw_rstmgr_smoketest 10680005027150728102912409334193230393048299748023966249596148905005565962483 None
chip_sw_sram_ctrl_smoketest 105643626063901317052561882561125069538228455036151454492573583101976483407986 None
chip_sw_uart_smoketest 53472299228769960877663550825001679724430062389322800711726566350256508880818 None
xbar_smoke 102228380249977567707523110779464231032883577362006464261921912524975419874244 None
xbar_smoke_zero_delays 45868368429178311652620855606408630036793514836287227039726867856335927102188 None
xbar_smoke_large_delays 111880118672908550687687719601960587456615629477180522007724505603018216108640 None
xbar_smoke_slow_rsp 101718810850166797150011762689561537047563739403232461963422428204513165809035 None
xbar_random 78429737228100044727676490353087664421109034435952263687710107625359220473680 None
xbar_random_zero_delays 14470771952095419900106335451824034531813386452018319343265951081764022569728 None
xbar_random_large_delays 77685668856531650970271806333814740180644160725945770865674504804624179520144 None
xbar_random_slow_rsp 30021176133838634434352723936750723780908541447836424168764696377367841347289 None
xbar_access_same_device 4204782534153635299271124227358131741960699781558734972332792502567167091076 None
xbar_access_same_device_slow_rsp 72238260871172690360294911301463825029608025928956482114947854815432084539059 None
xbar_same_source 92128580723216108656704886571737085282020711238759290121326018467748149350069 None
xbar_error_random 113799255232811237088898983982713869771803704432044769238828245201049649884464 None
xbar_unmapped_addr 92448715138002921967816852337992033919362088966582617896556483219523935713822 None
xbar_error_and_unmapped_addr 109036680755463221231784229836248521502418601885749450626853070472372321453687 None
xbar_stress_all 77338498669189146765431266713649306534906250056360006622380296718751173980888 None
xbar_stress_all_with_rand_reset 87282525455382454641121851281347720157527625530985507259125651945592419755544 None
xbar_stress_all_with_error 39865190502053073454476520564261483221008239143261978845555036296110465154595 None
xbar_stress_all_with_reset_error 17907059576399503624318097055774987296519173368222912166912239531260019224936 None
chip_csr_hw_reset 28225307910762603854365153559822521200582871678571182547230939517834748445680 None
chip_csr_rw 25181606262025049946215179794482141120895423289942267211218928036559100559313 None
chip_csr_mem_rw_with_rand_reset 86505750845932309814397302888847630378946919185323055502307683712271971698447 None
chip None None
Error-[SE] Syntax error 4 test runs
cover_reg_top None 3084
Following verilog source has syntax error :
Select on function call
"src/lowrisc_dv_rram_ctrl_bkdr_util_0.1/rram_ctrl_otp_bkdr_util.sv", 149:
token is ']'
default None 3086
Following verilog source has syntax error :
Select on function call
"src/lowrisc_dv_rram_ctrl_bkdr_util_0.1/rram_ctrl_otp_bkdr_util.sv", 149:
token is ']'
pad_ctrl_test_mode None 3084
Following verilog source has syntax error :
Select on function call
"src/lowrisc_dv_rram_ctrl_bkdr_util_0.1/rram_ctrl_otp_bkdr_util.sv", 149:
token is ']'
xbar_build_mode None 3086
Following verilog source has syntax error :
Select on function call
"src/lowrisc_dv_rram_ctrl_bkdr_util_0.1/rram_ctrl_otp_bkdr_util.sv", 149:
token is ']'
Job cancelled because all of its dependencies failed or were killed. 1 test run
chip None None