Simulation Results: gpio

 
18/08/2026 15:30:28 DVSim: v1.50.1 sha: 2c5d921 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.58 %
  • code
  • 94.01 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 98.70 %
  • toggle
  • 77.78 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.050s 179.874us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.520s 60.084us 1 1 100.00
gpio_smoke_en_cdc_prim 1.070s 102.907us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.430s 1684.704us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.810s 34.031us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.690s 33.068us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.310s 662.821us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.900s 66.802us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.430s 59.569us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.690s 33.068us 1 1 100.00
gpio_csr_aliasing 0.900s 66.802us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.140s 1232.507us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.250s 102.543us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.830s 51.496us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.160s 115.208us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 2.700s 98.602us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.120s 286.685us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 6.180s 377.842us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 3.310s 817.495us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.050s 335.820us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 13.090s 3933.452us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.740s 23.807us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.630s 18.098us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 1.860s 874.214us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 1.860s 874.214us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.690s 33.068us 1 1 100.00
gpio_same_csr_outstanding 0.880s 24.281us 1 1 100.00
gpio_csr_aliasing 0.900s 66.802us 1 1 100.00
gpio_csr_hw_reset 0.810s 34.031us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.690s 33.068us 1 1 100.00
gpio_same_csr_outstanding 0.880s 24.281us 1 1 100.00
gpio_csr_aliasing 0.900s 66.802us 1 1 100.00
gpio_csr_hw_reset 0.810s 34.031us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 0.980s 317.710us 1 1 100.00
gpio_sec_cm 0.880s 272.044us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 0.980s 317.710us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.670s 43.869us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 8.890s 2181.434us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:211) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 64624641419726384653530368574581167537357324827787825159862526882589426936306 565
UVM_INFO @ 3933452471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 101043542814015923823090423168291999230147495801113142066902361565344483914577 298
UVM_INFO @ 2181433503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---