Simulation Results: aes/unmasked

 
19/08/2026 15:30:27 DVSim: v1.50.1 sha: e688e72 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 86.88 %
  • code
  • 90.25 %
  • assert
  • 97.73 %
  • func
  • 72.66 %
  • block
  • 90.16 %
  • line
  • 92.56 %
  • branch
  • 81.74 %
  • toggle
  • 97.82 %
  • FSM
  • 88.89 %
Validation stages
V1
100.00%
V2
94.12%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 1.000s 115.587us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 183.527us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 1.000s 118.161us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 98.015us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 7.000s 1607.293us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 96.659us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 71.297us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 98.015us 1 1 100.00
aes_csr_aliasing 3.000s 96.659us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 183.527us 1 1 100.00
aes_config_error 2.000s 128.862us 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 183.527us 1 1 100.00
aes_config_error 2.000s 128.862us 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 105.782us 1 1 100.00
aes_b2b 5.000s 248.716us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 2.000s 183.527us 1 1 100.00
aes_config_error 2.000s 128.862us 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
aes_alert_reset 2.000s 79.855us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 75.815us 1 1 100.00
aes_config_error 2.000s 128.862us 1 1 100.00
aes_alert_reset 2.000s 79.855us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 2.000s 258.473us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 5.000s 2277.901us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 2.000s 79.855us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 105.782us 1 1 100.00
aes_sideload 3.000s 153.707us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 2.000s 57.251us 1 1 100.00
stress_all 0 1 0.00
aes_stress_all 3.000s 175.230us 0 1 0.00
alert_test 1 1 100.00
aes_alert_test 2.000s 143.255us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 128.745us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 128.745us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 1.000s 118.161us 1 1 100.00
aes_csr_rw 1.000s 98.015us 1 1 100.00
aes_csr_aliasing 3.000s 96.659us 1 1 100.00
aes_same_csr_outstanding 1.000s 71.546us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 1.000s 118.161us 1 1 100.00
aes_csr_rw 1.000s 98.015us 1 1 100.00
aes_csr_aliasing 3.000s 96.659us 1 1 100.00
aes_same_csr_outstanding 1.000s 71.546us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 0 1 0.00
aes_reseed 1.000s 30.479us 0 1 0.00
fault_inject 2 3 66.67
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_cipher_fi 1.000s 83.756us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 169.688us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 169.688us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 169.688us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 169.688us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 2.000s 254.363us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 2.000s 1452.978us 1 1 100.00
aes_tl_intg_err 2.000s 129.119us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 129.119us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 2.000s 79.855us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 169.688us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 169.688us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 2.000s 183.527us 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
aes_alert_reset 2.000s 79.855us 1 1 100.00
aes_core_fi 2.000s 69.359us 1 1 100.00
sec_cm_gcm_config_sparse 3 3 100.00
aes_config_error 2.000s 128.862us 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
aes_core_fi 2.000s 69.359us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 169.688us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 1.000s 79.357us 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 105.782us 1 1 100.00
aes_sideload 3.000s 153.707us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 1.000s 79.357us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 1.000s 79.357us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 1.000s 79.357us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 1.000s 79.357us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 1.000s 79.357us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 105.782us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 2.000s 359.092us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_cipher_fi 1.000s 83.756us 1 1 100.00
aes_ctr_fi 1.000s 50.356us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 2.000s 359.092us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_cipher_fi 1.000s 83.756us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 1.000s 83.756us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 2.000s 359.092us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_ctr_fi 1.000s 50.356us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 2.000s 359.092us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_cipher_fi 1.000s 83.756us 1 1 100.00
aes_ctr_fi 1.000s 50.356us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 2.000s 79.855us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_cipher_fi 1.000s 83.756us 1 1 100.00
aes_ctr_fi 1.000s 50.356us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_cipher_fi 1.000s 83.756us 1 1 100.00
aes_ctr_fi 1.000s 50.356us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_ctr_fi 1.000s 50.356us 1 1 100.00
sec_cm_ghash_fsm_local_esc 0 1 0.00
aes_fi 2.000s 359.092us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 2.000s 359.092us 0 1 0.00
aes_control_fi 1.000s 71.324us 1 1 100.00
aes_cipher_fi 1.000s 83.756us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 13.000s 1417.175us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 3 test runs
aes_reseed 16252124671743582013954513550504510277396584831558529428505546324727698056000 2614
UVM_INFO @ 30479052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 72372788975459439597780022553660398559853797510868165482105807900175824038499 6083
UVM_INFO @ 175230302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 110754744543978392348209781316905910877801076033389756710512093789838378663692 914
UVM_INFO @ 1417175381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] 1 test run
aes_fi 9231808568038859258971506483384068233774882664119348982585130875790352223020 5837
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 1
----| Expected corrupted: 0