Simulation Results: rstmgr_cnsty_chk

 
19/08/2026 15:30:27 DVSim: v1.50.1 sha: e688e72 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.81 %
  • code
  • 95.61 %
  • assert
  • 100.00 %
  • line
  • 98.46 %
  • branch
  • 98.39 %
  • cond
  • 88.89 %
  • toggle
  • 100.00 %
  • FSM
  • 92.31 %
Validation stages
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
rstmgr_cnsty_chk_test 2.430s 10492.080us 1 1 100.00