Simulation Results: aes/masked

 
26/08/2026 15:30:29 DVSim: v1.52.0 sha: 31e43cb json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 88.65 %
  • code
  • 93.52 %
  • assert
  • 98.23 %
  • func
  • 74.19 %
  • block
  • 94.09 %
  • line
  • 95.80 %
  • branch
  • 86.97 %
  • toggle
  • 97.99 %
  • FSM
  • 93.33 %
Validation stages
V1
100.00%
V2
94.12%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 98.340us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 789.865us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 59.452us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 74.488us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 9.000s 842.056us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 279.009us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 54.551us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 74.488us 1 1 100.00
aes_csr_aliasing 3.000s 279.009us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 789.865us 1 1 100.00
aes_config_error 5.000s 632.083us 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 789.865us 1 1 100.00
aes_config_error 5.000s 632.083us 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
back2back 2 2 100.00
aes_stress 5.000s 754.826us 1 1 100.00
aes_b2b 6.000s 104.898us 1 1 100.00
backpressure 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 789.865us 1 1 100.00
aes_config_error 5.000s 632.083us 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
aes_alert_reset 3.000s 71.090us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 56.082us 1 1 100.00
aes_config_error 5.000s 632.083us 1 1 100.00
aes_alert_reset 3.000s 71.090us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 93.315us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 10.000s 1136.323us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 3.000s 71.090us 1 1 100.00
stress 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
sideload 2 2 100.00
aes_stress 5.000s 754.826us 1 1 100.00
aes_sideload 8.000s 576.666us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 301.473us 1 1 100.00
stress_all 0 1 0.00
aes_stress_all 8.000s 589.700us 0 1 0.00
alert_test 1 1 100.00
aes_alert_test 3.000s 61.814us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 171.615us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 171.615us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 59.452us 1 1 100.00
aes_csr_rw 2.000s 74.488us 1 1 100.00
aes_csr_aliasing 3.000s 279.009us 1 1 100.00
aes_same_csr_outstanding 2.000s 91.995us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 59.452us 1 1 100.00
aes_csr_rw 2.000s 74.488us 1 1 100.00
aes_csr_aliasing 3.000s 279.009us 1 1 100.00
aes_same_csr_outstanding 2.000s 91.995us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 0 1 0.00
aes_reseed 4.000s 281.855us 0 1 0.00
fault_inject 2 3 66.67
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_cipher_fi 2.000s 55.944us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 3.000s 237.822us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 3.000s 237.822us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 3.000s 237.822us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 3.000s 237.822us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 2.000s 225.691us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 3.000s 787.462us 1 1 100.00
aes_tl_intg_err 4.000s 492.884us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 4.000s 492.884us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 3.000s 71.090us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 237.822us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 237.822us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 789.865us 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
aes_alert_reset 3.000s 71.090us 1 1 100.00
aes_core_fi 4.000s 95.368us 1 1 100.00
sec_cm_gcm_config_sparse 3 3 100.00
aes_config_error 5.000s 632.083us 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
aes_core_fi 4.000s 95.368us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 237.822us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 75.848us 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 5.000s 754.826us 1 1 100.00
aes_sideload 8.000s 576.666us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 75.848us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 75.848us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 75.848us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 75.848us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 75.848us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 5.000s 754.826us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 4.000s 92.294us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_cipher_fi 2.000s 55.944us 1 1 100.00
aes_ctr_fi 2.000s 52.320us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 4.000s 92.294us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_cipher_fi 2.000s 55.944us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 55.944us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 4.000s 92.294us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_ctr_fi 2.000s 52.320us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 4.000s 92.294us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_cipher_fi 2.000s 55.944us 1 1 100.00
aes_ctr_fi 2.000s 52.320us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 3.000s 71.090us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_cipher_fi 2.000s 55.944us 1 1 100.00
aes_ctr_fi 2.000s 52.320us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_cipher_fi 2.000s 55.944us 1 1 100.00
aes_ctr_fi 2.000s 52.320us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_ctr_fi 2.000s 52.320us 1 1 100.00
sec_cm_ghash_fsm_local_esc 0 1 0.00
aes_fi 4.000s 92.294us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 4.000s 92.294us 0 1 0.00
aes_control_fi 3.000s 54.686us 1 1 100.00
aes_cipher_fi 2.000s 55.944us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 8.000s 248.796us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 3 test runs
aes_reseed 43650960139557344948225129629553820857466722345331351586354890359910268831499 3294
UVM_INFO @ 281854933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 5641999679642739727905697335471235009511320755301521432457177897118372851239 36879
UVM_INFO @ 589700387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 107030805280801528797824254972477495132312510621814963280479077691861096885407 235
UVM_INFO @ 248795702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] 1 test run
aes_fi 106827161859633895392806593795919774974843766793100613344662799495239457394778 12291
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0