Simulation Results: gpio

 
26/08/2026 15:30:29 DVSim: v1.52.0 sha: 31e43cb json Branch: master Tool: vcs [X-2025.06-SP2-1_Full64]
Coverage statistics
  • Total
  • 96.97 %
  • code
  • 94.08 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 98.85 %
  • toggle
  • 77.92 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.070s 115.172us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.280s 83.662us 1 1 100.00
gpio_smoke_en_cdc_prim 1.780s 289.960us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.210s 93.488us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.980s 89.154us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.910s 51.516us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.830s 161.381us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.970s 12.764us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.060s 18.048us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.910s 51.516us 1 1 100.00
gpio_csr_aliasing 0.970s 12.764us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.270s 83.620us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.060s 16.994us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.890s 80.054us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 0.990s 45.517us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 2.920s 141.560us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.660s 309.181us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 17.040s 1233.845us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 3.820s 1949.879us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.310s 212.149us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 21.980s 6161.240us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.890s 15.132us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.810s 20.672us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.790s 162.675us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.790s 162.675us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.910s 51.516us 1 1 100.00
gpio_same_csr_outstanding 1.140s 36.085us 1 1 100.00
gpio_csr_aliasing 0.970s 12.764us 1 1 100.00
gpio_csr_hw_reset 0.980s 89.154us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.910s 51.516us 1 1 100.00
gpio_same_csr_outstanding 1.140s 36.085us 1 1 100.00
gpio_csr_aliasing 0.970s 12.764us 1 1 100.00
gpio_csr_hw_reset 0.980s 89.154us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.810s 444.609us 1 1 100.00
gpio_sec_cm 1.170s 151.001us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.810s 444.609us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.800s 52.812us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 1.430s 107.457us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:211) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 38069480748077752156688776301218768621044589859896486839451062485096688161445 1014
UVM_INFO @ 6161239572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 44762533314221900331125238345911166759163078074778262124289141179401991246479 86
UVM_INFO @ 107457268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---