Simulation Results: gpio

 
27/08/2026 15:30:28 DVSim: v1.52.0 sha: dea2a08 json Branch: master Tool: vcs [X-2025.06-SP2-1_Full64]
Coverage statistics
  • Total
  • 97.27 %
  • code
  • 94.05 %
  • assert
  • 97.78 %
  • func
  • 99.99 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 98.27 %
  • toggle
  • 78.35 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.340s 68.624us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.290s 198.080us 1 1 100.00
gpio_smoke_en_cdc_prim 1.300s 30.711us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.090s 38.306us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.730s 14.445us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.760s 24.508us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 1.780s 98.397us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.910s 19.731us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.960s 53.503us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.760s 24.508us 1 1 100.00
gpio_csr_aliasing 0.910s 19.731us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.200s 107.365us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.150s 60.881us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 1.100s 314.575us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.190s 192.373us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 2.850s 481.747us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 3.410s 244.764us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 9.140s 910.225us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 6.940s 1170.873us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.950s 200.739us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 6.790s 1326.063us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.790s 35.097us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.770s 191.006us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 3.000s 163.333us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 3.000s 163.333us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.760s 24.508us 1 1 100.00
gpio_same_csr_outstanding 0.730s 89.451us 1 1 100.00
gpio_csr_aliasing 0.910s 19.731us 1 1 100.00
gpio_csr_hw_reset 0.730s 14.445us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.760s 24.508us 1 1 100.00
gpio_same_csr_outstanding 0.730s 89.451us 1 1 100.00
gpio_csr_aliasing 0.910s 19.731us 1 1 100.00
gpio_csr_hw_reset 0.730s 14.445us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.440s 335.313us 1 1 100.00
gpio_sec_cm 1.060s 46.663us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.440s 335.313us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.770s 100.326us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 0.940s 30.018us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:211) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 90696253954570650821734577868108678576568731330647743432164600394090784197154 84
UVM_INFO @ 1326063417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 39123387903443219691836847145961490026659661653233977834104445159571837244202 86
UVM_INFO @ 30017725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---