| V1 |
|
100.00% |
| V2 |
|
72.41% |
| V2S |
|
62.50% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| kmac_smoke | 55.860s | 74205.696us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| kmac_csr_hw_reset | 1.120s | 38.122us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| kmac_csr_rw | 1.120s | 31.685us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| kmac_csr_bit_bash | 9.860s | 3598.249us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| kmac_csr_aliasing | 1.720s | 135.456us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 2.600s | 82.840us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| kmac_csr_rw | 1.120s | 31.685us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 1.720s | 135.456us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| kmac_mem_walk | 0.990s | 42.796us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| kmac_mem_partial_access | 1.420s | 48.468us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 1 | 1 | 100.00 | |||
| kmac_long_msg_and_output | 574.830s | 10466.128us | 1 | 1 | 100.00 | |
| burst_write | 1 | 1 | 100.00 | |||
| kmac_burst_write | 530.590s | 49470.624us | 1 | 1 | 100.00 | |
| test_vectors | 8 | 8 | 100.00 | |||
| kmac_test_vectors_sha3_224 | 41.300s | 12286.419us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_256 | 37.560s | 2986.207us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_384 | 22.920s | 2222.434us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_512 | 17.530s | 4966.505us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_128 | 156.290s | 12774.553us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_256 | 132.500s | 11179.100us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac | 2.250s | 62.410us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac_xof | 2.260s | 479.514us | 1 | 1 | 100.00 | |
| sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 330.100s | 23828.021us | 1 | 1 | 100.00 | |
| app | 0 | 1 | 0.00 | |||
| kmac_app | 0.950s | 7.684us | 0 | 1 | 0.00 | |
| app_with_partial_data | 0 | 1 | 0.00 | |||
| kmac_app_with_partial_data | 1.100s | 23.582us | 0 | 1 | 0.00 | |
| entropy_refresh | 0 | 1 | 0.00 | |||
| kmac_entropy_refresh | 6.070s | 160.969us | 0 | 1 | 0.00 | |
| error | 1 | 1 | 100.00 | |||
| kmac_error | 241.570s | 63644.822us | 1 | 1 | 100.00 | |
| key_error | 0 | 1 | 0.00 | |||
| kmac_key_error | 1.090s | 10.415us | 0 | 1 | 0.00 | |
| sideload_invalid | 0 | 1 | 0.00 | |||
| kmac_sideload_invalid | 0.980s | 10.401us | 0 | 1 | 0.00 | |
| edn_timeout_error | 1 | 1 | 100.00 | |||
| kmac_edn_timeout_error | 28.660s | 506.730us | 1 | 1 | 100.00 | |
| entropy_mode_error | 1 | 1 | 100.00 | |||
| kmac_entropy_mode_error | 4.050s | 116.976us | 1 | 1 | 100.00 | |
| entropy_ready_error | 0 | 1 | 0.00 | |||
| kmac_entropy_ready_error | 0.950s | 3.617us | 0 | 1 | 0.00 | |
| lc_escalation | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.300s | 34.067us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| kmac_stress_all | 1.940s | 273.125us | 0 | 1 | 0.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| kmac_intr_test | 1.080s | 18.785us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| kmac_alert_test | 1.020s | 21.956us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 1.770s | 205.457us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 1.770s | 205.457us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 1.120s | 38.122us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 1.120s | 31.685us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 1.720s | 135.456us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.670s | 137.170us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 1.120s | 38.122us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 1.120s | 31.685us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 1.720s | 135.456us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.670s | 137.170us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.160s | 150.013us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.160s | 150.013us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.160s | 150.013us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.160s | 150.013us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 2.480s | 202.764us | 1 | 1 | 100.00 | |
| tl_intg_err | 1 | 2 | 50.00 | |||
| kmac_sec_cm | 1.340s | 84.576us | 0 | 1 | 0.00 | |
| kmac_tl_intg_err | 3.010s | 105.955us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| kmac_tl_intg_err | 3.010s | 105.955us | 1 | 1 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.300s | 34.067us | 0 | 1 | 0.00 | |
| sec_cm_sw_key_key_masking | 1 | 1 | 100.00 | |||
| kmac_smoke | 55.860s | 74205.696us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 330.100s | 23828.021us | 1 | 1 | 100.00 | |
| sec_cm_cfg_shadowed_config_shadow | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.160s | 150.013us | 1 | 1 | 100.00 | |
| sec_cm_fsm_sparse | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.340s | 84.576us | 0 | 1 | 0.00 | |
| sec_cm_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.340s | 84.576us | 0 | 1 | 0.00 | |
| sec_cm_packer_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.340s | 84.576us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_regwen | 1 | 1 | 100.00 | |||
| kmac_smoke | 55.860s | 74205.696us | 1 | 1 | 100.00 | |
| sec_cm_fsm_global_esc | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.300s | 34.067us | 0 | 1 | 0.00 | |
| sec_cm_fsm_local_esc | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.340s | 84.576us | 0 | 1 | 0.00 | |
| sec_cm_absorbed_ctrl_mubi | 0 | 1 | 0.00 | |||
| kmac_mubi | 14.480s | 1616.970us | 0 | 1 | 0.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 1 | 1 | 100.00 | |||
| kmac_smoke | 55.860s | 74205.696us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| kmac_stress_all_with_rand_reset | 52.480s | 1002.865us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. | 7 test runs | |||
| kmac_app | 81955161978568788187786124129124985239953498275445622406469517683783333974291 | 77 |
UVM_INFO @ 7684058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_app_with_partial_data | 10322462118936278884063676239867272021773684882625666463299510289741382970993 | 77 |
UVM_INFO @ 23581731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_refresh | 30341945083441821373460418560311147851370024332075343395345824557662459189927 | 79 |
UVM_INFO @ 160969163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_mubi | 46973889910156579559177658624349053276521636597844205250236554425991868818730 | 84 |
UVM_INFO @ 1616970158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_key_error | 61279717424579728505571602859351904937219353479356485058407330177476379893392 | 77 |
UVM_INFO @ 10414737 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_ready_error | 11271693638709416665338758317865233706456881938429381441197257948767471442369 | 77 |
UVM_INFO @ 3616941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_stress_all | 105937970697086633948503396542614240656596814664688508785201090866475780567050 | 85 |
UVM_INFO @ 273125221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). | 2 test runs | |||
| kmac_lc_escalation | 115494166202196470074715639476468868953953650333831930629007931855319878815744 | 77 |
UVM_INFO @ 34067261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_sec_cm | 108490427862023798368559441143827911171900842902937599536873812135846280308353 | 79 |
UVM_INFO @ 84575666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] | 1 test run | |||
| kmac_sideload_invalid | 31886818910293914252004924739762803346433052130585617006990572975304919657066 | 76 |
UVM_INFO @ 10400583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1296) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 1 test run | |||
| kmac_stress_all_with_rand_reset | 112499747752231223401300263862887470207426646325747617597265617437808619373542 | 98 |
UVM_INFO @ 1002864509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|