Simulation Results: gpio

 
02/09/2026 15:30:33 DVSim: v1.52.0 sha: e5cd915 json Branch: master Tool: vcs [X-2025.06-SP2-1_Full64]
Coverage statistics
  • Total
  • 96.94 %
  • code
  • 93.97 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 98.27 %
  • toggle
  • 78.07 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.680s 41.757us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.100s 53.986us 1 1 100.00
gpio_smoke_en_cdc_prim 1.260s 104.221us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.290s 31.602us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.920s 31.536us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.870s 32.512us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 4.090s 482.746us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.920s 12.590us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.190s 59.314us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.870s 32.512us 1 1 100.00
gpio_csr_aliasing 0.920s 12.590us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.050s 29.787us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.530s 71.285us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 1.130s 41.333us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.500s 66.495us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 3.030s 134.850us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 3.320s 136.634us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 14.590s 1987.979us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 2.880s 216.387us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.480s 107.904us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 16.500s 3356.784us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.870s 22.623us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.890s 10.588us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.480s 833.476us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.480s 833.476us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.870s 32.512us 1 1 100.00
gpio_same_csr_outstanding 0.870s 48.045us 1 1 100.00
gpio_csr_aliasing 0.920s 12.590us 1 1 100.00
gpio_csr_hw_reset 0.920s 31.536us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.870s 32.512us 1 1 100.00
gpio_same_csr_outstanding 0.870s 48.045us 1 1 100.00
gpio_csr_aliasing 0.920s 12.590us 1 1 100.00
gpio_csr_hw_reset 0.920s 31.536us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.550s 89.209us 1 1 100.00
gpio_sec_cm 1.410s 97.134us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.550s 89.209us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.920s 13.458us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 1.030s 15.418us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:211) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 56411279984914358710643171607633974150985957115597866089723832594388149109596 999
UVM_INFO @ 3356784233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 16447481035724804153890340828434999579123517751655727151453548812215937123313 86
UVM_INFO @ 15417600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---