Simulation Results: adc_ctrl

 
07/09/2026 17:13:53 DVSim: v1.52.1 sha: 0565e16 json Branch: master Tool: vcs [X-2025.06-SP2-1_Full64]
Coverage statistics
  • Total
  • 67.00 %
  • code
  • 95.98 %
  • assert
  • 94.74 %
  • func
  • 10.29 %
  • line
  • 97.14 %
  • branch
  • 95.72 %
  • cond
  • 91.06 %
  • toggle
  • 100.00 %
Validation stages
V1
83.33%
V2
31.58%
V2S
50.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 0 1 0.00
adc_ctrl_smoke 0.000s 0.000us 0 1 0.00
csr_hw_reset 1 1 100.00
adc_ctrl_csr_hw_reset 2.020s 971.729us 1 1 100.00
csr_rw 1 1 100.00
adc_ctrl_csr_rw 1.260s 427.444us 1 1 100.00
csr_bit_bash 1 1 100.00
adc_ctrl_csr_bit_bash 25.990s 25920.590us 1 1 100.00
csr_aliasing 1 1 100.00
adc_ctrl_csr_aliasing 1.230s 781.934us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
adc_ctrl_csr_mem_rw_with_rand_reset 1.450s 528.408us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
adc_ctrl_csr_rw 1.260s 427.444us 1 1 100.00
adc_ctrl_csr_aliasing 1.230s 781.934us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
filters_polled 0 1 0.00
adc_ctrl_filters_polled 0.000s 0.000us 0 1 0.00
filters_polled_fixed 0 1 0.00
adc_ctrl_filters_polled_fixed 0.000s 0.000us 0 1 0.00
filters_interrupt 0 1 0.00
adc_ctrl_filters_interrupt 0.000s 0.000us 0 1 0.00
filters_interrupt_fixed 0 1 0.00
adc_ctrl_filters_interrupt_fixed 0.000s 0.000us 0 1 0.00
filters_wakeup 0 1 0.00
adc_ctrl_filters_wakeup 0.000s 0.000us 0 1 0.00
filters_wakeup_fixed 0 1 0.00
adc_ctrl_filters_wakeup_fixed 0.000s 0.000us 0 1 0.00
filters_both 0 1 0.00
adc_ctrl_filters_both 0.000s 0.000us 0 1 0.00
clock_gating 0 1 0.00
adc_ctrl_clock_gating 0.000s 0.000us 0 1 0.00
poweron_counter 0 1 0.00
adc_ctrl_poweron_counter 0.000s 0.000us 0 1 0.00
lowpower_counter 0 1 0.00
adc_ctrl_lowpower_counter 0.000s 0.000us 0 1 0.00
fsm_reset 0 1 0.00
adc_ctrl_fsm_reset 0.000s 0.000us 0 1 0.00
stress_all 0 1 0.00
adc_ctrl_stress_all 0.000s 0.000us 0 1 0.00
alert_test 0 1 0.00
adc_ctrl_alert_test 0.000s 0.000us 0 1 0.00
intr_test 1 1 100.00
adc_ctrl_intr_test 1.380s 322.158us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
adc_ctrl_tl_errors 1.440s 524.693us 1 1 100.00
tl_d_illegal_access 1 1 100.00
adc_ctrl_tl_errors 1.440s 524.693us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
adc_ctrl_csr_hw_reset 2.020s 971.729us 1 1 100.00
adc_ctrl_csr_rw 1.260s 427.444us 1 1 100.00
adc_ctrl_csr_aliasing 1.230s 781.934us 1 1 100.00
adc_ctrl_same_csr_outstanding 2.640s 4679.164us 1 1 100.00
tl_d_partial_access 4 4 100.00
adc_ctrl_csr_hw_reset 2.020s 971.729us 1 1 100.00
adc_ctrl_csr_rw 1.260s 427.444us 1 1 100.00
adc_ctrl_csr_aliasing 1.230s 781.934us 1 1 100.00
adc_ctrl_same_csr_outstanding 2.640s 4679.164us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 1 2 50.00
adc_ctrl_sec_cm 0.000s 0.000us 0 1 0.00
adc_ctrl_tl_intg_err 2.600s 4122.436us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
adc_ctrl_tl_intg_err 2.600s 4122.436us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
adc_ctrl_stress_all_with_rand_reset 0.000s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
Job cancelled because one of its dependencies failed or was killed. 16 test runs
adc_ctrl_smoke 79237718566576252946944824090635371445152717552038601513944163997402589858855 None
adc_ctrl_filters_polled 12850488875124909187833438598509226244719989355387706274764526263187197694950 None
adc_ctrl_filters_polled_fixed 75643816756749441946148657238271520483514407472035184571063750992844782029396 None
adc_ctrl_filters_interrupt 9191147248523551940332543391853912244833026874822180896674432741662381915017 None
adc_ctrl_filters_interrupt_fixed 84397837022375436590892609352556605609990784425269783273057653287576110451911 None
adc_ctrl_filters_wakeup 44823363642865333348363157323758248552560772573081264952165717510120561144909 None
adc_ctrl_filters_wakeup_fixed 98012158279670116311697764628332077189498194176592374714373823994767299614360 None
adc_ctrl_clock_gating 48955970143568106163242638686875632350133088874104200305545223593613009544223 None
adc_ctrl_filters_both 103299332216195206944035431497691923615448356990970206776585715902412131379081 None
adc_ctrl_poweron_counter 29990588676019282680524420261948434989387055936359129574522150040971965728849 None
adc_ctrl_lowpower_counter 97545671296912199082501096983305013678676819691574235962231381365652238424336 None
adc_ctrl_fsm_reset 57134947651106286251042708726006462537188889234833646585703700901849355642523 None
adc_ctrl_stress_all_with_rand_reset 109668712777351478551410590209765954034835157999318671764239711576696411817089 None
adc_ctrl_stress_all 15470345588540394832658051864376806850782182996721643196150882384059957650400 None
adc_ctrl_sec_cm 103198763491220112210716270850564070913545638770349535377222535893173417375819 None
adc_ctrl_alert_test 18041884408320848576352037695495407972373132855537478052636665825098931192019 None
Job returned a non-zero exit code: * 1 test run
default None None
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CPU time: 1.145 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 255