| V1 |
|
87.50% |
| V2 |
|
60.00% |
| V2S |
|
50.00% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 0 | 1 | 0.00 | |||
| aon_timer_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| aon_timer_csr_hw_reset | 1.500s | 685.430us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| aon_timer_csr_rw | 1.350s | 264.251us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| aon_timer_csr_bit_bash | 3.720s | 7257.840us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| aon_timer_csr_aliasing | 1.310s | 517.532us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| aon_timer_csr_mem_rw_with_rand_reset | 1.280s | 296.701us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| aon_timer_csr_rw | 1.350s | 264.251us | 1 | 1 | 100.00 | |
| aon_timer_csr_aliasing | 1.310s | 517.532us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| aon_timer_mem_walk | 1.350s | 360.571us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| aon_timer_mem_partial_access | 1.310s | 277.840us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| prescaler | 0 | 1 | 0.00 | |||
| aon_timer_prescaler | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| jump | 0 | 1 | 0.00 | |||
| aon_timer_jump | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| aon_timer_stress_all | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| alert_test | 0 | 1 | 0.00 | |||
| aon_timer_alert_test | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| aon_timer_intr_test | 1.240s | 458.135us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| aon_timer_tl_errors | 1.770s | 544.915us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| aon_timer_tl_errors | 1.770s | 544.915us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| aon_timer_csr_hw_reset | 1.500s | 685.430us | 1 | 1 | 100.00 | |
| aon_timer_csr_rw | 1.350s | 264.251us | 1 | 1 | 100.00 | |
| aon_timer_csr_aliasing | 1.310s | 517.532us | 1 | 1 | 100.00 | |
| aon_timer_same_csr_outstanding | 1.480s | 1021.206us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| aon_timer_csr_hw_reset | 1.500s | 685.430us | 1 | 1 | 100.00 | |
| aon_timer_csr_rw | 1.350s | 264.251us | 1 | 1 | 100.00 | |
| aon_timer_csr_aliasing | 1.310s | 517.532us | 1 | 1 | 100.00 | |
| aon_timer_same_csr_outstanding | 1.480s | 1021.206us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 1 | 2 | 50.00 | |||
| aon_timer_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| aon_timer_tl_intg_err | 2.970s | 4753.842us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| aon_timer_tl_intg_err | 2.970s | 4753.842us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| max_threshold | 0 | 1 | 0.00 | |||
| aon_timer_smoke_max_thold | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| min_threshold | 0 | 1 | 0.00 | |||
| aon_timer_smoke_min_thold | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| wkup_count_hi_cdc | 0 | 1 | 0.00 | |||
| aon_timer_wkup_count_cdc_hi | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| custom_intr | 0 | 1 | 0.00 | |||
| aon_timer_custom_intr | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| alternating_on_off | 0 | 1 | 0.00 | |||
| aon_timer_alternating_enable_on_off | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| aon_timer_stress_all_with_rand_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job cancelled because one of its dependencies failed or was killed. | 12 test runs | |||
| aon_timer_smoke | 83405921966886818119916964254139502526803790554791097476660537518684987361847 | None | ||
| aon_timer_prescaler | 92008420697641390336950942984506603032240151713798099158676980140102395401197 | None | ||
| aon_timer_jump | 105125595372812102615462655333833099533896852518304597993859924940740295905525 | None | ||
| aon_timer_custom_intr | 105589517055519077715791055444299006629112905529601561942656031944802215483190 | None | ||
| aon_timer_smoke_max_thold | 43202138528213754141622967112662045643020635683895937491736047402910075032551 | None | ||
| aon_timer_smoke_min_thold | 23157970668500119770600016676204571602148044083369499587481060974882079976790 | None | ||
| aon_timer_wkup_count_cdc_hi | 108937393370552125866281789205026512560305729418627532019769243575743047488177 | None | ||
| aon_timer_alternating_enable_on_off | 90827594245352507625414871021395811289928216197235150082584026554257169654788 | None | ||
| aon_timer_stress_all_with_rand_reset | 94206180877107311385617480606862365689837047019540107704485827584863416680534 | None | ||
| aon_timer_stress_all | 56552974494208955836445741107757480996261327979529468707395491698718246663947 | None | ||
| aon_timer_sec_cm | 37532590361524012418776228967708227203259845671715633030156129471511994816836 | None | ||
| aon_timer_alert_test | 62675401344494915287463007959851671231828793838790383806997711111421676568638 | None | ||
| Job returned a non-zero exit code: * | 1 test run | |||
| default | None | None |
Please migrate to -fullopt=2024.09 or -fullopt=2025.06.
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
CPU time: 1.157 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 255
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