Simulation Results: chip

 
07/09/2026 17:13:53 DVSim: v1.52.1 sha: 0565e16 json Branch: master Tool: vcs [X-2025.06-SP2-1_Full64]
Coverage statistics
  • Total
  • 84.59 %
  • code
  • 91.69 %
  • assert
  • 85.61 %
  • func
  • 76.48 %
  • line
  • 92.61 %
  • branch
  • 95.61 %
  • cond
  • 94.67 %
  • toggle
  • 83.87 %
Validation stages
V1
29.41%
V2
2.28%
V2S
0.00%
V3
0.00%
unmapped
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_example_tests 0 3 0.00
chip_sw_example_rom 0.000s 0.000us 0 1 0.00
chip_sw_example_manufacturer 0.000s 0.000us 0 1 0.00
chip_sw_example_concurrency 0.000s 0.000us 0 1 0.00
csr_hw_reset 1 1 100.00
chip_csr_hw_reset 214.740s 7636.141us 1 1 100.00
csr_rw 1 1 100.00
chip_csr_rw 334.720s 10104.435us 1 1 100.00
csr_bit_bash 1 1 100.00
chip_csr_bit_bash 562.580s 16711.145us 1 1 100.00
csr_aliasing 1 1 100.00
chip_csr_aliasing 4621.740s 91211.482us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
chip_csr_mem_rw_with_rand_reset 360.640s 9574.860us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
chip_csr_aliasing 4621.740s 91211.482us 1 1 100.00
chip_csr_rw 334.720s 10104.435us 1 1 100.00
xbar_smoke 0 1 0.00
xbar_smoke 0.000s 0.000us 0 1 0.00
chip_sw_gpio_out 0 1 0.00
chip_sw_gpio 0.000s 0.000us 0 1 0.00
chip_sw_gpio_in 0 1 0.00
chip_sw_gpio 0.000s 0.000us 0 1 0.00
chip_sw_gpio_irq 0 1 0.00
chip_sw_gpio 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx 0 1 0.00
chip_sw_uart_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_uart_rx_overflow 0 4 0.00
chip_sw_uart_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_idx1 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_idx2 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_idx3 0.000s 0.000us 0 1 0.00
chip_sw_uart_baud_rate 0 1 0.00
chip_sw_uart_rand_baudrate 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_alt_clk_freq 0 2 0.00
chip_sw_uart_tx_rx_alt_clk_freq 0.000s 0.000us 0 1 0.00
chip_sw_uart_tx_rx_alt_clk_freq_low_speed 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_pin_mux 1 1 100.00
chip_padctrl_attributes 262.480s 9963.895us 1 1 100.00
chip_padctrl_attributes 1 1 100.00
chip_padctrl_attributes 262.480s 9963.895us 1 1 100.00
chip_sw_sleep_pin_mio_dio_val 0 1 0.00
chip_sw_sleep_pin_mio_dio_val 0.000s 0.000us 0 1 0.00
chip_sw_sleep_pin_wake 0 1 0.00
chip_sw_sleep_pin_wake 0.000s 0.000us 0 1 0.00
chip_sw_sleep_pin_retention 0 1 0.00
chip_sw_sleep_pin_retention 0.000s 0.000us 0 1 0.00
chip_sw_tap_strap_sampling 0 4 0.00
chip_tap_straps_dev 0.000s 0.000us 0 1 0.00
chip_tap_straps_testunlock0 0.000s 0.000us 0 1 0.00
chip_tap_straps_rma 0.000s 0.000us 0 1 0.00
chip_tap_straps_prod 0.000s 0.000us 0 1 0.00
chip_sw_data_integrity 0 1 0.00
chip_sw_data_integrity_escalation 0.000s 0.000us 0 1 0.00
chip_sw_instruction_integrity 0 1 0.00
chip_sw_data_integrity_escalation 0.000s 0.000us 0 1 0.00
chip_sw_ast_clk_outputs 0 1 0.00
chip_sw_ast_clk_outputs 0.000s 0.000us 0 1 0.00
chip_sw_ast_clk_rst_inputs 0 1 0.00
chip_sw_ast_clk_rst_inputs 0.000s 0.000us 0 1 0.00
chip_sw_ast_sys_clk_jitter 0 8 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_edn_entropy_reqs_jitter 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_key_derivation_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter 0.000s 0.000us 0 1 0.00
chip_sw_ast_usb_clk_calib 0 1 0.00
chip_sw_usb_ast_clk_calib 0.000s 0.000us 0 1 0.00
chip_sw_sensor_ctrl_ast_alerts 0 2 0.00
chip_sw_sensor_ctrl_alert 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_sensor_ctrl_ast_status 0 1 0.00
chip_sw_sensor_ctrl_status 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 0 1 0.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_smoketest 0 16 0.00
chip_sw_aes_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_csrng_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_gpio_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_hmac_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_kmac_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_otbn_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_usbdev_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rv_plic_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rv_timer_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_uart_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_otp_smoketest 0 1 0.00
chip_sw_otp_ctrl_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rom_functests 0 1 0.00
rom_keymgr_dpe_functest 0.000s 0.000us 0 1 0.00
chip_sw_boot 0 1 0.00
chip_sw_uart_tx_rx_bootstrap 0.000s 0.000us 0 1 0.00
chip_sw_secure_boot 0 1 0.00
rom_e2e_smoke 0.000s 0.000us 0 1 0.00
chip_sw_rom_raw_unlock 0 1 0.00
rom_raw_unlock 0.000s 0.000us 0 1 0.00
chip_sw_power_idle_load 0 1 0.00
chip_sw_power_idle_load 0.000s 0.000us 0 1 0.00
chip_sw_power_sleep_load 0 1 0.00
chip_sw_power_sleep_load 0.000s 0.000us 0 1 0.00
chip_sw_exit_test_unlocked_bootstrap 0 1 0.00
chip_sw_exit_test_unlocked_bootstrap 0.000s 0.000us 0 1 0.00
tl_d_oob_addr_access 1 1 100.00
chip_tl_errors 199.380s 7129.158us 1 1 100.00
tl_d_illegal_access 1 1 100.00
chip_tl_errors 199.380s 7129.158us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
chip_csr_aliasing 4621.740s 91211.482us 1 1 100.00
chip_same_csr_outstanding 1671.390s 34617.170us 1 1 100.00
chip_csr_hw_reset 214.740s 7636.141us 1 1 100.00
chip_csr_rw 334.720s 10104.435us 1 1 100.00
tl_d_partial_access 4 4 100.00
chip_csr_aliasing 4621.740s 91211.482us 1 1 100.00
chip_same_csr_outstanding 1671.390s 34617.170us 1 1 100.00
chip_csr_hw_reset 214.740s 7636.141us 1 1 100.00
chip_csr_rw 334.720s 10104.435us 1 1 100.00
xbar_base_random_sequence 0 1 0.00
xbar_random 0.000s 0.000us 0 1 0.00
xbar_random_delay 0 6 0.00
xbar_smoke_zero_delays 0.000s 0.000us 0 1 0.00
xbar_smoke_large_delays 0.000s 0.000us 0 1 0.00
xbar_smoke_slow_rsp 0.000s 0.000us 0 1 0.00
xbar_random_zero_delays 0.000s 0.000us 0 1 0.00
xbar_random_large_delays 0.000s 0.000us 0 1 0.00
xbar_random_slow_rsp 0.000s 0.000us 0 1 0.00
xbar_unmapped_address 0 2 0.00
xbar_unmapped_addr 0.000s 0.000us 0 1 0.00
xbar_error_and_unmapped_addr 0.000s 0.000us 0 1 0.00
xbar_error_cases 0 2 0.00
xbar_error_random 0.000s 0.000us 0 1 0.00
xbar_error_and_unmapped_addr 0.000s 0.000us 0 1 0.00
xbar_all_access_same_device 0 2 0.00
xbar_access_same_device 0.000s 0.000us 0 1 0.00
xbar_access_same_device_slow_rsp 0.000s 0.000us 0 1 0.00
xbar_all_hosts_use_same_source_id 0 1 0.00
xbar_same_source 0.000s 0.000us 0 1 0.00
xbar_stress_all 0 2 0.00
xbar_stress_all 0.000s 0.000us 0 1 0.00
xbar_stress_all_with_error 0.000s 0.000us 0 1 0.00
xbar_stress_with_reset 0 2 0.00
xbar_stress_all_with_rand_reset 0.000s 0.000us 0 1 0.00
xbar_stress_all_with_reset_error 0.000s 0.000us 0 1 0.00
rom_e2e_smoke 0 1 0.00
rom_e2e_smoke 0.000s 0.000us 0 1 0.00
rom_e2e_shutdown_output 0 1 0.00
rom_e2e_shutdown_output 0.000s 0.000us 0 1 0.00
rom_e2e_shutdown_exception_c 0 1 0.00
rom_e2e_shutdown_exception_c 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid 0 15 0.00
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_dev 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_prod 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_rma 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_dev 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_prod 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_rma 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_dev 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_prod 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_rma 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always 0 15 0.00
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_dev 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_prod 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_rma 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_dev 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_prod 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_nothing_rma 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_dev 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_prod 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_nothing_b_bad_rma 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init 0 5 0.00
rom_e2e_asm_init_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init_dev 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init_prod 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init_prod_end 0.000s 0.000us 0 1 0.00
rom_e2e_asm_init_rma 0.000s 0.000us 0 1 0.00
rom_e2e_keymgr_dpe_init 0 3 0.00
rom_e2e_keymgr_dpe_init_rom_ext_meas 0.000s 0.000us 0 1 0.00
rom_e2e_keymgr_dpe_init_rom_ext_no_meas 0.000s 0.000us 0 1 0.00
rom_e2e_keymgr_dpe_init_rom_ext_invalid_meas 0.000s 0.000us 0 1 0.00
rom_e2e_static_critical 0 1 0.00
rom_e2e_static_critical 0.000s 0.000us 0 1 0.00
chip_sw_adc_ctrl_debug_cable_irq 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc 0 2 0.00
chip_sw_aes_enc 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_aes_entropy 0 1 0.00
chip_sw_aes_entropy 0.000s 0.000us 0 1 0.00
chip_sw_aes_idle 0 1 0.00
chip_sw_aes_idle 0.000s 0.000us 0 1 0.00
chip_sw_aes_sideload 0 1 0.00
chip_sw_keymgr_dpe_sideload_aes 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_alerts 0 1 0.00
chip_sw_alert_test 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_escalations 0 1 0.00
chip_sw_alert_handler_escalation 0.000s 0.000us 0 1 0.00
chip_sw_all_escalation_resets 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_irqs 0 3 0.00
chip_plic_all_irqs_0 0.000s 0.000us 0 1 0.00
chip_plic_all_irqs_10 0.000s 0.000us 0 1 0.00
chip_plic_all_irqs_20 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_entropy 0 1 0.00
chip_sw_alert_handler_entropy 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_crashdump 0 1 0.00
chip_sw_rstmgr_alert_info 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_ping_timeout 0 1 0.00
chip_sw_alert_handler_ping_timeout 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_alerts 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_alerts 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_pings 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_pings 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_clock_off 0 1 0.00
chip_sw_alert_handler_lpg_clkoff 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_lpg_reset_toggle 0 1 0.00
chip_sw_alert_handler_lpg_reset_toggle 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_ping_ok 0 1 0.00
chip_sw_alert_handler_ping_ok 0.000s 0.000us 0 1 0.00
chip_sw_alert_handler_reverse_ping_in_deep_sleep 0 1 0.00
chip_sw_alert_handler_reverse_ping_in_deep_sleep 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wakeup_irq 0 1 0.00
chip_sw_aon_timer_irq 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_sleep_wakeup 0 1 0.00
chip_sw_pwrmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wdog_bark_irq 0 1 0.00
chip_sw_aon_timer_irq 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_sleep_wdog_bite_reset 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_sleep_wdog_sleep_pause 0 1 0.00
chip_sw_aon_timer_sleep_wdog_sleep_pause 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wdog_lc_escalate 0 1 0.00
chip_sw_aon_timer_wdog_lc_escalate 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_idle_trans 0 4 0.00
chip_sw_otbn_randomness 0.000s 0.000us 0 1 0.00
chip_sw_aes_idle 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_idle 0.000s 0.000us 0 1 0.00
chip_sw_kmac_idle 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_trans 0 4 0.00
chip_sw_clkmgr_off_aes_trans 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_hmac_trans 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_kmac_trans 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_otbn_trans 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_off_peri 0 1 0.00
chip_sw_clkmgr_off_peri 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_div 0 7 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 0.000s 0.000us 0 1 0.00
chip_sw_ast_clk_outputs 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_lc 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_lc 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw 0 2 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter 0 8 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_edn_entropy_reqs_jitter 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_key_derivation_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_extended_range 0 8 0.00
chip_sw_clkmgr_jitter_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_key_derivation_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_csrng_edn_concurrency_reduced_freq 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_deep_sleep_frequency 0 1 0.00
chip_sw_ast_clk_outputs 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_sleep_frequency 0 1 0.00
chip_sw_clkmgr_sleep_frequency 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_reset_frequency 0 1 0.00
chip_sw_clkmgr_reset_frequency 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_alert_handler_clock_enables 0 1 0.00
chip_sw_alert_handler_lpg_clkoff 0.000s 0.000us 0 1 0.00
chip_sw_csrng_edn_cmd 0 1 0.00
chip_sw_entropy_src_csrng 0.000s 0.000us 0 1 0.00
chip_sw_csrng_fuse_en_sw_app_read 0 1 0.00
chip_sw_csrng_fuse_en_sw_app_read_test 0.000s 0.000us 0 1 0.00
chip_sw_csrng_lc_hw_debug_en 0 1 0.00
chip_sw_csrng_lc_hw_debug_en_test 0.000s 0.000us 0 1 0.00
chip_sw_csrng_known_answer_tests 0 1 0.00
chip_sw_csrng_kat_test 0.000s 0.000us 0 1 0.00
chip_sw_edn_entropy_reqs 0 3 0.00
chip_sw_csrng_edn_concurrency 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_ast_rng_req 0.000s 0.000us 0 1 0.00
chip_sw_edn_entropy_reqs 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_ast_rng_req 0 1 0.00
chip_sw_entropy_src_ast_rng_req 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_csrng 0 1 0.00
chip_sw_entropy_src_csrng 0.000s 0.000us 0 1 0.00
chip_sw_entropy_src_known_answer_tests 0 1 0.00
chip_sw_entropy_src_kat_test 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc 0 2 0.00
chip_sw_hmac_enc 0.000s 0.000us 0 1 0.00
chip_sw_hmac_enc_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_hmac_idle 0 1 0.00
chip_sw_hmac_enc_idle 0.000s 0.000us 0 1 0.00
chip_sw_hmac_all_configurations 0 1 0.00
chip_sw_hmac_oneshot 0.000s 0.000us 0 1 0.00
chip_sw_hmac_multistream_mode 0 1 0.00
chip_sw_hmac_multistream 0.000s 0.000us 0 1 0.00
chip_sw_i2c_host_tx_rx 0 3 0.00
chip_sw_i2c_host_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_i2c_host_tx_rx_idx1 0.000s 0.000us 0 1 0.00
chip_sw_i2c_host_tx_rx_idx2 0.000s 0.000us 0 1 0.00
chip_sw_i2c_device_tx_rx 0 1 0.00
chip_sw_i2c_device_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_key_derivation 0 2 0.00
chip_sw_keymgr_dpe_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_key_derivation_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_sideload_kmac 0 1 0.00
chip_sw_keymgr_dpe_sideload_kmac 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_sideload_aes 0 1 0.00
chip_sw_keymgr_dpe_sideload_aes 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_sideload_otbn 0 1 0.00
chip_sw_keymgr_dpe_sideload_otbn 0.000s 0.000us 0 1 0.00
chip_sw_kmac_enc 0 3 0.00
chip_sw_kmac_mode_cshake 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac 0.000s 0.000us 0 1 0.00
chip_sw_kmac_mode_kmac_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_kmac_app_keymgr_dpe 0 1 0.00
chip_sw_keymgr_dpe_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_kmac_app_lc 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_kmac_app_rom 0 1 0.00
chip_sw_kmac_app_rom 0.000s 0.000us 0 1 0.00
chip_sw_kmac_entropy 0 1 0.00
chip_sw_kmac_entropy 0.000s 0.000us 0 1 0.00
chip_sw_kmac_idle 0 1 0.00
chip_sw_kmac_idle 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_alert_handler_escalation 0 1 0.00
chip_sw_alert_handler_escalation 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_jtag_access 0 3 0.00
chip_tap_straps_dev 0.000s 0.000us 0 1 0.00
chip_tap_straps_rma 0.000s 0.000us 0 1 0.00
chip_tap_straps_prod 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_otp_hw_cfg0 0 1 0.00
chip_sw_lc_ctrl_otp_hw_cfg0 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_init 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_transitions 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_kmac_req 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_key_div 0 1 0.00
chip_sw_keymgr_dpe_key_derivation_prod 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_broadcast 0 21 0.00
chip_sw_rram_rma_unlocked 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_dev 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_prod 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_rma 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_rram_ctrl_lc_rw_en 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_rom_ctrl_integrity_check 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_execution_main 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_lc 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 0.000s 0.000us 0 1 0.00
chip_tap_straps_dev 0.000s 0.000us 0 1 0.00
chip_tap_straps_rma 0.000s 0.000us 0 1 0.00
chip_tap_straps_prod 0.000s 0.000us 0 1 0.00
chip_rv_dm_lc_disabled 26.030s 2056.649us 0 1 0.00
chip_lc_scrap 0 4 0.00
chip_sw_lc_ctrl_rma_to_scrap 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_raw_to_scrap 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_test_locked0_to_scrap 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_rand_to_scrap 0.000s 0.000us 0 1 0.00
chip_lc_test_locked 0 2 0.00
chip_sw_lc_walkthrough_testunlocks 0.000s 0.000us 0 1 0.00
chip_rv_dm_lc_disabled 26.030s 2056.649us 0 1 0.00
chip_sw_lc_walkthrough 0 5 0.00
chip_sw_lc_walkthrough_dev 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough_prod 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough_prodend 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough_rma 0.000s 0.000us 0 1 0.00
chip_sw_lc_walkthrough_testunlocks 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_volatile_raw_unlock 0 3 0.00
chip_sw_lc_ctrl_volatile_raw_unlock 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz 0.000s 0.000us 0 1 0.00
rom_volatile_raw_unlock 0.000s 0.000us 0 1 0.00
chip_sw_otbn_op 0 2 0.00
chip_sw_otbn_ecdsa_op_irq 0.000s 0.000us 0 1 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_otbn_rnd_entropy 0 1 0.00
chip_sw_otbn_randomness 0.000s 0.000us 0 1 0.00
chip_sw_otbn_urnd_entropy 0 1 0.00
chip_sw_otbn_randomness 0.000s 0.000us 0 1 0.00
chip_sw_otbn_idle 0 1 0.00
chip_sw_otbn_randomness 0.000s 0.000us 0 1 0.00
chip_sw_otbn_mem_scramble 0 1 0.00
chip_sw_otbn_mem_scramble 0.000s 0.000us 0 1 0.00
chip_otp_ctrl_init 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_keys 0 4 0.00
chip_sw_otbn_mem_scramble 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_icache_invalidate 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_entropy 0 4 0.00
chip_sw_otbn_mem_scramble 0.000s 0.000us 0 1 0.00
chip_sw_keymgr_dpe_key_derivation 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_icache_invalidate 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_program 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_program_error 0 1 0.00
chip_sw_lc_ctrl_program_error 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_hw_cfg0 0 1 0.00
chip_sw_lc_ctrl_otp_hw_cfg0 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals 0 5 0.00
chip_sw_otp_ctrl_lc_signals_test_unlocked0 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_dev 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_prod 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_rma 0.000s 0.000us 0 1 0.00
chip_sw_lc_ctrl_transition 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_dai_lock 0 1 0.00
chip_sw_otp_ctrl_dai_lock 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_external_full_reset 0 1 0.00
chip_sw_pwrmgr_full_aon_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_wake_ups 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_wake_ups 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_wake_ups 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_wake_ups 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_por_reset 0 1 0.00
chip_sw_pwrmgr_deep_sleep_por_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_por_reset 0 1 0.00
chip_sw_pwrmgr_normal_sleep_por_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_all_wake_ups 0 1 0.00
chip_sw_pwrmgr_deep_sleep_all_wake_ups 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 0 2 0.00
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_aon_timer_wdog_bite_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_wdog_reset 0 1 0.00
chip_sw_pwrmgr_wdog_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_full_aon_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_main_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_main_power_glitch_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_random_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_random_sleep_power_glitch_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_sleep_power_glitch_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sysrst_ctrl_reset 0 2 0.00
chip_sw_pwrmgr_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_b2b_sleep_reset_req 0 1 0.00
chip_sw_pwrmgr_b2b_sleep_reset_req 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_disabled 0 1 0.00
chip_sw_pwrmgr_sleep_disabled 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_rom_access 0 1 0.00
chip_sw_rom_ctrl_integrity_check 0.000s 0.000us 0 1 0.00
chip_sw_rom_ctrl_integrity_check 0 1 0.00
chip_sw_rom_ctrl_integrity_check 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_non_sys_reset_info 0 4 0.00
chip_sw_pwrmgr_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_wdog_reset 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_smoketest 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_sys_reset_info 0 1 0.00
chip_rv_dm_ndm_reset_req 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_cpu_info 0 1 0.00
chip_sw_rstmgr_cpu_info 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_sw_req_reset 0 1 0.00
chip_sw_rstmgr_sw_req 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_alert_info 0 1 0.00
chip_sw_rstmgr_alert_info 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_sw_rst 0 1 0.00
chip_sw_rstmgr_sw_rst 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_escalation_reset 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_rstmgr_alert_handler_reset_enables 0 1 0.00
chip_sw_alert_handler_lpg_reset_toggle 0.000s 0.000us 0 1 0.00
chip_sw_nmi_irq 0 1 0.00
chip_sw_rv_core_ibex_nmi_irq 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_rnd 0 1 0.00
chip_sw_rv_core_ibex_rnd 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_address_translation 0 1 0.00
chip_sw_rv_core_ibex_address_translation 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_icache_scrambled_access 0 1 0.00
chip_sw_rv_core_ibex_icache_invalidate 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_fault_dump 0 1 0.00
chip_sw_rstmgr_cpu_info 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_double_fault 0 1 0.00
chip_sw_rstmgr_cpu_info 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_mcounteren_writable 0 1 0.00
chip_sw_rv_core_ibex_mcounteren_writable 0.000s 0.000us 0 1 0.00
chip_jtag_csr_rw 0 1 0.00
chip_jtag_csr_rw 0.000s 0.000us 0 1 0.00
chip_jtag_mem_access 0 1 0.00
chip_jtag_mem_access 0.000s 0.000us 0 1 0.00
chip_rv_dm_ndm_reset_req 0 1 0.00
chip_rv_dm_ndm_reset_req 0.000s 0.000us 0 1 0.00
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 0 1 0.00
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 0.000s 0.000us 0 1 0.00
chip_rv_dm_access_after_wakeup 0 1 0.00
chip_sw_rv_dm_access_after_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_rv_dm_jtag_tap_sel 0 1 0.00
chip_tap_straps_rma 0.000s 0.000us 0 1 0.00
chip_rv_dm_lc_disabled 0 1 0.00
chip_rv_dm_lc_disabled 26.030s 2056.649us 0 1 0.00
chip_sw_plic_all_irqs 0 3 0.00
chip_plic_all_irqs_0 0.000s 0.000us 0 1 0.00
chip_plic_all_irqs_10 0.000s 0.000us 0 1 0.00
chip_plic_all_irqs_20 0.000s 0.000us 0 1 0.00
chip_sw_plic_sw_irq 0 1 0.00
chip_sw_plic_sw_irq 0.000s 0.000us 0 1 0.00
chip_sw_timer 0 1 0.00
chip_sw_rv_timer_irq 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_flash_mode 0 1 0.00
rom_e2e_smoke 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_pass_through 0 1 0.00
chip_sw_spi_device_pass_through 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_pass_through_collision 0 1 0.00
chip_sw_spi_device_pass_through_collision 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_tpm 0 1 0.00
chip_sw_spi_device_tpm 0.000s 0.000us 0 1 0.00
chip_sw_spi_host_tx_rx 0 1 0.00
chip_sw_spi_host_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_sram_scrambled_access 0 2 0.00
chip_sw_sram_ctrl_scrambled_access 0.000s 0.000us 0 1 0.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 0.000s 0.000us 0 1 0.00
chip_sw_sleep_sram_ret_contents 0 2 0.00
chip_sw_sleep_sram_ret_contents_no_scramble 0.000s 0.000us 0 1 0.00
chip_sw_sleep_sram_ret_contents_scramble 0.000s 0.000us 0 1 0.00
chip_sw_sram_execution 0 1 0.00
chip_sw_sram_ctrl_execution_main 0.000s 0.000us 0 1 0.00
chip_sw_sram_lc_escalation 0 2 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
chip_sw_data_integrity_escalation 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_reset 0 2 0.00
chip_sw_pwrmgr_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_inputs 0 1 0.00
chip_sw_sysrst_ctrl_inputs 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_outputs 0 1 0.00
chip_sw_sysrst_ctrl_outputs 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_in_irq 0 1 0.00
chip_sw_sysrst_ctrl_in_irq 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_sleep_wakeup 0 1 0.00
chip_sw_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_sleep_reset 0 1 0.00
chip_sw_sysrst_ctrl_reset 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_ec_rst_l 0 1 0.00
chip_sw_sysrst_ctrl_ec_rst_l 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_flash_wp_l 0 1 0.00
chip_sw_sysrst_ctrl_ec_rst_l 0.000s 0.000us 0 1 0.00
chip_sw_sysrst_ctrl_ulp_z3_wakeup 0 2 0.00
chip_sw_sysrst_ctrl_ulp_z3_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_vbus 0 1 0.00
chip_sw_usbdev_vbus 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_pullup 0 1 0.00
chip_sw_usbdev_pullup 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_aon_pullup 0 1 0.00
chip_sw_usbdev_aon_pullup 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_setup_rx 0 1 0.00
chip_sw_usbdev_setuprx 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_config_host 0 1 0.00
chip_sw_usbdev_config_host 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_pincfg 0 1 0.00
chip_sw_usbdev_pincfg 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_tx_rx 0 1 0.00
chip_sw_usbdev_dpi 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_toggle_restore 0 1 0.00
chip_sw_usbdev_toggle_restore 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_aes_masking_off 0 1 0.00
chip_sw_aes_masking_off 0.000s 0.000us 0 1 0.00
chip_sw_rv_core_ibex_lockstep_glitch 0 1 0.00
chip_sw_rv_core_ibex_lockstep_glitch 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_coremark 0 1 0.00
chip_sw_coremark 0.000s 0.000us 0 1 0.00
chip_sw_power_max_load 0 1 0.00
chip_sw_power_virus 0.000s 0.000us 0 1 0.00
rom_e2e_debug 0 3 0.00
rom_e2e_jtag_debug_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_debug_dev 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_debug_rma 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_inject 0 3 0.00
rom_e2e_jtag_inject_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_inject_dev 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_inject_rma 0.000s 0.000us 0 1 0.00
rom_e2e_self_hash 0 1 0.00
rom_e2e_self_hash 0.000s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter_cycle_measurements 0 1 0.00
chip_sw_clkmgr_jitter_frequency 0.000s 0.000us 0 1 0.00
chip_sw_edn_boot_mode 0 1 0.00
chip_sw_edn_boot_mode 0.000s 0.000us 0 1 0.00
chip_sw_edn_auto_mode 0 1 0.00
chip_sw_edn_auto_mode 0.000s 0.000us 0 1 0.00
chip_sw_edn_sw_mode 0 1 0.00
chip_sw_edn_sw_mode 0.000s 0.000us 0 1 0.00
chip_sw_edn_kat 0 1 0.00
chip_sw_edn_kat 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_escalation 0 1 0.00
chip_sw_otp_ctrl_escalation 0.000s 0.000us 0 1 0.00
chip_sw_sensor_ctrl_deep_sleep_wake_up 0 1 0.00
chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_usb_clk_disabled_when_active 0 1 0.00
chip_sw_pwrmgr_usb_clk_disabled_when_active 0.000s 0.000us 0 1 0.00
chip_sw_all_resets 0 1 0.00
chip_sw_pwrmgr_all_reset_reqs 0.000s 0.000us 0 1 0.00
chip_sw_rom_ctrl_digests 0 1 0.00
chip_sw_kmac_app_rom 0.000s 0.000us 0 1 0.00
chip_rv_dm_perform_debug 0 3 0.00
rom_e2e_jtag_debug_test_unlocked0 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_debug_dev 0.000s 0.000us 0 1 0.00
rom_e2e_jtag_debug_rma 0.000s 0.000us 0 1 0.00
chip_sw_rv_dm_access_after_hw_reset 0 1 0.00
chip_sw_rv_dm_access_after_escalation_reset 0.000s 0.000us 0 1 0.00
chip_sw_plic_alerts 0 1 0.00
chip_sw_all_escalation_resets 0.000s 0.000us 0 1 0.00
tick_configuration 0 1 0.00
chip_sw_rv_timer_systick_test 0.000s 0.000us 0 1 0.00
counter_wrap 0 1 0.00
chip_sw_rv_timer_systick_test 0.000s 0.000us 0 1 0.00
chip_sw_spi_device_output_when_disabled_or_sleeping 0 1 0.00
chip_sw_spi_device_pinmux_sleep_retention 0.000s 0.000us 0 1 0.00
chip_sw_uart_watermarks 0 1 0.00
chip_sw_uart_tx_rx 0.000s 0.000us 0 1 0.00
chip_sw_usbdev_stream 0 1 0.00
chip_sw_usbdev_stream 0.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 0 8 0.00
chip_sw_rstmgr_rst_cnsty_escalation 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_rot_auth_config 0.000s 0.000us 0 1 0.00
chip_sw_otp_ctrl_descrambling 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_lowpower_cancel 0.000s 0.000us 0 1 0.00
chip_sw_pwrmgr_sleep_wake_5_bug 0.000s 0.000us 0 1 0.00
ate_bootstrap_flash_erase 0.000s 0.000us 0 1 0.00
ate_bootstrap_one_frame 0.000s 0.000us 0 1 0.00
ate_bootstrap_disjoint 0.000s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
Job cancelled because one of its dependencies failed or was killed. 299 test runs
chip_sw_example_rom 7416924106123319692493923806044454562539342392132799619200082612323759868668 None
chip_sw_example_manufacturer 62647319091364485959926647720893415615276284044078437198418113391878948909718 None
chip_sw_example_concurrency 13139342365665301902325899615978596871756895248190991716651719927592487442568 None
chip_sw_all_escalation_resets 73349983902475489980626660108668757562062233358437372734951647182812514875308 None
chip_sw_rstmgr_rst_cnsty_escalation 28590241199705678169325355804979846670830255704177075792152976555697462721147 None
chip_sw_data_integrity_escalation 110050333321368963917808489086341165447922121500070402867598640202224291599791 None
chip_sw_sleep_pin_mio_dio_val 102943286793974116370909636142631832858958289830093766084965600528885576938406 None
chip_sw_sleep_pin_wake 66290295277272708610124068314116555946898806062337476746983948661757266748549 None
chip_sw_sleep_pin_retention 23421771274395098323332828754489904427509904003105748302025552571431784674162 None
chip_sw_uart_tx_rx 79778118108392524232053696623491848227390388712270645597897743861975338218735 None
chip_sw_uart_tx_rx_idx1 37747080580142125161119577506497386311282979323301416207215540195098442802108 None
chip_sw_uart_tx_rx_idx2 45566851698079293164182177253660964905545938980078568426180489146427503397403 None
chip_sw_uart_tx_rx_idx3 53267189463329651910448816329109658867135783905598302112192407637569991375023 None
chip_sw_uart_tx_rx_bootstrap 76930162731627922322512098519574993495290325260975951504077598179348304624319 None
chip_sw_usbdev_vbus 24726909115480226810849646315968357315081156844796371154148060542152428402123 None
chip_sw_usbdev_dpi 7056138766617176669575080466371470766969109192185737381067889289267237387007 None
chip_sw_usbdev_pullup 52824045581178289688468960762150468062624405879867449436377212298990242857498 None
chip_sw_usbdev_aon_pullup 53459685239304514763140648098348343437850426885962521757129402345149107048656 None
chip_sw_usbdev_setuprx 89633187645918306849807263397631463235773050774480700451615207541943795544597 None
chip_sw_usbdev_config_host 94326642401579333119247896458748875586285045352145008471551104548759980780765 None
chip_sw_usbdev_pincfg 20710404486281415081263892520892529871567221755246553176673845602813630068600 None
chip_sw_usbdev_stream 33343587524185695881913156150755306702316260922768534971548593219648654878760 None
chip_sw_usbdev_toggle_restore 76559564830670309406074685308995447902407689626247529019510493831670357828385 None
chip_sw_exit_test_unlocked_bootstrap 8792246666360679355297754465860030273051861962903861758359760048214394560838 None
chip_sw_uart_rand_baudrate 67988264784159830500977404626773180016654229404741101634420118288067627149492 None
chip_sw_uart_tx_rx_alt_clk_freq 43007465302525274772047287991489549835332051120606803022039445256551559861596 None
chip_sw_uart_tx_rx_alt_clk_freq_low_speed 18952020648519550192003776671646796162971297639864972639167178774188662885452 None
chip_sw_i2c_host_tx_rx 3369964534714353072920850332122930073253975897781056166516586140027724860728 None
chip_sw_i2c_host_tx_rx_idx1 9935151349912172865842766013424471548010685353554823254554077053076012036981 None
chip_sw_i2c_host_tx_rx_idx2 64701104781146336424559247780808069928000683847465678330662247881932614427877 None
chip_sw_i2c_device_tx_rx 1673283277690935177729170182336010569590645258644610371884281052691629092566 None
chip_sw_spi_device_tpm 40026299422718820044226431280255559933115636023375871337768274113675692615282 None
chip_sw_spi_host_tx_rx 52009159659458504575433280884335339414618329853067510664684471359172252632653 None
chip_sw_spi_device_pinmux_sleep_retention 77684664500957018363227619589132832562358579890310415988956210403440748860775 None
chip_sw_spi_device_pass_through 67211595169406209454765037501440686528984914719285717796780920712753087350829 None
chip_sw_spi_device_pass_through_collision 39999993257115013577514001728287859524460218982419406581226135678718677937750 None
chip_sw_gpio 41083920968536035529097384457033858220055002770186356331739947979074503070115 None
chip_sw_rram_rma_unlocked 110604265460243548313482390105173500887184587937092283619647347584935659426604 None
chip_sw_kmac_entropy 79527023530661674649769684249046041988539159165121745645548710876368978518006 None
chip_sw_lc_ctrl_otp_hw_cfg0 15586758999506015328944212840422606382368727649997040527758415454503458754708 None
chip_sw_otp_ctrl_lc_signals_test_unlocked0 18641356957967901392524639768479325923845874289682229064869836062650213535870 None
chip_sw_otp_ctrl_lc_signals_dev 35511158380312230264376026264759198575571932916326417838926746006886027291119 None
chip_sw_otp_ctrl_lc_signals_prod 102598021365389928315868643468311822788496602678132045967520714812229836867578 None
chip_sw_otp_ctrl_lc_signals_rma 76483324769765471377631062177348125539725594672249534255715615348407455221979 None
chip_sw_otp_ctrl_escalation 60969330494099358589811148110729678771070148480816375892196448056527252847390 None
chip_sw_otp_ctrl_dai_lock 5807884790519115470142585337200504526464419651957952847140440687385584581971 None
chip_sw_otp_ctrl_rot_auth_config 105630876651389203269570538072781048227629125901600956899435259799671962633313 None
chip_sw_otp_ctrl_descrambling 34303230767989504769195781294957434438812080623614903504843436028400086786187 None
chip_sw_lc_ctrl_transition 6875686403474289737417696105392515803262248232456903070121112442533393484291 None
chip_sw_lc_ctrl_rma_to_scrap 12074863789554810315473375906158771720553414331268685722044225316811850213740 None
chip_sw_lc_ctrl_raw_to_scrap 60211421007824751081951444390625500284084818103663277774850098483765612288932 None
chip_sw_lc_ctrl_test_locked0_to_scrap 17067770567694096695191409986944531739854222329347530714352857174429657452475 None
chip_sw_lc_ctrl_rand_to_scrap 9087116971455451514074830563585977570527447430096692675206406749725883595731 None
chip_sw_rram_ctrl_lc_rw_en 46781657534070400974036514486683952083208133570100420170600643559761068701582 None
chip_sw_lc_walkthrough_dev 19450896470051003089804984155076964093151753700688318657668565448138058298754 None
chip_sw_lc_walkthrough_prod 54144447196641778024761352881388788479133993898340822981490002717708497102536 None
chip_sw_lc_walkthrough_prodend 77767058303734324657981560416545782689331069926135844431416903446973684873344 None
chip_sw_lc_ctrl_volatile_raw_unlock 101833562874341606127628370524421521080366436949087232131551580468668610450613 None
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz 115531285958879651889685307843472829280400040842296388609680482868784006616349 None
chip_sw_lc_walkthrough_rma 88776339996120427255306340077838659733593248539810230497851649422243657539099 None
chip_sw_lc_walkthrough_testunlocks 47435495064925642954610752685605857558142091195228172894729248325166867455305 None
chip_sw_rstmgr_sw_req 58861628277316604491374078213781979445847027645095288917957533767460975560405 None
chip_sw_rstmgr_sw_rst 108615281603675771223800749783155525741061441337220176108317611358130453926747 None
chip_sw_rstmgr_alert_info 21660131575266227181078054786730313166100125892393441373314479286974915106103 None
chip_sw_rstmgr_cpu_info 79424105403408003453896711880956896188560920637719404622456315880518100362150 None
chip_sw_pwrmgr_full_aon_reset 100696655987946913278405149603015215396783004204397176703052730180653236759870 None
chip_sw_pwrmgr_main_power_glitch_reset 68315719515671976684944611261676276034093248890187547469613520867659551309548 None
chip_sw_pwrmgr_sysrst_ctrl_reset 43574076185348453088158732141158121400599317417189839701582297349393820258699 None
chip_sw_pwrmgr_all_reset_reqs 44025069473129527033805454896555657889847753904645391908007759757628766131371 None
chip_sw_pwrmgr_random_sleep_all_reset_reqs 2004594429544136255144862660240036027120578511615025135230263579530054956209 None
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 24498291709605708115981044397149186539487602155529014539144085659577838048738 None
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 76399915975019581952518710060853449104513422010704277492973142809894812573873 None
chip_sw_pwrmgr_deep_sleep_por_reset 55794762087442627843222121483306623610023579767892412438312197131823274765418 None
chip_sw_pwrmgr_normal_sleep_por_reset 75691234849856025348642573039715874434783637665088914168716942895919686148117 None
chip_sw_pwrmgr_sleep_power_glitch_reset 94067491608264869191657493597873223707084045260054504365501670088364313404153 None
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 30274119120562146669744723631831252413088166156569049280748103730466832416521 None
chip_sw_pwrmgr_random_sleep_power_glitch_reset 44541652307852333538475649840098606643356653231865917863839820009679013969486 None
chip_sw_pwrmgr_sleep_disabled 113975529012799277991535288741294890781574506834814441346270448754144331351223 None
chip_sw_pwrmgr_usb_clk_disabled_when_active 42794984678084198228636378167589009153439959391847302031793620711751235372369 None
chip_sw_rv_timer_irq 100711887255929737684252246763997248585499305905431922231924118747517480651184 None
chip_sw_rv_timer_systick_test 25510362211716982439913967484321654733202519547612645151496353161648522778994 None
chip_sw_sysrst_ctrl_inputs 69007115743086609091068595673703141020021444213039643384835399015373878148412 None
chip_sw_sysrst_ctrl_in_irq 92682274637084963030888874761533620565625372012371177420260495204508300168853 None
chip_sw_sysrst_ctrl_ulp_z3_wakeup 83384168295586991473647614035375163740300440573412684527347368913331228615122 None
chip_sw_sysrst_ctrl_reset 42331596719123741026270934567557396945332643534177118154681379599692383931863 None
chip_sw_sysrst_ctrl_outputs 44449012380408913274602091615109001482342560917660324281914040295218289261237 None
chip_sw_sysrst_ctrl_ec_rst_l 83279478445987007601664286868378837464709353810763455427702968006607764805772 None
chip_sw_aon_timer_irq 79907426819842734911814694222987998071959129196539299954599562150169505010583 None
chip_sw_aon_timer_sleep_wdog_sleep_pause 77149947721009971024585302279169017449390827589089260591938145954241068195554 None
chip_sw_aon_timer_wdog_bite_reset 24322134205630965626978949671296939524571861364759011580455422185252118777452 None
chip_sw_pwrmgr_wdog_reset 5113827085535832222641073848798287935116587987649387987302639962497053175171 None
chip_sw_aon_timer_wdog_lc_escalate 98949540947703955506915747560836455030377214051807793729961890413319342740505 None
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 82069036342418174349815935336524841789860671225661407553780406372233266473851 None
chip_sw_otbn_randomness 103173389456423552013304950468834421279059412855211332941380849590277137457258 None
chip_sw_otbn_ecdsa_op_irq 28491481146720596256327795436814447567898263360681864304548489706452737094019 None
chip_sw_otbn_ecdsa_op_irq_jitter_en 90075943713823235231822509942949533274695434987127248912833843279128765633792 None
chip_sw_otbn_mem_scramble 29605577475391797288924123310617816684342957410494248648379794584169909131006 None
chip_sw_rv_core_ibex_rnd 53755311494722049370006841688203799855380968935174145197051774594564171219512 None
chip_sw_rv_core_ibex_nmi_irq 50431960318255086696409290084285002978843754159598227412131901364555667771495 None
chip_sw_aes_enc 72318399318842031069443243815336691670077780484639350718913277741821227726171 None
chip_sw_aes_enc_jitter_en 109447080185755843881942990913135214573221659711733948659807333882139873840605 None
chip_sw_aes_idle 35197942222696011645801228058498646403762238848294441125036059937912599775510 None
chip_sw_aes_masking_off 74910524481783346200463568966635461582898617888965009633245292372314401363946 None
chip_sw_alert_test 35560130054731231294768630695483336648778561117244156948435985054182704456184 None
chip_sw_alert_handler_escalation 56323290068126994708790476650253281213569856196664150071177272258019648531278 None
chip_sw_alert_handler_ping_timeout 44871071323808273461814418878964184757646476846049395855588747943688925860017 None
chip_sw_alert_handler_ping_ok 33487278707567086654061097890074439649621720399051063111432096752998417932985 None
chip_sw_alert_handler_reverse_ping_in_deep_sleep 90247655529580088800777472717269479861701404638678737501187587195766139520182 None
chip_sw_alert_handler_lpg_sleep_mode_alerts 45018731037402856041050642796934433952825433045175192567693805093913715479810 None
chip_sw_alert_handler_lpg_sleep_mode_pings 40535693630945814434818167003421921601577180718917442433919080743702442039596 None
chip_sw_alert_handler_lpg_clkoff 78340560695895081744202873637660069763078786538567218769328160540695599714280 None
chip_sw_alert_handler_lpg_reset_toggle 91845095391394055631961939557656532403937625957693902685635725641811261047753 None
chip_sw_alert_handler_entropy 41424596389386253316212108031501382271003041337639811622303246058363342811570 None
chip_sw_aes_entropy 77405242975843265334879617779433437209234409139938957393806237071046783736235 None
chip_sw_entropy_src_kat_test 18785674877113643751307789120601678986938720357995147344141497616289077470742 None
chip_sw_edn_auto_mode 63728669549726704371955519449824559936006284060922206667532261661433388557416 None
chip_sw_edn_boot_mode 93455469516408987521909887299675956232568590810053599223206252218023907693690 None
chip_sw_edn_kat 70922835378399493482367292390712662875569810690165543137796739545295075339689 None
chip_sw_edn_sw_mode 32410788543989191702700009899964328118720295599862419026264490084232987335827 None
chip_sw_csrng_lc_hw_debug_en_test 75155163013734453281239960760514734892491043466137168284581651394502360797686 None
chip_sw_csrng_edn_concurrency 89417472994065535548256669183364825745160892909807648910968442030727104750469 None
chip_sw_csrng_kat_test 41642811045017766500425937761370789188459792799995277766041604102794523761611 None
chip_sw_csrng_fuse_en_sw_app_read_test 68768304146722042650181167566215950903087857436998611544147155689892084234803 None
chip_sw_entropy_src_ast_rng_req 7821150530960847223190288305430179536736785421098205606696187960941997711048 None
chip_sw_entropy_src_csrng 105167401854162171621668375963892619341631067389037208133992688408638257435239 None
chip_sw_edn_entropy_reqs 76634659361229631345264128312354635437742405764068455303772388756928545672004 None
chip_sw_edn_entropy_reqs_jitter 16736657547939154826953900804277773395562920353497858694931346608775521642761 None
chip_sw_hmac_enc 55676798252215862659364431347523053053362937351149095025181071187853482322486 None
chip_sw_hmac_enc_jitter_en 84861069693345197815514459151831121111458468599985714946241916420431476535695 None
chip_sw_hmac_enc_idle 51167318724051219075080576110737218591485953783338727650112655128163059623637 None
chip_sw_hmac_oneshot 27281140752238175355244062515761664631607697910695581912351304491145269241111 None
chip_sw_hmac_multistream 89087720363605721805212991533271473298116133314656536339647092029771679628818 None
chip_sw_keymgr_dpe_key_derivation 104940154131210914366290016979567663641787937771412209210839966492169952517064 None
chip_sw_keymgr_dpe_key_derivation_prod 99802262282385078015267985602902900001686294192168710589197047644079168840579 None
chip_sw_keymgr_dpe_key_derivation_jitter_en 14165210853803820590473804108073301177253601400008440277446016397044522472514 None
chip_sw_keymgr_dpe_sideload_kmac 88377184529291908145814270124559895652590514654806090726633453088994842803296 None
chip_sw_keymgr_dpe_sideload_aes 9648008359726661470986396954361315176071051248294069890062585920897236884220 None
chip_sw_keymgr_dpe_sideload_otbn 95015674592992942971643910020243707687854463641904778214862063417026919874670 None
chip_sw_kmac_mode_cshake 99629954363632731912351127300547879504858132028986472566365229373132492660462 None
chip_sw_kmac_mode_kmac 18661900783428832951579792260918226287793412351341485121799070582778347527920 None
chip_sw_kmac_mode_kmac_jitter_en 76037946996852681059144558489805389284243258184906888286798691176253332973123 None
chip_sw_kmac_app_rom 59950930965652097804065525638934001417280251685068041953879275913373310439047 None
chip_sw_kmac_idle 45780051120330664445952386084111092380941130755379298046396580823595187083642 None
chip_sw_rom_ctrl_integrity_check 30732130294270124354408342178484088911449350807585477966840851250515139385586 None
chip_sw_sram_ctrl_scrambled_access 84122827643588227724835733802669649770805417505390642092061519153818408985899 None
chip_sw_sram_ctrl_scrambled_access_jitter_en 38648692052965577230325384595612057436907210974147350488287536381400141249719 None
chip_sw_sram_ctrl_execution_main 42067710571620474793669771004656463941554456805874166580108777810183433482166 None
chip_sw_sleep_sram_ret_contents_no_scramble 94141206997680940867527478524874276823844001934299336815490257595324153173030 None
chip_sw_sleep_sram_ret_contents_scramble 5327419509201531493964618106143731428678568539682868277159697281814263086840 None
chip_sw_sensor_ctrl_alert 113669196666146778023637839933335585418830857902028144050957112364690565420828 None
chip_sw_sensor_ctrl_status 36489847556415624507095987717482953217174477455616067035272016317489179080645 None
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 103953607757204144739605528506916838005189899422510326432487615432967861241153 None
chip_sw_coremark 11288185799818424566561891054423323158674614505537214574349263404509549146737 None
chip_sw_pwrmgr_b2b_sleep_reset_req 110805009834197952195457804880966636473480916317150218667465856281678315537524 None
chip_plic_all_irqs_0 102703956865847857256141805433253008988795526797912924917662699162452409798034 None
chip_plic_all_irqs_10 81674215178323595994620827321469696214436015157811509490055692427397658493764 None
chip_plic_all_irqs_20 4263689282217975878238062686797036810180490164802430131167603202639933640009 None
chip_sw_plic_sw_irq 85988834427162658091632521589957594994736561602825291543799504356875715746674 None
chip_sw_clkmgr_off_peri 31665623710914149630702522265332588719855950922215970590606763795428155907015 None
chip_sw_clkmgr_off_aes_trans 27401351514962314828706373792371380913150031035247207382762450848640868282070 None
chip_sw_clkmgr_off_hmac_trans 11906317866029931430017900582640255076387711729128254894167641137945945764640 None
chip_sw_clkmgr_off_kmac_trans 105048532930873828719357119198687806539123790191612789396533909854065096859271 None
chip_sw_clkmgr_off_otbn_trans 98366162073203390659118607942275302359434750881433829467715116111773722712079 None
chip_sw_clkmgr_external_clk_src_for_lc 37271933666689889081506597325947786491752475598232965863968752476132279136787 None
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 28921158284019534142412751276055310042171861650861708544371816623421499313568 None
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 78313184697071338944754661309315412619936622473258321341590656752983644737738 None
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 68704012048200702844600641912113089598067772669007433123935324155233858635528 None
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 72715354674494486613958927163466181051644229287886787599789725620291365330964 None
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 8329796283623568963377988413862276859330860579484281035461021433545480792191 None
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 5988039560772609896234042457695734686272099573392251132259683604575852238918 None
chip_sw_clkmgr_reset_frequency 99422022952068653336846112158594220097885035064065565603953444832944189560619 None
chip_sw_clkmgr_jitter_frequency 97194653451734499211103362877922359180877566811007554903336782523133096848558 None
chip_sw_clkmgr_jitter 57592068803261170462452300266557649714038322118343931599379979127668469199159 None
chip_sw_clkmgr_sleep_frequency 55604409247171142675291799137004474080930788058963618497380377341142444584381 None
chip_jtag_csr_rw 54797527755545437899438049041409789744425072713459318504617606373719842286604 None
chip_jtag_mem_access 6423833314508968139114674972685314144677810525764124900688759364974257461394 None
chip_sw_ast_clk_outputs 74774808738681461853366602136935732581717494963358979545765051042326658188616 None
chip_sw_lc_ctrl_program_error 73559502894886433880048727647043563613271951254345640252811778417099450342905 None
chip_sw_pwrmgr_normal_sleep_all_wake_ups 84439379015214295191315307840690829912896564013574025295504941847720189813499 None
chip_sw_pwrmgr_lowpower_cancel 22403859269130076695540876173172481146632533110086434657659371159604067472508 None
chip_sw_pwrmgr_deep_sleep_all_wake_ups 26217381714144465983575883931842420566436943880712374315099831236940022274064 None
chip_sw_pwrmgr_random_sleep_all_wake_ups 77047057042387204429968150684706885516249309665838819641329322481888024810863 None
chip_sw_pwrmgr_sleep_wake_5_bug 25718180910245246030430568905796135172301114774463410630178819612658346152277 None
chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up 12185992362061219545879951379986643095866135656274276215620397689633792511843 None
chip_rv_dm_ndm_reset_req 2254947953232559903442201326821401916201493475258306276956050497930813213412 None
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 38231097095338944947473472094038310946164679010947529844490152059730134722392 None
chip_sw_rv_dm_access_after_wakeup 26401357860333727447987967487793550303076582316700547803230222998759569671227 None
chip_sw_rv_dm_access_after_escalation_reset 115759904067914274192881929078649810816043113335724092454917883789115501214035 None
chip_tap_straps_dev 99896845539758127427173784228838150049853214893688195930750751252858887683540 None
chip_tap_straps_testunlock0 60401963328356116785883291601280812484734828507500384349457429474979355485409 None
chip_tap_straps_rma 11475955315601156536172218156451690993651503353565055837533880485544279691065 None
chip_tap_straps_prod 91337498912603572793460014622393887714963260950385037457500988982506876118400 None
chip_sw_rv_core_ibex_address_translation 111976673543291260979723033642633208273573955599673750529678213714695597159851 None
chip_sw_rv_core_ibex_lockstep_glitch 19495628011533583045639351560103543586140600049341004747964944552166261427562 None
chip_sw_rv_core_ibex_icache_invalidate 25980038814403520343019264430906678747576650437692654374541996523586039938474 None
chip_sw_rv_core_ibex_mcounteren_writable 48472093402143912633123976799777366699300798234219794436182766673828635564076 None
chip_sw_usb_ast_clk_calib 21826515247197474162450242548394344691315751540758425720192850412190610736224 None
chip_sw_clkmgr_jitter_reduced_freq 35847795369133039790978244461129924024570151805908235297941977562953234295969 None
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq 91190431829673278433245873065467927216769228068529985879827646375401754145 None
chip_sw_aes_enc_jitter_en_reduced_freq 26693746541288968196875171447565747421192765169128992211585087619595121893371 None
chip_sw_hmac_enc_jitter_en_reduced_freq 62757211012007848999861854741229601432035082388430101868812838406618885873180 None
chip_sw_keymgr_dpe_key_derivation_jitter_en_reduced_freq 90432321580606435945529150372406446777843494334611880624516225977602693847394 None
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq 78283351273479770284115472551860910608881509305059748980701384562677226408847 None
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq 115234888844197330149141407226159892148137416725837463394608024256988564322610 None
chip_sw_csrng_edn_concurrency_reduced_freq 8267609802032732889551744706425941102347643255790719364626472697768406017332 None
chip_sw_power_idle_load 59592907155989170390003281225510345786549244911167727170883640217749408896904 None
chip_sw_power_sleep_load 46233841906902369483833834245926031246622629653407055323410641907259784536370 None
chip_sw_ast_clk_rst_inputs 51122513949387260353316123655964261328321370409450814731535002510212151832085 None
chip_sw_power_virus 114164938102163239556640525162066192151605701036064158380549456600073167408788 None
ate_bootstrap_flash_erase 45376406813804189206111024788250646342004764992209797192071980498239165264312 None
ate_bootstrap_one_frame 35007157328539985487389925675948965425674744934779489638317556832392276755979 None
ate_bootstrap_disjoint 89812842136625668365080027431128617512260984895826439533133473609929847645480 None
rom_e2e_smoke 75945913162507087765062817814317741378417277538668736835880228279795253655503 None
rom_e2e_shutdown_exception_c 83993383616076395964605228027142537620380206304267199577160131893278291984036 None
rom_e2e_shutdown_output 21055981663798926980767709127856558224850350382941721400584235244403435864050 None
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 85962980210174436695335109115896000690407071259060172673499579976614831670483 None
rom_e2e_boot_policy_valid_a_good_b_good_dev 88780951545454999033685053777832659901409463635488587435684824606472804327913 None
rom_e2e_boot_policy_valid_a_good_b_good_prod 105811330523826132411449734519383233332774449269725332845588410272654728021655 None
rom_e2e_boot_policy_valid_a_good_b_good_prod_end 334870899116350360588155899139034378708875404183023145988748133402773688158 None
rom_e2e_boot_policy_valid_a_good_b_good_rma 34702473056369340983286351195103194060172106608561223682419377829672954052063 None
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 28450295383542473880905557045704260820354015080138735889872477997754422821572 None
rom_e2e_boot_policy_valid_a_good_b_bad_dev 63478083589443810403078849395069410826708701574825683379030132091115176120147 None
rom_e2e_boot_policy_valid_a_good_b_bad_prod 90445315572242751652573906712422757057494677267305101661328143319687071619286 None
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end 5577981304239846750662236881621410439205054155897142992022623100169925422103 None
rom_e2e_boot_policy_valid_a_good_b_bad_rma 114610309493595684402580793403425510010369708759153543946086555136629394592128 None
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 89198853022258467567833770479491788055572698464946226216947149252749048172153 None
rom_e2e_boot_policy_valid_a_bad_b_good_dev 62899164451759782630943033101864331919991077509353137139562689013921574218687 None
rom_e2e_boot_policy_valid_a_bad_b_good_prod 70276462307219254675864286937475066201032239829187136576476689507230800796931 None
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end 21246230907463055075382751145730218313537701770045696843182608673906822961188 None
rom_e2e_boot_policy_valid_a_bad_b_good_rma 91211278260237580135750760824363865717948215999612961295005529723461341083617 None
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 94103481648092637986996193976541074190925399886209238004834267280492325707399 None
rom_e2e_sigverify_always_a_bad_b_bad_dev 87175393172274025193446896181259917954110800990514156674606980662933903761723 None
rom_e2e_sigverify_always_a_bad_b_bad_prod 45982474880270293890322507402090175762012816463609334345116442466293061015375 None
rom_e2e_sigverify_always_a_bad_b_bad_prod_end 8724161771905156291914611059924804806170556990361263599865850565898199860184 None
rom_e2e_sigverify_always_a_bad_b_bad_rma 80606005926734906652407231150386348183908703350757065832649141698140181998228 None
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 34509222843946127802210128559167172487510337927410521438721063509075849506370 None
rom_e2e_sigverify_always_a_bad_b_nothing_dev 88146791493234756266909238644851582507721768200268440305263485192384887305896 None
rom_e2e_sigverify_always_a_bad_b_nothing_prod 3594049101029637412421786874643272755624201761870255187040475260683058388666 None
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end 36121586423621796039938269140339660617167591943698063329027767012521499413345 None
rom_e2e_sigverify_always_a_bad_b_nothing_rma 58909675391750225775476693930389041882842835971137816715672913463537253514309 None
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 14032740802316901383900510816975845496857868576910814141911860340477916685377 None
rom_e2e_sigverify_always_a_nothing_b_bad_dev 20245220162610842481588514260250641171410656562997606388739697091093509760130 None
rom_e2e_sigverify_always_a_nothing_b_bad_prod 48282809956404932353226078188210015622710870383511621292002158850029709558562 None
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end 115551070950164037594022222939405477070309888328781826772750245275019109658148 None
rom_e2e_sigverify_always_a_nothing_b_bad_rma 80506060455657624281555710108601805456985504905355230608402688508880796911049 None
rom_e2e_asm_init_test_unlocked0 306203449042293622105783432252516464460571283422253266716635952223894350844 None
rom_e2e_asm_init_dev 17783789012344618021659485095015227751547187207491052872923738780193521308430 None
rom_e2e_asm_init_prod 86513892383872810249590070275312438265533502214050930565469487449556787448780 None
rom_e2e_asm_init_prod_end 20343728092901800923883618552360178920029974158532696399842407556144075684131 None
rom_e2e_asm_init_rma 35459625516138197972892007836507363106114665017815578326842706198136941610408 None
rom_e2e_jtag_debug_test_unlocked0 101513724565814122942520084800438439583508742575630599966251893072880586053003 None
rom_e2e_jtag_debug_dev 13899715713973945383373793173326345708663586841260923716507998023547162840867 None
rom_e2e_jtag_debug_rma 97707067269689918287795576964571338647908099699522203070206423800520397420480 None
rom_e2e_jtag_inject_test_unlocked0 71962359763832909472007984485575175199671824354158144851822462154460920640096 None
rom_e2e_jtag_inject_dev 87741047996091101880953875150968132266124756621278635730128555152855428154469 None
rom_e2e_jtag_inject_rma 35804632145630194343344116265597017463819865184983394039438203717884660138258 None
rom_e2e_static_critical 76712990593509266073870570419929129325749494584928895017435802411948556755192 None
rom_e2e_keymgr_dpe_init_rom_ext_meas 37831132232720412389146162877743870801278720322925497774559389055344458594994 None
rom_e2e_keymgr_dpe_init_rom_ext_no_meas 63574993974517105542135792922023972301318875238566496166500885782361993341626 None
rom_e2e_keymgr_dpe_init_rom_ext_invalid_meas 71316906502694732059828081212499564646241530203940814670547998930443417004574 None
rom_volatile_raw_unlock 102924962843004503302559423976023208897807366031493104476118940012423930287464 None
rom_raw_unlock 34639012775817691077238882608653778217636360398765417639656493949739252465004 None
rom_e2e_self_hash 8355346370947740814533754118022922106067188011094647379456743400878611057130 None
rom_keymgr_dpe_functest 65563630839468591507080050655509079842826942271066048329741190007017743501716 None
chip_sw_aes_smoketest 103224528258716602249866762641521888112899789080492156356935138618955608161257 None
chip_sw_aon_timer_smoketest 51993751765291116014533570628269116105579979757041226493208448103333448973021 None
chip_sw_clkmgr_smoketest 1283666995414706345647019587449707204494965123997588152017973971930487560744 None
chip_sw_csrng_smoketest 25960898251324434148841954229635854136244568625534739914687941591149682253654 None
chip_sw_entropy_src_smoketest 98707465489671576427174984713741494905173251513689887450089422357198970852071 None
chip_sw_gpio_smoketest 6708206887045501776296779197662019737300928423906089526218389554679864871524 None
chip_sw_hmac_smoketest 106082160316682426764591845898222139302518852904624687208873138362328503941119 None
chip_sw_kmac_smoketest 95924005110127569732056637448594705595812896240435396687501465004126193699646 None
chip_sw_otbn_smoketest 64886009193748694889219758004109713667680410918868234271815769930120727379045 None
chip_sw_otp_ctrl_smoketest 100576323147680388481048064576018804152191725387182719690964860135862841174180 None
chip_sw_pwrmgr_smoketest 32197955296047380518121692352213516459498991824529832704443925500907285034783 None
chip_sw_pwrmgr_usbdev_smoketest 82197075282720975906785514045587502180117293573471821076309901611841753781921 None
chip_sw_rv_plic_smoketest 91596850892012102639597876842964626268415772388488105241529276315096270393975 None
chip_sw_rv_timer_smoketest 16128745378084950742805145531356717207598825074929801551486699609999756267968 None
chip_sw_rstmgr_smoketest 96976816969828352652725186991522304813786280215946941477634042382572859100349 None
chip_sw_sram_ctrl_smoketest 71313533109918082382683613491324667455932006464787785826658564155112817593037 None
chip_sw_uart_smoketest 73982094648795676512683806333503484271870253838627530152574863054673653835696 None
xbar_smoke 62292036964915763459970409126860943029481631074927427111589840488455537010292 None
xbar_smoke_zero_delays 94708505685204213376471454395475879258464324384187106145449147833020582841642 None
xbar_smoke_large_delays 25862975173085675125234583199703103292226362354209866758297783287244107230562 None
xbar_smoke_slow_rsp 67753602450000803788080928571033102728754929502399327061439460567426848883024 None
xbar_random 50441522797997095748375270323139654866544019972470722276441995890017576977534 None
xbar_random_zero_delays 30261080038890008324060323711121530238155379571413319309573695734452445482115 None
xbar_random_large_delays 33070605222017493926922614577661228932493812129230404648794744555713694889105 None
xbar_random_slow_rsp 40436360754024403937071123935491415303421827011388661285229122772818385255542 None
xbar_access_same_device 103412554217472886284822066349719890100040169526702896560362291953749334638302 None
xbar_access_same_device_slow_rsp 47741550909360613256873450055019966860143878577291129254072056381120954496596 None
xbar_same_source 22010297519054484437857061850716994415642289754156720368099672357607727078253 None
xbar_error_random 44008092435761750018718057958383385508608875809738350979309271985338390401320 None
xbar_unmapped_addr 70401356501965067536901543671045793604928751580743724377235914855896119004359 None
xbar_error_and_unmapped_addr 100132464265345057474142579798382615471673587663648203073304305377325996959652 None
xbar_stress_all 16615784384695481914286694372147679820334525008480900183787703638019558565642 None
xbar_stress_all_with_rand_reset 3313299289028309093085064183265848577244436611511513592282082964499319449524 None
xbar_stress_all_with_error 38790907604528158552344265886109224735884166432643413428793149944057990890064 None
xbar_stress_all_with_reset_error 24836129931533463649220891527851712527313083957202432076273984723514181807090 None
Job returned a non-zero exit code: * 2 test runs
default None None
Please migrate to -fullopt=2024.09 or -fullopt=2025.06.
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
CPU time: 1.114 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 255
xbar_build_mode None None
Please migrate to -fullopt=2024.09 or -fullopt=2025.06.
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
CPU time: 1.118 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 255
UVM_ERROR @ * us: (cip_base_vseq.sv:660) [chip_rv_dm_lc_disabled_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch 1 test run
chip_rv_dm_lc_disabled 18348561568304762424522289856750905398836673565742199824618688999463611022961 292
UVM_INFO @ 2056.649331 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---