| V1 |
|
0.00% |
| V2 |
|
0.00% |
| V2S |
|
0.00% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 0 | 1 | 0.00 | |||
| kmac_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_hw_reset | 0 | 1 | 0.00 | |||
| kmac_csr_hw_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_rw | 0 | 1 | 0.00 | |||
| kmac_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_bit_bash | 0 | 1 | 0.00 | |||
| kmac_csr_bit_bash | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_aliasing | 0 | 1 | 0.00 | |||
| kmac_csr_aliasing | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_mem_rw_with_rand_reset | 0 | 1 | 0.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| regwen_csr_and_corresponding_lockable_csr | 0 | 2 | 0.00 | |||
| kmac_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_csr_aliasing | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| mem_walk | 0 | 1 | 0.00 | |||
| kmac_mem_walk | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| mem_partial_access | 0 | 1 | 0.00 | |||
| kmac_mem_partial_access | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 0 | 1 | 0.00 | |||
| kmac_long_msg_and_output | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| burst_write | 0 | 1 | 0.00 | |||
| kmac_burst_write | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| test_vectors | 0 | 8 | 0.00 | |||
| kmac_test_vectors_sha3_224 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_sha3_256 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_sha3_384 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_sha3_512 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_shake_128 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_shake_256 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_kmac | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_kmac_xof | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sideload | 0 | 1 | 0.00 | |||
| kmac_sideload | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| app | 0 | 1 | 0.00 | |||
| kmac_app | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| app_with_partial_data | 0 | 1 | 0.00 | |||
| kmac_app_with_partial_data | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| entropy_refresh | 0 | 1 | 0.00 | |||
| kmac_entropy_refresh | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| error | 0 | 1 | 0.00 | |||
| kmac_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| key_error | 0 | 1 | 0.00 | |||
| kmac_key_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sideload_invalid | 0 | 1 | 0.00 | |||
| kmac_sideload_invalid | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| edn_timeout_error | 0 | 1 | 0.00 | |||
| kmac_edn_timeout_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| entropy_mode_error | 0 | 1 | 0.00 | |||
| kmac_entropy_mode_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| entropy_ready_error | 0 | 1 | 0.00 | |||
| kmac_entropy_ready_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| lc_escalation | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| kmac_stress_all | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| intr_test | 0 | 1 | 0.00 | |||
| kmac_intr_test | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| alert_test | 0 | 1 | 0.00 | |||
| kmac_alert_test | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_oob_addr_access | 0 | 1 | 0.00 | |||
| kmac_tl_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_illegal_access | 0 | 1 | 0.00 | |||
| kmac_tl_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_outstanding_access | 0 | 4 | 0.00 | |||
| kmac_csr_hw_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_csr_aliasing | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_same_csr_outstanding | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_partial_access | 0 | 4 | 0.00 | |||
| kmac_csr_hw_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_csr_aliasing | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_same_csr_outstanding | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 0 | 1 | 0.00 | |||
| kmac_shadow_reg_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| shadow_reg_read_clear_staged_value | 0 | 1 | 0.00 | |||
| kmac_shadow_reg_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| shadow_reg_storage_error | 0 | 1 | 0.00 | |||
| kmac_shadow_reg_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| shadowed_reset_glitch | 0 | 1 | 0.00 | |||
| kmac_shadow_reg_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| shadow_reg_update_error_with_csr_rw | 0 | 1 | 0.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_intg_err | 0 | 2 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_tl_intg_err | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 0 | 1 | 0.00 | |||
| kmac_tl_intg_err | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_sw_key_key_masking | 0 | 1 | 0.00 | |||
| kmac_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_key_sideload | 0 | 1 | 0.00 | |||
| kmac_sideload | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_shadow | 0 | 1 | 0.00 | |||
| kmac_shadow_reg_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_fsm_sparse | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_packer_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_regwen | 0 | 1 | 0.00 | |||
| kmac_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_fsm_global_esc | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_fsm_local_esc | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_absorbed_ctrl_mubi | 0 | 1 | 0.00 | |||
| kmac_mubi | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 0 | 1 | 0.00 | |||
| kmac_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| kmac_stress_all_with_rand_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job cancelled because one of its dependencies failed or was killed. | 41 test runs | |||
| kmac_smoke | 3784817573224239742328799734774057419047354992271165110645618772667410806359 | None | ||
| kmac_long_msg_and_output | 8366195258605716564160644981458565224216854300536221317247406956271779525839 | None | ||
| kmac_sideload | 112537335112777257759172407487319754782847753703539637783231854014100135878428 | None | ||
| kmac_sideload_invalid | 59073449268760738842644896776730128018906685129838422352532595447142249928079 | None | ||
| kmac_burst_write | 15895133563301519086133495567906880041551616174465849034298160396416955200448 | None | ||
| kmac_test_vectors_sha3_224 | 28631782353482641924854765297343564997767152782950646136330729713074250367495 | None | ||
| kmac_test_vectors_sha3_256 | 17578662049059173802957403787144924372871225616128261215335352238981928760232 | None | ||
| kmac_test_vectors_sha3_384 | 1864304189171680648913058148883396788631846763717099572512111899807582571845 | None | ||
| kmac_test_vectors_sha3_512 | 90881503560818454778506735160447347509792063908494648992387836308033536023220 | None | ||
| kmac_test_vectors_shake_128 | 961044869106557414829025883658471973108264212856768652599866225621183353082 | None | ||
| kmac_test_vectors_shake_256 | 44508388027802922594026590033258688898516483937751066907520976728289080722749 | None | ||
| kmac_test_vectors_kmac | 49026949756960121787826714706243717778817361721181939845852446211615176989942 | None | ||
| kmac_test_vectors_kmac_xof | 72114819544301941985385015630602165996513209513030629405938278429966565264109 | None | ||
| kmac_app | 20999252166984366755788754912019825405864693585197497867936004091032564395057 | None | ||
| kmac_app_with_partial_data | 48797380061482802918798095345247835830213287219031911539402302698982307705195 | None | ||
| kmac_entropy_refresh | 51798322266026062060338902222889744808396653340702420668508353804031395661333 | None | ||
| kmac_mubi | 9277926895308494107484496282030221594819072851587477027701970417288666184751 | None | ||
| kmac_error | 17375010880318096409401145593488065002708892757809927894273661093192593949689 | None | ||
| kmac_key_error | 50217113544715905258658917567492640583171886434187048894049513986047945045848 | None | ||
| kmac_edn_timeout_error | 37186913709014424093551685365998121108527052905025969853750684651822474609948 | None | ||
| kmac_entropy_mode_error | 47665938319805365201497931533696802147157206879547664685435478617829126549792 | None | ||
| kmac_entropy_ready_error | 100830971892170686702292773733684588120508855026096442129503908872864039743718 | None | ||
| kmac_lc_escalation | 16936153728810645391883723803339590783365799649403995178001663310922583238396 | None | ||
| kmac_stress_all | 84166640058223772229196201459129794826559790641597907261689710508762113890940 | None | ||
| kmac_stress_all_with_rand_reset | 68034189726523847435892205698294066747874742564045756081604617541855960808457 | None | ||
| kmac_sec_cm | 107889423333681036485813634844409093286425169873678960901719056298299680178599 | None | ||
| kmac_shadow_reg_errors | 100713028534536567910459542018519604078772173452011878758830839841600231092737 | None | ||
| kmac_shadow_reg_errors_with_csr_rw | 92670378718147424095264701802342827924650605906773744816024059307864272877197 | None | ||
| kmac_alert_test | 43668265533154041516818257635553270335221590147281260231313042975875715179202 | None | ||
| kmac_mem_walk | 99271772097218172781470373882242768125849937449506505760625467853565420272106 | None | ||
| kmac_mem_partial_access | 110758385292723486946451205096405933726903990190354310039796420093094656634938 | None | ||
| kmac_tl_errors | 35981835737894897496569331680158907038463228946464145556138082290831833120611 | None | ||
| kmac_tl_intg_err | 33689377805225999003646049570511371956376973516431266611378583628399476512367 | None | ||
| kmac_intr_test | 34313347151785872678231102301558904420374153374713161506395049771473461016530 | None | ||
| kmac_csr_hw_reset | 49546027851889798180974586099477969513453825212258319987220536790561249960889 | None | ||
| kmac_csr_rw | 45696653758609617683561306407870834644417439682782048109267168928822412952890 | None | ||
| kmac_csr_bit_bash | 86651128909528338090093865403190523828325881682748268539626199479423840814949 | None | ||
| kmac_csr_aliasing | 35722113260128846435091482527062725425071488765280804405704102636155545285931 | None | ||
| kmac_same_csr_outstanding | 115383339816527722402567035159916329052202323627344222814131089590620860948430 | None | ||
| kmac_csr_mem_rw_with_rand_reset | 43409596360489246766268436909396563156850727780384079694695349773871255349195 | None | ||
| kmac | None | None | ||
| Job returned a non-zero exit code: * | 2 test runs | |||
| default | None | None |
Please migrate to -fullopt=2024.09 or -fullopt=2025.06.
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
CPU time: 1.131 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 255
|
|
| cover_reg_top | None | None |
Please migrate to -fullopt=2024.09 or -fullopt=2025.06.
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
CPU time: 1.144 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 255
|
|
| Job cancelled because all of its dependencies failed or were killed. | 1 test run | |||
| kmac | None | None | ||