| V1 |
|
87.50% |
| V2 |
|
20.69% |
| V2S |
|
37.50% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 0 | 1 | 0.00 | |||
| kmac_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| kmac_csr_hw_reset | 0.530s | 95.446us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| kmac_csr_rw | 0.500s | 118.773us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| kmac_csr_bit_bash | 4.380s | 439.708us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| kmac_csr_aliasing | 0.620s | 42.881us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 0.930s | 132.989us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| kmac_csr_rw | 0.500s | 118.773us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 0.620s | 42.881us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| kmac_mem_walk | 0.350s | 20.974us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| kmac_mem_partial_access | 0.610s | 138.954us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 0 | 1 | 0.00 | |||
| kmac_long_msg_and_output | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| burst_write | 0 | 1 | 0.00 | |||
| kmac_burst_write | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| test_vectors | 0 | 8 | 0.00 | |||
| kmac_test_vectors_sha3_224 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_sha3_256 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_sha3_384 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_sha3_512 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_shake_128 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_shake_256 | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_kmac | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_kmac_xof | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sideload | 0 | 1 | 0.00 | |||
| kmac_sideload | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| app | 0 | 1 | 0.00 | |||
| kmac_app | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| app_with_partial_data | 0 | 1 | 0.00 | |||
| kmac_app_with_partial_data | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| entropy_refresh | 0 | 1 | 0.00 | |||
| kmac_entropy_refresh | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| error | 0 | 1 | 0.00 | |||
| kmac_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| key_error | 0 | 1 | 0.00 | |||
| kmac_key_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sideload_invalid | 0 | 1 | 0.00 | |||
| kmac_sideload_invalid | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| edn_timeout_error | 0 | 1 | 0.00 | |||
| kmac_edn_timeout_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| entropy_mode_error | 0 | 1 | 0.00 | |||
| kmac_entropy_mode_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| entropy_ready_error | 0 | 1 | 0.00 | |||
| kmac_entropy_ready_error | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| lc_escalation | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| kmac_stress_all | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| kmac_intr_test | 0.350s | 40.846us | 1 | 1 | 100.00 | |
| alert_test | 0 | 1 | 0.00 | |||
| kmac_alert_test | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 0.800s | 24.703us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 0.800s | 24.703us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 0.530s | 95.446us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.500s | 118.773us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 0.620s | 42.881us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 0.990s | 43.460us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 0.530s | 95.446us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.500s | 118.773us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 0.620s | 42.881us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 0.990s | 43.460us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 0.780s | 199.756us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 0.780s | 199.756us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 0.780s | 199.756us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 0.780s | 199.756us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 1.940s | 322.265us | 1 | 1 | 100.00 | |
| tl_intg_err | 1 | 2 | 50.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| kmac_tl_intg_err | 2.440s | 218.252us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| kmac_tl_intg_err | 2.440s | 218.252us | 1 | 1 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_sw_key_key_masking | 0 | 1 | 0.00 | |||
| kmac_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_key_sideload | 0 | 1 | 0.00 | |||
| kmac_sideload | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_shadow | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 0.780s | 199.756us | 1 | 1 | 100.00 | |
| sec_cm_fsm_sparse | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_packer_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_regwen | 0 | 1 | 0.00 | |||
| kmac_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_fsm_global_esc | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_fsm_local_esc | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_absorbed_ctrl_mubi | 0 | 1 | 0.00 | |||
| kmac_mubi | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 0 | 1 | 0.00 | |||
| kmac_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| kmac_stress_all_with_rand_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job cancelled because one of its dependencies failed or was killed. | 27 test runs | |||
| kmac_smoke | 115660594125699625551346334539463780532182174705494269755263581689283096986472 | None | ||
| kmac_long_msg_and_output | 14801266620376107096383416528726833767393485362742422098060382265434731713920 | None | ||
| kmac_sideload | 62128980774002594363229474507049682854989337515529625795540586196569402909798 | None | ||
| kmac_sideload_invalid | 85483163233305629827314943166139315373952221580039429556528309936930844606377 | None | ||
| kmac_burst_write | 105330110932159461832636597191176166152358561698783183140665914909341369363454 | None | ||
| kmac_test_vectors_sha3_224 | 58949394428704315536470412571576489579798323366939532272513443626717772816181 | None | ||
| kmac_test_vectors_sha3_256 | 114792724211034619345881756590928045125266826322331172135686173386488321799227 | None | ||
| kmac_test_vectors_sha3_384 | 45618987709777940702015391727281426628290754882784386920093573072242118907075 | None | ||
| kmac_test_vectors_sha3_512 | 10070492236658543489765686473686515474601707744307530778340844884472358976993 | None | ||
| kmac_test_vectors_shake_128 | 60461858893316224665479426610137735223437065185720224218218407952451495713501 | None | ||
| kmac_test_vectors_shake_256 | 92531782538467499226529988175137465537210044084493315156673759312864008491569 | None | ||
| kmac_test_vectors_kmac | 53398388207949450160343918580294359069319366327335772522707414866589504917114 | None | ||
| kmac_test_vectors_kmac_xof | 103120153568981889270159252589327592579419447878637736903016708134432502307053 | None | ||
| kmac_app | 7877567159159540553484623117401171050898095317282526910002407993822139409313 | None | ||
| kmac_app_with_partial_data | 50993251948758004304269015407558188062398880756442893765448695024240678868503 | None | ||
| kmac_entropy_refresh | 55406672195751925501004159644132769113000424636028937219417868102160114755979 | None | ||
| kmac_mubi | 109224612009388791023466446620995419040946179029983533335380440367284207768791 | None | ||
| kmac_error | 58885566532081600980932581777937044129424991118699214003282175384857437684132 | None | ||
| kmac_key_error | 75917826199188300942985503304157934902395860271656624489898769742911774206110 | None | ||
| kmac_edn_timeout_error | 44218600919772858256172562019460886341960089338306385072639181103531189138180 | None | ||
| kmac_entropy_mode_error | 115448517697688275439907822924313836435400591215188122584692190387722385639830 | None | ||
| kmac_entropy_ready_error | 106546336710431554356398273572759554624676545198992710833001913417129192716204 | None | ||
| kmac_lc_escalation | 68581506940824392399228997504711988975498375224097311889697681848393471240666 | None | ||
| kmac_stress_all | 86450911766723590580560268430870940214675418084724817291605085578119850624979 | None | ||
| kmac_stress_all_with_rand_reset | 91453243545359781901268536532001592728944677030680178759912435916002837124714 | None | ||
| kmac_sec_cm | 110586579441213147539713018734253743860230121688173701515775884795791521515427 | None | ||
| kmac_alert_test | 60661808427410765177526592291862455794795027238420824390784917738720824567720 | None | ||
| Job returned a non-zero exit code: * | 1 test run | |||
| default | None | None |
Please migrate to -fullopt=2024.09 or -fullopt=2025.06.
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
CPU time: 1.144 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 255
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