| V1 |
|
100.00% |
| V2 |
|
88.24% |
| V2S |
|
100.00% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 2 | 2 | 100.00 | |||
| otbn_smoke | 13.000s | 123.360us | 1 | 1 | 100.00 | |
| otbn_smoke_vectorized | 4.000s | 74.839us | 1 | 1 | 100.00 | |
| single_binary | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| otbn_csr_hw_reset | 34.000s | 18.480us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| otbn_csr_rw | 31.000s | 16.290us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| otbn_csr_bit_bash | 27.000s | 607.567us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| otbn_csr_aliasing | 32.000s | 24.448us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| otbn_csr_mem_rw_with_rand_reset | 31.000s | 68.433us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| otbn_csr_rw | 31.000s | 16.290us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 32.000s | 24.448us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| otbn_mem_walk | 71.000s | 6445.759us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| otbn_mem_partial_access | 54.000s | 4562.871us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reset_recovery | 1 | 1 | 100.00 | |||
| otbn_reset | 18.000s | 303.560us | 1 | 1 | 100.00 | |
| multi_error | 1 | 1 | 100.00 | |||
| otbn_multi_err | 57.000s | 431.990us | 1 | 1 | 100.00 | |
| wfi | 1 | 3 | 33.33 | |||
| otbn_wfi_smoke | 5.000s | 28.654us | 0 | 1 | 0.00 | |
| otbn_wfi_sec_wipe | 4.000s | 133.621us | 1 | 1 | 100.00 | |
| otbn_wfi_back_to_back | 3.000s | 8.661us | 0 | 1 | 0.00 | |
| back_to_back | 1 | 1 | 100.00 | |||
| otbn_multi | 22.000s | 81.988us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| otbn_stress_all | 28.000s | 317.558us | 1 | 1 | 100.00 | |
| lc_escalation | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 75.336us | 1 | 1 | 100.00 | |
| zero_state_err_urnd | 1 | 1 | 100.00 | |||
| otbn_zero_state_err_urnd | 5.000s | 43.803us | 1 | 1 | 100.00 | |
| sw_errs_fatal_chk | 1 | 1 | 100.00 | |||
| otbn_sw_errs_fatal_chk | 7.000s | 55.552us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| otbn_alert_test | 31.000s | 17.363us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| otbn_intr_test | 24.000s | 41.221us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 3.000s | 62.631us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 3.000s | 62.631us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 34.000s | 18.480us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 31.000s | 16.290us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 32.000s | 24.448us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 4.000s | 67.210us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 34.000s | 18.480us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 31.000s | 16.290us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 32.000s | 24.448us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 4.000s | 67.210us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| mem_integrity | 2 | 2 | 100.00 | |||
| otbn_imem_err | 5.000s | 101.928us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 4.000s | 48.949us | 1 | 1 | 100.00 | |
| internal_integrity | 4 | 4 | 100.00 | |||
| otbn_alu_bignum_mod_err | 6.000s | 376.272us | 1 | 1 | 100.00 | |
| otbn_controller_ispr_rdata_err | 7.000s | 115.502us | 1 | 1 | 100.00 | |
| otbn_mac_bignum_acc_err | 8.000s | 69.874us | 1 | 1 | 100.00 | |
| otbn_urnd_err | 3.000s | 37.890us | 1 | 1 | 100.00 | |
| illegal_bus_access | 1 | 1 | 100.00 | |||
| otbn_illegal_mem_acc | 4.000s | 25.750us | 1 | 1 | 100.00 | |
| otbn_mem_gnt_acc_err | 1 | 1 | 100.00 | |||
| otbn_mem_gnt_acc_err | 6.000s | 42.521us | 1 | 1 | 100.00 | |
| otbn_non_sec_partial_wipe | 1 | 1 | 100.00 | |||
| otbn_partial_wipe | 3.000s | 27.599us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| otbn_tl_intg_err | 13.000s | 507.743us | 1 | 1 | 100.00 | |
| passthru_mem_tl_intg_err | 1 | 1 | 100.00 | |||
| otbn_passthru_mem_tl_intg_err | 47.000s | 234.843us | 1 | 1 | 100.00 | |
| prim_fsm_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| prim_count_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_mem_scramble | 1 | 1 | 100.00 | |||
| otbn_smoke | 13.000s | 123.360us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_dmem_err | 4.000s | 48.949us | 1 | 1 | 100.00 | |
| sec_cm_instruction_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_imem_err | 5.000s | 101.928us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| otbn_tl_intg_err | 13.000s | 507.743us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 75.336us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 5.000s | 101.928us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 4.000s | 48.949us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 5.000s | 43.803us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 4.000s | 25.750us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_scramble_key_sideload | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 5.000s | 101.928us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 4.000s | 48.949us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 5.000s | 43.803us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 4.000s | 25.750us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 75.336us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 5.000s | 101.928us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 4.000s | 48.949us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 5.000s | 43.803us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 4.000s | 25.750us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sca | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_redun | 1 | 1 | 100.00 | |||
| otbn_ctrl_redun | 6.000s | 30.288us | 1 | 1 | 100.00 | |
| sec_cm_pc_ctrl_flow_redun | 1 | 1 | 100.00 | |||
| otbn_pc_ctrl_flow_redun | 5.000s | 13.226us | 1 | 1 | 100.00 | |
| sec_cm_rnd_bus_consistency | 1 | 1 | 100.00 | |||
| otbn_rnd_sec_cm | 19.000s | 404.699us | 1 | 1 | 100.00 | |
| sec_cm_rnd_rng_digest | 1 | 1 | 100.00 | |||
| otbn_rnd_sec_cm | 19.000s | 404.699us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_base_intg_err | 6.000s | 20.350us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_stack_wr_ptr_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_bignum_intg_err | 5.000s | 201.436us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_addr_integrity | 1 | 1 | 100.00 | |||
| otbn_stack_addr_integ_chk | 10.000s | 88.487us | 1 | 1 | 100.00 | |
| sec_cm_call_stack_addr_integrity | 1 | 1 | 100.00 | |||
| otbn_stack_addr_integ_chk | 10.000s | 88.487us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_state_consistency | 1 | 1 | 100.00 | |||
| otbn_sec_wipe_err | 3.000s | 16.733us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| sec_cm_instruction_mem_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| sec_cm_write_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_multi | 22.000s | 81.988us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_flow_count | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_flow_sca | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_sw_noaccess | 1 | 1 | 100.00 | |||
| otbn_sw_no_acc | 5.000s | 107.597us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| otbn_single | 4.000s | 47.251us | 1 | 1 | 100.00 | |
| sec_cm_tlul_fifo_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 83.000s | 840.814us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| otbn_stress_all_with_rand_reset | 17.000s | 13.628us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (otbn_scoreboard.sv:440) [scoreboard] Check failed model_status == * (* [*] vs * [*]) Saw instruction when not in BUSY_EXECUTE operational state. | 2 test runs | |||
| otbn_wfi_smoke | 66866305742706855731491903950596688387656413680110667791343571376414911605851 | 119 |
UVM_INFO @ 28654109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_wfi_back_to_back | 17249151556329744349074275708681806008372312314880209268210675327899726059080 | 121 |
UVM_INFO @ 8661343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* | 1 test run | |||
| otbn_stress_all_with_rand_reset | 90273452586743844723482253220914622062464690484862187678710219772640038808021 | 153 |
UVM_INFO @ 13627589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|