Simulation Results: chip

 
08/09/2026 16:50:36 DVSim: v1.52.1 sha: 1c01039 json Branch: master Tool: vcs [X-2025.06-SP2-1_Full64]
Coverage statistics
  • Total
  • 69.17 %
  • code
  • 76.01 %
  • assert
  • 96.61 %
  • func
  • 34.89 %
  • line
  • 93.66 %
  • branch
  • 93.28 %
  • cond
  • 89.72 %
  • toggle
  • 70.06 %
  • FSM
  • 33.33 %
Validation stages
V1
94.12%
V2
78.71%
V2S
100.00%
V3
56.00%
unmapped
12.50%
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_example_tests 3 3 100.00
chip_sw_example_rom 64.760s 2125.178us 1 1 100.00
chip_sw_example_manufacturer 149.290s 3042.564us 1 1 100.00
chip_sw_example_concurrency 139.550s 2806.212us 1 1 100.00
csr_hw_reset 1 1 100.00
chip_csr_hw_reset 335.810s 11210.112us 1 1 100.00
csr_rw 1 1 100.00
chip_csr_rw 346.270s 11883.223us 1 1 100.00
csr_bit_bash 1 1 100.00
chip_csr_bit_bash 592.980s 17791.518us 1 1 100.00
csr_aliasing 0 1 0.00
chip_csr_aliasing 10800.063s 0.000us 0 1 0.00
csr_mem_rw_with_rand_reset 1 1 100.00
chip_csr_mem_rw_with_rand_reset 652.740s 15358.964us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 1 2 50.00
chip_csr_aliasing 10800.063s 0.000us 0 1 0.00
chip_csr_rw 346.270s 11883.223us 1 1 100.00
xbar_smoke 1 1 100.00
xbar_smoke 3.800s 172.893us 1 1 100.00
chip_sw_gpio_out 1 1 100.00
chip_sw_gpio 311.750s 4274.474us 1 1 100.00
chip_sw_gpio_in 1 1 100.00
chip_sw_gpio 311.750s 4274.474us 1 1 100.00
chip_sw_gpio_irq 1 1 100.00
chip_sw_gpio 311.750s 4274.474us 1 1 100.00
chip_sw_uart_tx_rx 1 1 100.00
chip_sw_uart_tx_rx 362.920s 4419.170us 1 1 100.00
chip_sw_uart_rx_overflow 4 4 100.00
chip_sw_uart_tx_rx 362.920s 4419.170us 1 1 100.00
chip_sw_uart_tx_rx_idx1 348.490s 3709.796us 1 1 100.00
chip_sw_uart_tx_rx_idx2 355.850s 4749.934us 1 1 100.00
chip_sw_uart_tx_rx_idx3 359.860s 4130.138us 1 1 100.00
chip_sw_uart_baud_rate 1 1 100.00
chip_sw_uart_rand_baudrate 980.180s 8579.728us 1 1 100.00
chip_sw_uart_tx_rx_alt_clk_freq 2 2 100.00
chip_sw_uart_tx_rx_alt_clk_freq 1086.080s 8703.831us 1 1 100.00
chip_sw_uart_tx_rx_alt_clk_freq_low_speed 232.780s 3403.073us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_pin_mux 1 1 100.00
chip_padctrl_attributes 267.850s 9795.384us 1 1 100.00
chip_padctrl_attributes 1 1 100.00
chip_padctrl_attributes 267.850s 9795.384us 1 1 100.00
chip_sw_sleep_pin_mio_dio_val 1 1 100.00
chip_sw_sleep_pin_mio_dio_val 210.090s 2746.689us 1 1 100.00
chip_sw_sleep_pin_wake 1 1 100.00
chip_sw_sleep_pin_wake 239.190s 4978.816us 1 1 100.00
chip_sw_sleep_pin_retention 0 1 0.00
chip_sw_sleep_pin_retention 162.770s 2940.770us 0 1 0.00
chip_sw_tap_strap_sampling 4 4 100.00
chip_tap_straps_dev 89.050s 2932.199us 1 1 100.00
chip_tap_straps_testunlock0 205.340s 5205.043us 1 1 100.00
chip_tap_straps_rma 259.570s 5998.146us 1 1 100.00
chip_tap_straps_prod 409.420s 8161.528us 1 1 100.00
chip_sw_data_integrity 1 1 100.00
chip_sw_data_integrity_escalation 461.040s 4936.121us 1 1 100.00
chip_sw_instruction_integrity 1 1 100.00
chip_sw_data_integrity_escalation 461.040s 4936.121us 1 1 100.00
chip_sw_ast_clk_outputs 1 1 100.00
chip_sw_ast_clk_outputs 646.690s 8235.895us 1 1 100.00
chip_sw_ast_clk_rst_inputs 0 1 0.00
chip_sw_ast_clk_rst_inputs 815.440s 9156.403us 0 1 0.00
chip_sw_ast_sys_clk_jitter 7 8 87.50
chip_sw_otbn_ecdsa_op_irq_jitter_en 332.606s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en 165.520s 2922.774us 1 1 100.00
chip_sw_edn_entropy_reqs_jitter 845.890s 6458.231us 1 1 100.00
chip_sw_hmac_enc_jitter_en 195.500s 2995.779us 1 1 100.00
chip_sw_keymgr_dpe_key_derivation_jitter_en 1367.210s 10109.058us 1 1 100.00
chip_sw_kmac_mode_kmac_jitter_en 210.620s 3054.470us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 403.180s 5145.367us 1 1 100.00
chip_sw_clkmgr_jitter 168.400s 3101.180us 1 1 100.00
chip_sw_ast_usb_clk_calib 1 1 100.00
chip_sw_usb_ast_clk_calib 186.630s 2420.733us 1 1 100.00
chip_sw_sensor_ctrl_ast_alerts 1 2 50.00
chip_sw_sensor_ctrl_alert 449.000s 6658.030us 1 1 100.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 139.180s 2724.346us 0 1 0.00
chip_sw_sensor_ctrl_ast_status 1 1 100.00
chip_sw_sensor_ctrl_status 121.780s 2638.607us 1 1 100.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 0 1 0.00
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 139.180s 2724.346us 0 1 0.00
chip_sw_smoketest 16 16 100.00
chip_sw_aes_smoketest 200.870s 3054.719us 1 1 100.00
chip_sw_aon_timer_smoketest 179.480s 3397.664us 1 1 100.00
chip_sw_clkmgr_smoketest 137.920s 2242.419us 1 1 100.00
chip_sw_csrng_smoketest 135.700s 2721.360us 1 1 100.00
chip_sw_entropy_src_smoketest 828.290s 6479.308us 1 1 100.00
chip_sw_gpio_smoketest 170.160s 2634.922us 1 1 100.00
chip_sw_hmac_smoketest 229.530s 3054.270us 1 1 100.00
chip_sw_kmac_smoketest 221.680s 3077.495us 1 1 100.00
chip_sw_otbn_smoketest 890.160s 6561.214us 1 1 100.00
chip_sw_pwrmgr_smoketest 233.220s 5135.890us 1 1 100.00
chip_sw_pwrmgr_usbdev_smoketest 353.570s 5747.408us 1 1 100.00
chip_sw_rv_plic_smoketest 135.980s 2491.165us 1 1 100.00
chip_sw_rv_timer_smoketest 200.390s 3552.238us 1 1 100.00
chip_sw_rstmgr_smoketest 166.490s 3029.139us 1 1 100.00
chip_sw_sram_ctrl_smoketest 128.700s 2315.125us 1 1 100.00
chip_sw_uart_smoketest 195.880s 3268.973us 1 1 100.00
chip_sw_otp_smoketest 1 1 100.00
chip_sw_otp_ctrl_smoketest 184.390s 2844.366us 1 1 100.00
chip_sw_rom_functests 1 1 100.00
rom_keymgr_dpe_functest 302.210s 4775.718us 1 1 100.00
chip_sw_boot 1 1 100.00
chip_sw_uart_tx_rx_bootstrap 17105.910s 127381.646us 1 1 100.00
chip_sw_secure_boot 1 1 100.00
rom_e2e_smoke 3160.520s 15456.231us 1 1 100.00
chip_sw_rom_raw_unlock 0 1 0.00
rom_raw_unlock 291.540s 11254.358us 0 1 0.00
chip_sw_power_idle_load 1 1 100.00
chip_sw_power_idle_load 391.880s 4215.940us 1 1 100.00
chip_sw_power_sleep_load 1 1 100.00
chip_sw_power_sleep_load 323.610s 9864.716us 1 1 100.00
chip_sw_exit_test_unlocked_bootstrap 0 1 0.00
chip_sw_exit_test_unlocked_bootstrap 13200.070s 0.000us 0 1 0.00
tl_d_oob_addr_access 1 1 100.00
chip_tl_errors 323.700s 7432.152us 1 1 100.00
tl_d_illegal_access 1 1 100.00
chip_tl_errors 323.700s 7432.152us 1 1 100.00
tl_d_outstanding_access 3 4 75.00
chip_csr_aliasing 10800.063s 0.000us 0 1 0.00
chip_same_csr_outstanding 779.140s 19946.858us 1 1 100.00
chip_csr_hw_reset 335.810s 11210.112us 1 1 100.00
chip_csr_rw 346.270s 11883.223us 1 1 100.00
tl_d_partial_access 3 4 75.00
chip_csr_aliasing 10800.063s 0.000us 0 1 0.00
chip_same_csr_outstanding 779.140s 19946.858us 1 1 100.00
chip_csr_hw_reset 335.810s 11210.112us 1 1 100.00
chip_csr_rw 346.270s 11883.223us 1 1 100.00
xbar_base_random_sequence 1 1 100.00
xbar_random 18.320s 880.314us 1 1 100.00
xbar_random_delay 6 6 100.00
xbar_smoke_zero_delays 3.160s 45.441us 1 1 100.00
xbar_smoke_large_delays 33.670s 8787.636us 1 1 100.00
xbar_smoke_slow_rsp 31.960s 5974.102us 1 1 100.00
xbar_random_zero_delays 8.870s 168.042us 1 1 100.00
xbar_random_large_delays 42.590s 10745.198us 1 1 100.00
xbar_random_slow_rsp 35.900s 6157.402us 1 1 100.00
xbar_unmapped_address 2 2 100.00
xbar_unmapped_addr 9.290s 129.089us 1 1 100.00
xbar_error_and_unmapped_addr 22.120s 964.541us 1 1 100.00
xbar_error_cases 2 2 100.00
xbar_error_random 18.850s 433.657us 1 1 100.00
xbar_error_and_unmapped_addr 22.120s 964.541us 1 1 100.00
xbar_all_access_same_device 2 2 100.00
xbar_access_same_device 20.780s 621.423us 1 1 100.00
xbar_access_same_device_slow_rsp 196.190s 34381.422us 1 1 100.00
xbar_all_hosts_use_same_source_id 1 1 100.00
xbar_same_source 30.980s 2126.187us 1 1 100.00
xbar_stress_all 2 2 100.00
xbar_stress_all 9.810s 433.489us 1 1 100.00
xbar_stress_all_with_error 53.760s 2910.299us 1 1 100.00
xbar_stress_with_reset 2 2 100.00
xbar_stress_all_with_rand_reset 135.570s 2636.161us 1 1 100.00
xbar_stress_all_with_reset_error 17.540s 53.233us 1 1 100.00
rom_e2e_smoke 1 1 100.00
rom_e2e_smoke 3160.520s 15456.231us 1 1 100.00
rom_e2e_shutdown_output 0 1 0.00
rom_e2e_shutdown_output 1513.410s 17343.426us 0 1 0.00
rom_e2e_shutdown_exception_c 1 1 100.00
rom_e2e_shutdown_exception_c 3422.630s 21929.445us 1 1 100.00
rom_e2e_boot_policy_valid 6 15 40.00
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 337.890s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_dev 195.831s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_prod 188.079s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_good_prod_end 3295.620s 16148.012us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_good_rma 3213.050s 15098.809us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 2574.570s 10961.797us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_bad_dev 293.534s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_prod 3432.170s 17637.786us 1 1 100.00
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end 267.400s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_good_b_bad_rma 350.264s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 340.103s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_dev 5840.590s 25893.426us 1 1 100.00
rom_e2e_boot_policy_valid_a_bad_b_good_prod 317.455s 0.000us 0 1 0.00
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end 5797.150s 24672.005us 1 1 100.00
rom_e2e_boot_policy_valid_a_bad_b_good_rma 300.010s 0.000us 0 1 0.00
rom_e2e_sigverify_always 14 15 93.33
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 345.168s 0.000us 0 1 0.00
rom_e2e_sigverify_always_a_bad_b_bad_dev 5691.880s 31192.426us 1 1 100.00
rom_e2e_sigverify_always_a_bad_b_bad_prod 5697.500s 37610.448us 1 1 100.00
rom_e2e_sigverify_always_a_bad_b_bad_prod_end 5599.950s 29117.131us 1 1 100.00
rom_e2e_sigverify_always_a_bad_b_bad_rma 5457.480s 21989.307us 1 1 100.00
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 2465.860s 11164.934us 1 1 100.00
rom_e2e_sigverify_always_a_bad_b_nothing_dev 2975.530s 21233.915us 1 1 100.00
rom_e2e_sigverify_always_a_bad_b_nothing_prod 3223.400s 20843.776us 1 1 100.00
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end 3079.700s 19521.410us 1 1 100.00
rom_e2e_sigverify_always_a_bad_b_nothing_rma 3254.460s 18210.110us 1 1 100.00
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 2489.530s 16174.608us 1 1 100.00
rom_e2e_sigverify_always_a_nothing_b_bad_dev 3206.780s 19487.363us 1 1 100.00
rom_e2e_sigverify_always_a_nothing_b_bad_prod 3649.900s 30786.582us 1 1 100.00
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end 3424.070s 27324.789us 1 1 100.00
rom_e2e_sigverify_always_a_nothing_b_bad_rma 3214.360s 18458.118us 1 1 100.00
rom_e2e_asm_init 4 5 80.00
rom_e2e_asm_init_test_unlocked0 1092.479s 0.000us 0 1 0.00
rom_e2e_asm_init_dev 3464.410s 15997.512us 1 1 100.00
rom_e2e_asm_init_prod 3221.870s 16202.098us 1 1 100.00
rom_e2e_asm_init_prod_end 3409.350s 15761.304us 1 1 100.00
rom_e2e_asm_init_rma 3197.400s 14829.676us 1 1 100.00
rom_e2e_keymgr_dpe_init 3 3 100.00
rom_e2e_keymgr_dpe_init_rom_ext_meas 6454.300s 29376.155us 1 1 100.00
rom_e2e_keymgr_dpe_init_rom_ext_no_meas 6097.370s 29331.130us 1 1 100.00
rom_e2e_keymgr_dpe_init_rom_ext_invalid_meas 6241.330s 30131.455us 1 1 100.00
rom_e2e_static_critical 1 1 100.00
rom_e2e_static_critical 3251.190s 16186.891us 1 1 100.00
chip_sw_adc_ctrl_debug_cable_irq 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 3285.470s 34612.861us 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 0 1 0.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 3285.470s 34612.861us 0 1 0.00
chip_sw_aes_enc 2 2 100.00
chip_sw_aes_enc 174.760s 2400.542us 1 1 100.00
chip_sw_aes_enc_jitter_en 165.520s 2922.774us 1 1 100.00
chip_sw_aes_entropy 1 1 100.00
chip_sw_aes_entropy 151.340s 3099.076us 1 1 100.00
chip_sw_aes_idle 1 1 100.00
chip_sw_aes_idle 192.270s 2940.876us 1 1 100.00
chip_sw_aes_sideload 1 1 100.00
chip_sw_keymgr_dpe_sideload_aes 1684.410s 11895.305us 1 1 100.00
chip_sw_alert_handler_alerts 0 1 0.00
chip_sw_alert_test 153.010s 2549.953us 0 1 0.00
chip_sw_alert_handler_escalations 1 1 100.00
chip_sw_alert_handler_escalation 261.880s 4522.002us 1 1 100.00
chip_sw_all_escalation_resets 1 1 100.00
chip_sw_all_escalation_resets 298.550s 5129.303us 1 1 100.00
chip_sw_alert_handler_irqs 3 3 100.00
chip_plic_all_irqs_0 441.830s 4915.441us 1 1 100.00
chip_plic_all_irqs_10 312.160s 3871.272us 1 1 100.00
chip_plic_all_irqs_20 353.710s 4181.881us 1 1 100.00
chip_sw_alert_handler_entropy 0 1 0.00
chip_sw_alert_handler_entropy 158.970s 2964.885us 0 1 0.00
chip_sw_alert_handler_crashdump 1 1 100.00
chip_sw_rstmgr_alert_info 892.820s 11503.999us 1 1 100.00
chip_sw_alert_handler_ping_timeout 1 1 100.00
chip_sw_alert_handler_ping_timeout 222.850s 3619.613us 1 1 100.00
chip_sw_alert_handler_lpg_sleep_mode_alerts 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_alerts 127.250s 2572.485us 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_pings 0 1 0.00
chip_sw_alert_handler_lpg_sleep_mode_pings 150.560s 2689.043us 0 1 0.00
chip_sw_alert_handler_lpg_clock_off 1 1 100.00
chip_sw_alert_handler_lpg_clkoff 1109.860s 9191.761us 1 1 100.00
chip_sw_alert_handler_lpg_reset_toggle 0 1 0.00
chip_sw_alert_handler_lpg_reset_toggle 63.224s 0.000us 0 1 0.00
chip_sw_alert_handler_ping_ok 1 1 100.00
chip_sw_alert_handler_ping_ok 889.500s 7687.201us 1 1 100.00
chip_sw_alert_handler_reverse_ping_in_deep_sleep 1 1 100.00
chip_sw_alert_handler_reverse_ping_in_deep_sleep 8474.170s 254079.628us 1 1 100.00
chip_sw_aon_timer_wakeup_irq 1 1 100.00
chip_sw_aon_timer_irq 212.520s 3475.650us 1 1 100.00
chip_sw_aon_timer_sleep_wakeup 1 1 100.00
chip_sw_pwrmgr_smoketest 233.220s 5135.890us 1 1 100.00
chip_sw_aon_timer_wdog_bark_irq 1 1 100.00
chip_sw_aon_timer_irq 212.520s 3475.650us 1 1 100.00
chip_sw_aon_timer_wdog_bite_reset 1 1 100.00
chip_sw_aon_timer_wdog_bite_reset 525.210s 8455.533us 1 1 100.00
chip_sw_aon_timer_sleep_wdog_bite_reset 1 1 100.00
chip_sw_aon_timer_wdog_bite_reset 525.210s 8455.533us 1 1 100.00
chip_sw_aon_timer_sleep_wdog_sleep_pause 1 1 100.00
chip_sw_aon_timer_sleep_wdog_sleep_pause 306.450s 7341.366us 1 1 100.00
chip_sw_aon_timer_wdog_lc_escalate 1 1 100.00
chip_sw_aon_timer_wdog_lc_escalate 425.300s 5477.351us 1 1 100.00
chip_sw_clkmgr_idle_trans 4 4 100.00
chip_sw_otbn_randomness 655.510s 5885.776us 1 1 100.00
chip_sw_aes_idle 192.270s 2940.876us 1 1 100.00
chip_sw_hmac_enc_idle 177.740s 3012.960us 1 1 100.00
chip_sw_kmac_idle 135.840s 2226.748us 1 1 100.00
chip_sw_clkmgr_off_trans 4 4 100.00
chip_sw_clkmgr_off_aes_trans 250.080s 3976.855us 1 1 100.00
chip_sw_clkmgr_off_hmac_trans 281.070s 4177.558us 1 1 100.00
chip_sw_clkmgr_off_kmac_trans 288.190s 4160.992us 1 1 100.00
chip_sw_clkmgr_off_otbn_trans 251.420s 3565.233us 1 1 100.00
chip_sw_clkmgr_off_peri 1 1 100.00
chip_sw_clkmgr_off_peri 945.020s 10937.990us 1 1 100.00
chip_sw_clkmgr_div 7 7 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 354.980s 3949.363us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 355.790s 4872.515us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 373.190s 4387.944us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 377.940s 4948.895us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 391.570s 3801.488us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 378.960s 4635.140us 1 1 100.00
chip_sw_ast_clk_outputs 646.690s 8235.895us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_lc 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_lc 1135.090s 21935.145us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw 2 2 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 373.190s 4387.944us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 377.940s 4948.895us 1 1 100.00
chip_sw_clkmgr_jitter 7 8 87.50
chip_sw_otbn_ecdsa_op_irq_jitter_en 332.606s 0.000us 0 1 0.00
chip_sw_aes_enc_jitter_en 165.520s 2922.774us 1 1 100.00
chip_sw_edn_entropy_reqs_jitter 845.890s 6458.231us 1 1 100.00
chip_sw_hmac_enc_jitter_en 195.500s 2995.779us 1 1 100.00
chip_sw_keymgr_dpe_key_derivation_jitter_en 1367.210s 10109.058us 1 1 100.00
chip_sw_kmac_mode_kmac_jitter_en 210.620s 3054.470us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 403.180s 5145.367us 1 1 100.00
chip_sw_clkmgr_jitter 168.400s 3101.180us 1 1 100.00
chip_sw_clkmgr_extended_range 7 8 87.50
chip_sw_clkmgr_jitter_reduced_freq 116.890s 2928.792us 1 1 100.00
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq 3854.130s 25257.989us 1 1 100.00
chip_sw_aes_enc_jitter_en_reduced_freq 143.570s 2953.844us 1 1 100.00
chip_sw_hmac_enc_jitter_en_reduced_freq 180.380s 3055.592us 1 1 100.00
chip_sw_keymgr_dpe_key_derivation_jitter_en_reduced_freq 1295.330s 12578.826us 1 1 100.00
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq 202.530s 2890.829us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq 310.400s 4372.281us 1 1 100.00
chip_sw_csrng_edn_concurrency_reduced_freq 425.218s 0.000us 0 1 0.00
chip_sw_clkmgr_deep_sleep_frequency 1 1 100.00
chip_sw_ast_clk_outputs 646.690s 8235.895us 1 1 100.00
chip_sw_clkmgr_sleep_frequency 0 1 0.00
chip_sw_clkmgr_sleep_frequency 353.660s 4580.885us 0 1 0.00
chip_sw_clkmgr_reset_frequency 0 1 0.00
chip_sw_clkmgr_reset_frequency 393.360s 9458.472us 0 1 0.00
chip_sw_clkmgr_escalation_reset 1 1 100.00
chip_sw_all_escalation_resets 298.550s 5129.303us 1 1 100.00
chip_sw_clkmgr_alert_handler_clock_enables 1 1 100.00
chip_sw_alert_handler_lpg_clkoff 1109.860s 9191.761us 1 1 100.00
chip_sw_csrng_edn_cmd 1 1 100.00
chip_sw_entropy_src_csrng 1045.070s 7496.675us 1 1 100.00
chip_sw_csrng_fuse_en_sw_app_read 1 1 100.00
chip_sw_csrng_fuse_en_sw_app_read_test 347.870s 4553.707us 1 1 100.00
chip_sw_csrng_lc_hw_debug_en 1 1 100.00
chip_sw_csrng_lc_hw_debug_en_test 571.230s 8869.502us 1 1 100.00
chip_sw_csrng_known_answer_tests 1 1 100.00
chip_sw_csrng_kat_test 200.860s 2976.726us 1 1 100.00
chip_sw_edn_entropy_reqs 3 3 100.00
chip_sw_csrng_edn_concurrency 4677.990s 25628.705us 1 1 100.00
chip_sw_entropy_src_ast_rng_req 126.500s 3037.768us 1 1 100.00
chip_sw_edn_entropy_reqs 768.570s 6524.908us 1 1 100.00
chip_sw_entropy_src_ast_rng_req 1 1 100.00
chip_sw_entropy_src_ast_rng_req 126.500s 3037.768us 1 1 100.00
chip_sw_entropy_src_csrng 1 1 100.00
chip_sw_entropy_src_csrng 1045.070s 7496.675us 1 1 100.00
chip_sw_entropy_src_known_answer_tests 1 1 100.00
chip_sw_entropy_src_kat_test 174.310s 2659.776us 1 1 100.00
chip_sw_hmac_enc 2 2 100.00
chip_sw_hmac_enc 159.740s 2586.938us 1 1 100.00
chip_sw_hmac_enc_jitter_en 195.500s 2995.779us 1 1 100.00
chip_sw_hmac_idle 1 1 100.00
chip_sw_hmac_enc_idle 177.740s 3012.960us 1 1 100.00
chip_sw_hmac_all_configurations 1 1 100.00
chip_sw_hmac_oneshot 1721.100s 10662.864us 1 1 100.00
chip_sw_hmac_multistream_mode 0 1 0.00
chip_sw_hmac_multistream 2013.050s 12010.400us 0 1 0.00
chip_sw_i2c_host_tx_rx 3 3 100.00
chip_sw_i2c_host_tx_rx 377.010s 4806.514us 1 1 100.00
chip_sw_i2c_host_tx_rx_idx1 485.890s 5453.399us 1 1 100.00
chip_sw_i2c_host_tx_rx_idx2 393.290s 5179.671us 1 1 100.00
chip_sw_i2c_device_tx_rx 1 1 100.00
chip_sw_i2c_device_tx_rx 330.690s 3706.452us 1 1 100.00
chip_sw_keymgr_dpe_key_derivation 2 2 100.00
chip_sw_keymgr_dpe_key_derivation 1886.730s 12036.311us 1 1 100.00
chip_sw_keymgr_dpe_key_derivation_jitter_en 1367.210s 10109.058us 1 1 100.00
chip_sw_keymgr_dpe_sideload_kmac 1 1 100.00
chip_sw_keymgr_dpe_sideload_kmac 1379.010s 10217.679us 1 1 100.00
chip_sw_keymgr_dpe_sideload_aes 1 1 100.00
chip_sw_keymgr_dpe_sideload_aes 1684.410s 11895.305us 1 1 100.00
chip_sw_keymgr_dpe_sideload_otbn 0 1 0.00
chip_sw_keymgr_dpe_sideload_otbn 3600.064s 0.000us 0 1 0.00
chip_sw_kmac_enc 3 3 100.00
chip_sw_kmac_mode_cshake 165.920s 2582.341us 1 1 100.00
chip_sw_kmac_mode_kmac 162.300s 3085.567us 1 1 100.00
chip_sw_kmac_mode_kmac_jitter_en 210.620s 3054.470us 1 1 100.00
chip_sw_kmac_app_keymgr_dpe 1 1 100.00
chip_sw_keymgr_dpe_key_derivation 1886.730s 12036.311us 1 1 100.00
chip_sw_kmac_app_lc 1 1 100.00
chip_sw_lc_ctrl_transition 689.140s 12833.366us 1 1 100.00
chip_sw_kmac_app_rom 0 1 0.00
chip_sw_kmac_app_rom 71.180s 0.000us 0 1 0.00
chip_sw_kmac_entropy 1 1 100.00
chip_sw_kmac_entropy 1015.600s 7973.539us 1 1 100.00
chip_sw_kmac_idle 1 1 100.00
chip_sw_kmac_idle 135.840s 2226.748us 1 1 100.00
chip_sw_lc_ctrl_alert_handler_escalation 1 1 100.00
chip_sw_alert_handler_escalation 261.880s 4522.002us 1 1 100.00
chip_sw_lc_ctrl_jtag_access 3 3 100.00
chip_tap_straps_dev 89.050s 2932.199us 1 1 100.00
chip_tap_straps_rma 259.570s 5998.146us 1 1 100.00
chip_tap_straps_prod 409.420s 8161.528us 1 1 100.00
chip_sw_lc_ctrl_otp_hw_cfg0 1 1 100.00
chip_sw_lc_ctrl_otp_hw_cfg0 169.440s 2627.887us 1 1 100.00
chip_sw_lc_ctrl_init 1 1 100.00
chip_sw_lc_ctrl_transition 689.140s 12833.366us 1 1 100.00
chip_sw_lc_ctrl_transitions 1 1 100.00
chip_sw_lc_ctrl_transition 689.140s 12833.366us 1 1 100.00
chip_sw_lc_ctrl_kmac_req 1 1 100.00
chip_sw_lc_ctrl_transition 689.140s 12833.366us 1 1 100.00
chip_sw_lc_ctrl_key_div 1 1 100.00
chip_sw_keymgr_dpe_key_derivation_prod 1455.140s 10777.344us 1 1 100.00
chip_sw_lc_ctrl_broadcast 18 21 85.71
chip_sw_rram_rma_unlocked 247.650s 10010.240us 0 1 0.00
chip_sw_otp_ctrl_lc_signals_test_unlocked0 226.110s 3381.653us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_dev 486.640s 5339.438us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_prod 506.250s 6017.638us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_rma 508.470s 5506.151us 0 1 0.00
chip_sw_lc_ctrl_transition 689.140s 12833.366us 1 1 100.00
chip_sw_rram_ctrl_lc_rw_en 345.420s 5069.528us 1 1 100.00
chip_sw_keymgr_dpe_key_derivation 1886.730s 12036.311us 1 1 100.00
chip_sw_rom_ctrl_integrity_check 508.660s 15871.442us 1 1 100.00
chip_sw_sram_ctrl_execution_main 386.550s 7722.513us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_lc 1135.090s 21935.145us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 354.980s 3949.363us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 355.790s 4872.515us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev 373.190s 4387.944us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev 377.940s 4948.895us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma 391.570s 3801.488us 1 1 100.00
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma 378.960s 4635.140us 1 1 100.00
chip_tap_straps_dev 89.050s 2932.199us 1 1 100.00
chip_tap_straps_rma 259.570s 5998.146us 1 1 100.00
chip_tap_straps_prod 409.420s 8161.528us 1 1 100.00
chip_rv_dm_lc_disabled 34.100s 2296.394us 0 1 0.00
chip_lc_scrap 4 4 100.00
chip_sw_lc_ctrl_rma_to_scrap 323.460s 5524.389us 1 1 100.00
chip_sw_lc_ctrl_raw_to_scrap 291.760s 7538.053us 1 1 100.00
chip_sw_lc_ctrl_test_locked0_to_scrap 262.980s 9035.697us 1 1 100.00
chip_sw_lc_ctrl_rand_to_scrap 275.580s 5986.557us 1 1 100.00
chip_lc_test_locked 0 2 0.00
chip_sw_lc_walkthrough_testunlocks 2955.740s 60000.000us 0 1 0.00
chip_rv_dm_lc_disabled 34.100s 2296.394us 0 1 0.00
chip_sw_lc_walkthrough 1 5 20.00
chip_sw_lc_walkthrough_dev 763.310s 25458.079us 0 1 0.00
chip_sw_lc_walkthrough_prod 1231.910s 16380.633us 0 1 0.00
chip_sw_lc_walkthrough_prodend 1090.590s 14387.122us 1 1 100.00
chip_sw_lc_walkthrough_rma 694.630s 11400.612us 0 1 0.00
chip_sw_lc_walkthrough_testunlocks 2955.740s 60000.000us 0 1 0.00
chip_sw_lc_ctrl_volatile_raw_unlock 2 3 66.67
chip_sw_lc_ctrl_volatile_raw_unlock 169.700s 5205.233us 1 1 100.00
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz 133.660s 4192.275us 1 1 100.00
rom_volatile_raw_unlock 1346.710s 0.000us 0 1 0.00
chip_sw_otbn_op 0 2 0.00
chip_sw_otbn_ecdsa_op_irq 331.999s 0.000us 0 1 0.00
chip_sw_otbn_ecdsa_op_irq_jitter_en 332.606s 0.000us 0 1 0.00
chip_sw_otbn_rnd_entropy 1 1 100.00
chip_sw_otbn_randomness 655.510s 5885.776us 1 1 100.00
chip_sw_otbn_urnd_entropy 1 1 100.00
chip_sw_otbn_randomness 655.510s 5885.776us 1 1 100.00
chip_sw_otbn_idle 1 1 100.00
chip_sw_otbn_randomness 655.510s 5885.776us 1 1 100.00
chip_sw_otbn_mem_scramble 1 1 100.00
chip_sw_otbn_mem_scramble 280.970s 3692.293us 1 1 100.00
chip_otp_ctrl_init 1 1 100.00
chip_sw_lc_ctrl_transition 689.140s 12833.366us 1 1 100.00
chip_sw_otp_ctrl_keys 3 4 75.00
chip_sw_otbn_mem_scramble 280.970s 3692.293us 1 1 100.00
chip_sw_keymgr_dpe_key_derivation 1886.730s 12036.311us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access 307.530s 4550.427us 1 1 100.00
chip_sw_rv_core_ibex_icache_invalidate 2474.820s 60000.000us 0 1 0.00
chip_sw_otp_ctrl_entropy 3 4 75.00
chip_sw_otbn_mem_scramble 280.970s 3692.293us 1 1 100.00
chip_sw_keymgr_dpe_key_derivation 1886.730s 12036.311us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access 307.530s 4550.427us 1 1 100.00
chip_sw_rv_core_ibex_icache_invalidate 2474.820s 60000.000us 0 1 0.00
chip_sw_otp_ctrl_program 1 1 100.00
chip_sw_lc_ctrl_transition 689.140s 12833.366us 1 1 100.00
chip_sw_otp_ctrl_program_error 1 1 100.00
chip_sw_lc_ctrl_program_error 325.060s 5240.630us 1 1 100.00
chip_sw_otp_ctrl_hw_cfg0 1 1 100.00
chip_sw_lc_ctrl_otp_hw_cfg0 169.440s 2627.887us 1 1 100.00
chip_sw_otp_ctrl_lc_signals 4 5 80.00
chip_sw_otp_ctrl_lc_signals_test_unlocked0 226.110s 3381.653us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_dev 486.640s 5339.438us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_prod 506.250s 6017.638us 1 1 100.00
chip_sw_otp_ctrl_lc_signals_rma 508.470s 5506.151us 0 1 0.00
chip_sw_lc_ctrl_transition 689.140s 12833.366us 1 1 100.00
chip_sw_otp_ctrl_dai_lock 1 1 100.00
chip_sw_otp_ctrl_dai_lock 816.460s 6935.779us 1 1 100.00
chip_sw_pwrmgr_external_full_reset 1 1 100.00
chip_sw_pwrmgr_full_aon_reset 332.400s 6474.572us 1 1 100.00
chip_sw_pwrmgr_random_sleep_all_wake_ups 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_wake_ups 165.340s 2336.491us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_wake_ups 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_wake_ups 161.380s 3086.606us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_por_reset 0 1 0.00
chip_sw_pwrmgr_deep_sleep_por_reset 254.370s 6792.634us 0 1 0.00
chip_sw_pwrmgr_normal_sleep_por_reset 0 1 0.00
chip_sw_pwrmgr_normal_sleep_por_reset 264.050s 4767.224us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_all_wake_ups 1 1 100.00
chip_sw_pwrmgr_deep_sleep_all_wake_ups 685.880s 20407.108us 1 1 100.00
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 2 2 100.00
chip_sw_pwrmgr_deep_sleep_all_reset_reqs 858.190s 12428.086us 1 1 100.00
chip_sw_aon_timer_wdog_bite_reset 525.210s 8455.533us 1 1 100.00
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 0 1 0.00
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 183.130s 3210.322us 0 1 0.00
chip_sw_pwrmgr_wdog_reset 1 1 100.00
chip_sw_pwrmgr_wdog_reset 409.200s 4898.362us 1 1 100.00
chip_sw_pwrmgr_power_glitch_reset 1 1 100.00
chip_sw_pwrmgr_full_aon_reset 332.400s 6474.572us 1 1 100.00
chip_sw_pwrmgr_main_power_glitch_reset 1 1 100.00
chip_sw_pwrmgr_main_power_glitch_reset 229.920s 3979.491us 1 1 100.00
chip_sw_pwrmgr_random_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_random_sleep_power_glitch_reset 153.080s 3424.787us 0 1 0.00
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 1 1 100.00
chip_sw_pwrmgr_deep_sleep_power_glitch_reset 209.210s 5683.952us 1 1 100.00
chip_sw_pwrmgr_sleep_power_glitch_reset 0 1 0.00
chip_sw_pwrmgr_sleep_power_glitch_reset 111.080s 2795.382us 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 0 1 0.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 345.460s 6974.919us 0 1 0.00
chip_sw_pwrmgr_sysrst_ctrl_reset 2 2 100.00
chip_sw_pwrmgr_sysrst_ctrl_reset 592.010s 6511.422us 1 1 100.00
chip_sw_pwrmgr_all_reset_reqs 1027.970s 11002.179us 1 1 100.00
chip_sw_pwrmgr_b2b_sleep_reset_req 1 1 100.00
chip_sw_pwrmgr_b2b_sleep_reset_req 1103.620s 22153.909us 1 1 100.00
chip_sw_pwrmgr_sleep_disabled 1 1 100.00
chip_sw_pwrmgr_sleep_disabled 137.150s 2957.985us 1 1 100.00
chip_sw_pwrmgr_escalation_reset 1 1 100.00
chip_sw_all_escalation_resets 298.550s 5129.303us 1 1 100.00
chip_sw_rom_access 1 1 100.00
chip_sw_rom_ctrl_integrity_check 508.660s 15871.442us 1 1 100.00
chip_sw_rom_ctrl_integrity_check 1 1 100.00
chip_sw_rom_ctrl_integrity_check 508.660s 15871.442us 1 1 100.00
chip_sw_rstmgr_non_sys_reset_info 3 4 75.00
chip_sw_pwrmgr_all_reset_reqs 1027.970s 11002.179us 1 1 100.00
chip_sw_pwrmgr_random_sleep_all_reset_reqs 345.460s 6974.919us 0 1 0.00
chip_sw_pwrmgr_wdog_reset 409.200s 4898.362us 1 1 100.00
chip_sw_pwrmgr_smoketest 233.220s 5135.890us 1 1 100.00
chip_sw_rstmgr_sys_reset_info 1 1 100.00
chip_rv_dm_ndm_reset_req 216.960s 4662.773us 1 1 100.00
chip_sw_rstmgr_cpu_info 1 1 100.00
chip_sw_rstmgr_cpu_info 362.660s 5261.621us 1 1 100.00
chip_sw_rstmgr_sw_req_reset 1 1 100.00
chip_sw_rstmgr_sw_req 235.790s 3769.453us 1 1 100.00
chip_sw_rstmgr_alert_info 1 1 100.00
chip_sw_rstmgr_alert_info 892.820s 11503.999us 1 1 100.00
chip_sw_rstmgr_sw_rst 1 1 100.00
chip_sw_rstmgr_sw_rst 127.350s 2362.464us 1 1 100.00
chip_sw_rstmgr_escalation_reset 1 1 100.00
chip_sw_all_escalation_resets 298.550s 5129.303us 1 1 100.00
chip_sw_rstmgr_alert_handler_reset_enables 0 1 0.00
chip_sw_alert_handler_lpg_reset_toggle 63.224s 0.000us 0 1 0.00
chip_sw_nmi_irq 1 1 100.00
chip_sw_rv_core_ibex_nmi_irq 454.070s 4645.750us 1 1 100.00
chip_sw_rv_core_ibex_rnd 1 1 100.00
chip_sw_rv_core_ibex_rnd 564.180s 4626.528us 1 1 100.00
chip_sw_rv_core_ibex_address_translation 1 1 100.00
chip_sw_rv_core_ibex_address_translation 158.810s 2579.316us 1 1 100.00
chip_sw_rv_core_ibex_icache_scrambled_access 0 1 0.00
chip_sw_rv_core_ibex_icache_invalidate 2474.820s 60000.000us 0 1 0.00
chip_sw_rv_core_ibex_fault_dump 1 1 100.00
chip_sw_rstmgr_cpu_info 362.660s 5261.621us 1 1 100.00
chip_sw_rv_core_ibex_double_fault 1 1 100.00
chip_sw_rstmgr_cpu_info 362.660s 5261.621us 1 1 100.00
chip_sw_rv_core_ibex_mcounteren_writable 1 1 100.00
chip_sw_rv_core_ibex_mcounteren_writable 133.470s 2679.622us 1 1 100.00
chip_jtag_csr_rw 0 1 0.00
chip_jtag_csr_rw 51.540s 2729.790us 0 1 0.00
chip_jtag_mem_access 0 1 0.00
chip_jtag_mem_access 49.150s 2547.226us 0 1 0.00
chip_rv_dm_ndm_reset_req 1 1 100.00
chip_rv_dm_ndm_reset_req 216.960s 4662.773us 1 1 100.00
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 0 1 0.00
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 175.430s 3020.134us 0 1 0.00
chip_rv_dm_access_after_wakeup 0 1 0.00
chip_sw_rv_dm_access_after_wakeup 185.140s 2697.860us 0 1 0.00
chip_sw_rv_dm_jtag_tap_sel 1 1 100.00
chip_tap_straps_rma 259.570s 5998.146us 1 1 100.00
chip_rv_dm_lc_disabled 0 1 0.00
chip_rv_dm_lc_disabled 34.100s 2296.394us 0 1 0.00
chip_sw_plic_all_irqs 3 3 100.00
chip_plic_all_irqs_0 441.830s 4915.441us 1 1 100.00
chip_plic_all_irqs_10 312.160s 3871.272us 1 1 100.00
chip_plic_all_irqs_20 353.710s 4181.881us 1 1 100.00
chip_sw_plic_sw_irq 1 1 100.00
chip_sw_plic_sw_irq 138.890s 2275.363us 1 1 100.00
chip_sw_timer 1 1 100.00
chip_sw_rv_timer_irq 138.760s 2500.874us 1 1 100.00
chip_sw_spi_device_flash_mode 1 1 100.00
rom_e2e_smoke 3160.520s 15456.231us 1 1 100.00
chip_sw_spi_device_pass_through 1 1 100.00
chip_sw_spi_device_pass_through 310.300s 5990.779us 1 1 100.00
chip_sw_spi_device_pass_through_collision 0 1 0.00
chip_sw_spi_device_pass_through_collision 224.550s 3328.446us 0 1 0.00
chip_sw_spi_device_tpm 1 1 100.00
chip_sw_spi_device_tpm 225.640s 3466.735us 1 1 100.00
chip_sw_spi_host_tx_rx 1 1 100.00
chip_sw_spi_host_tx_rx 172.800s 2851.608us 1 1 100.00
chip_sw_sram_scrambled_access 2 2 100.00
chip_sw_sram_ctrl_scrambled_access 307.530s 4550.427us 1 1 100.00
chip_sw_sram_ctrl_scrambled_access_jitter_en 403.180s 5145.367us 1 1 100.00
chip_sw_sleep_sram_ret_contents 0 2 0.00
chip_sw_sleep_sram_ret_contents_no_scramble 118.400s 2726.852us 0 1 0.00
chip_sw_sleep_sram_ret_contents_scramble 185.830s 2393.974us 0 1 0.00
chip_sw_sram_execution 1 1 100.00
chip_sw_sram_ctrl_execution_main 386.550s 7722.513us 1 1 100.00
chip_sw_sram_lc_escalation 2 2 100.00
chip_sw_all_escalation_resets 298.550s 5129.303us 1 1 100.00
chip_sw_data_integrity_escalation 461.040s 4936.121us 1 1 100.00
chip_sw_sysrst_ctrl_reset 2 2 100.00
chip_sw_pwrmgr_sysrst_ctrl_reset 592.010s 6511.422us 1 1 100.00
chip_sw_sysrst_ctrl_reset 826.800s 22527.611us 1 1 100.00
chip_sw_sysrst_ctrl_inputs 1 1 100.00
chip_sw_sysrst_ctrl_inputs 185.460s 2972.299us 1 1 100.00
chip_sw_sysrst_ctrl_outputs 1 1 100.00
chip_sw_sysrst_ctrl_outputs 202.270s 3792.555us 1 1 100.00
chip_sw_sysrst_ctrl_in_irq 1 1 100.00
chip_sw_sysrst_ctrl_in_irq 322.620s 4089.445us 1 1 100.00
chip_sw_sysrst_ctrl_sleep_wakeup 1 1 100.00
chip_sw_sysrst_ctrl_reset 826.800s 22527.611us 1 1 100.00
chip_sw_sysrst_ctrl_sleep_reset 1 1 100.00
chip_sw_sysrst_ctrl_reset 826.800s 22527.611us 1 1 100.00
chip_sw_sysrst_ctrl_ec_rst_l 1 1 100.00
chip_sw_sysrst_ctrl_ec_rst_l 2359.150s 20506.020us 1 1 100.00
chip_sw_sysrst_ctrl_flash_wp_l 1 1 100.00
chip_sw_sysrst_ctrl_ec_rst_l 2359.150s 20506.020us 1 1 100.00
chip_sw_sysrst_ctrl_ulp_z3_wakeup 1 2 50.00
chip_sw_sysrst_ctrl_ulp_z3_wakeup 244.790s 5102.955us 1 1 100.00
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 3285.470s 34612.861us 0 1 0.00
chip_sw_usbdev_vbus 1 1 100.00
chip_sw_usbdev_vbus 167.060s 3305.752us 1 1 100.00
chip_sw_usbdev_pullup 1 1 100.00
chip_sw_usbdev_pullup 201.220s 2988.899us 1 1 100.00
chip_sw_usbdev_aon_pullup 1 1 100.00
chip_sw_usbdev_aon_pullup 298.350s 3542.484us 1 1 100.00
chip_sw_usbdev_setup_rx 1 1 100.00
chip_sw_usbdev_setuprx 288.380s 3984.839us 1 1 100.00
chip_sw_usbdev_config_host 1 1 100.00
chip_sw_usbdev_config_host 1027.780s 7628.781us 1 1 100.00
chip_sw_usbdev_pincfg 1 1 100.00
chip_sw_usbdev_pincfg 5173.720s 31778.293us 1 1 100.00
chip_sw_usbdev_tx_rx 1 1 100.00
chip_sw_usbdev_dpi 1877.620s 11896.973us 1 1 100.00
chip_sw_usbdev_toggle_restore 1 1 100.00
chip_sw_usbdev_toggle_restore 182.550s 2595.072us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_aes_masking_off 1 1 100.00
chip_sw_aes_masking_off 182.280s 2969.777us 1 1 100.00
chip_sw_rv_core_ibex_lockstep_glitch 1 1 100.00
chip_sw_rv_core_ibex_lockstep_glitch 54.980s 1614.550us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
chip_sw_coremark 0 1 0.00
chip_sw_coremark 403.713s 0.000us 0 1 0.00
chip_sw_power_max_load 1 1 100.00
chip_sw_power_virus 1161.550s 6158.902us 1 1 100.00
rom_e2e_debug 0 3 0.00
rom_e2e_jtag_debug_test_unlocked0 52.510s 1910.536us 0 1 0.00
rom_e2e_jtag_debug_dev 44.810s 2240.947us 0 1 0.00
rom_e2e_jtag_debug_rma 46.640s 2101.043us 0 1 0.00
rom_e2e_jtag_inject 1 3 33.33
rom_e2e_jtag_inject_test_unlocked0 50.860s 1962.492us 0 1 0.00
rom_e2e_jtag_inject_dev 51.740s 1843.832us 0 1 0.00
rom_e2e_jtag_inject_rma 264.990s 5087.753us 1 1 100.00
rom_e2e_self_hash 0 1 0.00
rom_e2e_self_hash 452.074s 0.000us 0 1 0.00
chip_sw_clkmgr_jitter_cycle_measurements 0 1 0.00
chip_sw_clkmgr_jitter_frequency 293.670s 3614.628us 0 1 0.00
chip_sw_edn_boot_mode 1 1 100.00
chip_sw_edn_boot_mode 291.890s 2676.636us 1 1 100.00
chip_sw_edn_auto_mode 1 1 100.00
chip_sw_edn_auto_mode 1365.770s 7001.646us 1 1 100.00
chip_sw_edn_sw_mode 1 1 100.00
chip_sw_edn_sw_mode 840.910s 6276.411us 1 1 100.00
chip_sw_edn_kat 1 1 100.00
chip_sw_edn_kat 241.270s 2482.920us 1 1 100.00
chip_sw_otp_ctrl_escalation 0 1 0.00
chip_sw_otp_ctrl_escalation 250.890s 3319.248us 0 1 0.00
chip_sw_sensor_ctrl_deep_sleep_wake_up 1 1 100.00
chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up 227.010s 4660.984us 1 1 100.00
chip_sw_pwrmgr_usb_clk_disabled_when_active 1 1 100.00
chip_sw_pwrmgr_usb_clk_disabled_when_active 370.870s 4861.962us 1 1 100.00
chip_sw_all_resets 1 1 100.00
chip_sw_pwrmgr_all_reset_reqs 1027.970s 11002.179us 1 1 100.00
chip_sw_rom_ctrl_digests 0 1 0.00
chip_sw_kmac_app_rom 71.180s 0.000us 0 1 0.00
chip_rv_dm_perform_debug 0 3 0.00
rom_e2e_jtag_debug_test_unlocked0 52.510s 1910.536us 0 1 0.00
rom_e2e_jtag_debug_dev 44.810s 2240.947us 0 1 0.00
rom_e2e_jtag_debug_rma 46.640s 2101.043us 0 1 0.00
chip_sw_rv_dm_access_after_hw_reset 1 1 100.00
chip_sw_rv_dm_access_after_escalation_reset 404.880s 6033.276us 1 1 100.00
chip_sw_plic_alerts 1 1 100.00
chip_sw_all_escalation_resets 298.550s 5129.303us 1 1 100.00
tick_configuration 1 1 100.00
chip_sw_rv_timer_systick_test 5380.560s 38443.269us 1 1 100.00
counter_wrap 1 1 100.00
chip_sw_rv_timer_systick_test 5380.560s 38443.269us 1 1 100.00
chip_sw_spi_device_output_when_disabled_or_sleeping 0 1 0.00
chip_sw_spi_device_pinmux_sleep_retention 154.680s 2983.756us 0 1 0.00
chip_sw_uart_watermarks 1 1 100.00
chip_sw_uart_tx_rx 362.920s 4419.170us 1 1 100.00
chip_sw_usbdev_stream 1 1 100.00
chip_sw_usbdev_stream 3223.760s 18559.596us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 8 12.50
chip_sw_rstmgr_rst_cnsty_escalation 27.360s 10.240us 0 1 0.00
chip_sw_otp_ctrl_rot_auth_config 45.190s 2177.094us 0 1 0.00
chip_sw_otp_ctrl_descrambling 202.920s 3052.139us 1 1 100.00
chip_sw_pwrmgr_lowpower_cancel 185.590s 3403.881us 0 1 0.00
chip_sw_pwrmgr_sleep_wake_5_bug 5.825s 0.000us 0 1 0.00
ate_bootstrap_flash_erase 535.300s 10010.320us 0 1 0.00
ate_bootstrap_one_frame 10800.053s 0.000us 0 1 0.00
ate_bootstrap_disjoint 10800.053s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
Some pass patterns missing: ['^TEST PASSED (UVM_)?CHECKS$'] 20 test runs
chip_sw_otbn_ecdsa_op_irq 18567740299909994021840653970179828038040486984672358253290921272193716714459 None
WARNING: Download from https://static.crates.io/crates/proc-macro2/1.0.95/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/syn/2.0.104/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/quote/1.0.40/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++crate+crate_index__serde_json-1.0.142//': java.io.IOException: Error downloading [https://static.crates.io/crates/serde_json/1.0.142/download] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index__serde_json-1.0.142/temp1340209755936244442/download.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index/BUILD.bazel:796:6: @@rules_rust++crate+crate_index//:serde_json depends on @@rules_rust++crate+crate_index__serde_json-1.0.142//:serde_json in repository @@rules_rust++crate+crate_index__serde_json-1.0.142 which failed to fetch. no such package '@@rules_rust++crate+crate_index__serde_json-1.0.142//': java.io.IOException: Error downloading [https://static.crates.io/crates/serde_json/1.0.142/download] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index__serde_json-1.0.142/temp1340209755936244442/download.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/tests:otbn_ecdsa_op_irq_test_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
chip_sw_otbn_ecdsa_op_irq_jitter_en 18818199594450081012381407751566685831575020107012444261643548371527182448385 None
WARNING: Download from https://static.crates.io/crates/ftdi-embedded-hal/0.23.2/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/p256/0.13.2/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/num-traits/0.2.19/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++crate+crate_index__deser-hjson-2.2.4//': java.io.IOException: Error downloading [https://static.crates.io/crates/deser-hjson/2.2.4/download] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index__deser-hjson-2.2.4/temp6812775353762625824/download.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index/BUILD.bazel:244:6: @@rules_rust++crate+crate_index//:deser-hjson depends on @@rules_rust++crate+crate_index__deser-hjson-2.2.4//:deser_hjson in repository @@rules_rust++crate+crate_index__deser-hjson-2.2.4 which failed to fetch. no such package '@@rules_rust++crate+crate_index__deser-hjson-2.2.4//': java.io.IOException: Error downloading [https://static.crates.io/crates/deser-hjson/2.2.4/download] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index__deser-hjson-2.2.4/temp6812775353762625824/download.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/tests:otbn_ecdsa_op_irq_test_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
chip_sw_alert_handler_lpg_reset_toggle 78291454049626818291866826931964952175597554062188461734728025493557602429417 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 159, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp8338455509762174770/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp8338455509762174770/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/util/process_wrapper/BUILD.bazel:31:36: @@rules_rust+//util/process_wrapper:process_wrapper depends on @@rules_rust++i+rules_rust_tinyjson//:tinyjson in repository @@rules_rust++i+rules_rust_tinyjson which failed to fetch. no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp8338455509762174770/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/tests:alert_handler_lpg_reset_toggle_test_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
chip_sw_kmac_app_rom 78821515919730042655766067436747463507929770349627630082114828146268600351822 None
Chronologic VCS simulator copyright 1991-2025
Contains Synopsys proprietary information.
Compiler version X-2025.06-SP2-1_Full64; Runtime version X-2025.06-SP2-1_Full64; Sep 8 18:22 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
chip_sw_coremark 95530659280897558558192925891377110298905418014837546380159874733075704369086 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/rust/private/repository_utils.bzl", line 813, column 42, in load_arbitrary_tool
result = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.rust-lang.org/dist/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools/temp8423077153077064305/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz: Unknown host: static.rust-lang.org
ERROR: no such package '@@rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools//': java.io.IOException: Error downloading [https://static.rust-lang.org/dist/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools/temp8423077153077064305/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz: Unknown host: static.rust-lang.org
ERROR: /nightly/current_run/opentitan/util/coverage/collect_cc_coverage/BUILD:26:12: //util/coverage/collect_cc_coverage:collect_cc_coverage depends on @@rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools//:rust_toolchain in repository @@rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools which failed to fetch. no such package '@@rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools//': java.io.IOException: Error downloading [https://static.rust-lang.org/dist/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools/temp8423077153077064305/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz: Unknown host: static.rust-lang.org
ERROR: Analysis of target '//third_party/coremark/top_earlgrey:coremark_test_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
chip_sw_pwrmgr_sleep_wake_5_bug 4058177017165949616939974654827152768574889577148605181476866588880141898298 None
---- STDOUT ----
---- STDERR ----
WARNING: Target pattern parsing failed.
ERROR: Skipping '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': no such target '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': target 'pwrmgr_sleep_wake_5_bug_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD
ERROR: no such target '//sw/device/tests:pwrmgr_sleep_wake_5_bug_test_sim_dv': target 'pwrmgr_sleep_wake_5_bug_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
chip_sw_csrng_edn_concurrency_reduced_freq 36244455230117452792546857369407871848587342020648882328907078807714530514820 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/rust/private/repository_utils.bzl", line 813, column 42, in load_arbitrary_tool
result = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.rust-lang.org/dist/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools/temp13620050120268749945/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz: Unknown host: static.rust-lang.org
ERROR: no such package '@@rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools//': java.io.IOException: Error downloading [https://static.rust-lang.org/dist/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools/temp13620050120268749945/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz: Unknown host: static.rust-lang.org
ERROR: /nightly/current_run/opentitan/sw/host/opentitantool/BUILD:10:12: //sw/host/opentitantool:opentitantool depends on @@rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools//:rust_toolchain in repository @@rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools which failed to fetch. no such package '@@rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools//': java.io.IOException: Error downloading [https://static.rust-lang.org/dist/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++rust+rust_host__x86_64-unknown-linux-gnu__stable_tools/temp13620050120268749945/rustc-1.90.0-x86_64-unknown-linux-gnu.tar.xz: Unknown host: static.rust-lang.org
ERROR: Analysis of target '//sw/device/tests:csrng_edn_concurrency_test_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 33666950489732093323198855775871994153084253934071558424229375069758532717986 None
WARNING: Download from https://static.crates.io/crates/tempfile/3.20.0/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/typetag/0.2.20/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/indoc/2.0.6/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp8776429654324999931/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/util/process_wrapper/BUILD.bazel:31:36: @@rules_rust+//util/process_wrapper:process_wrapper depends on @@rules_rust++i+rules_rust_tinyjson//:tinyjson in repository @@rules_rust++i+rules_rust_tinyjson which failed to fetch. no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp8776429654324999931/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_good_b_good_dev 9915741609980978776624011931720323791868439421431939564973348664580490092642 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 159, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp14723639498668841449/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp14723639498668841449/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/util/process_wrapper/BUILD.bazel:31:36: @@rules_rust+//util/process_wrapper:process_wrapper depends on @@rules_rust++i+rules_rust_tinyjson//:tinyjson in repository @@rules_rust++i+rules_rust_tinyjson which failed to fetch. no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp14723639498668841449/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_good_b_good_prod 108157077920472294458619734355207005440496503883165650840448597610809350846289 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 159, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp18350727315808782052/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp18350727315808782052/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/util/process_wrapper/BUILD.bazel:31:36: @@rules_rust+//util/process_wrapper:process_wrapper depends on @@rules_rust++i+rules_rust_tinyjson//:tinyjson in repository @@rules_rust++i+rules_rust_tinyjson which failed to fetch. no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp18350727315808782052/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_good_b_bad_dev 95074485941037241634628463755191421753926343297841094561988508880967991948389 None
WARNING: Download from https://static.crates.io/crates/inventory/0.3.20/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/paste/1.0.15/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/pest/2.8.1/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++crate+crate_index__log-0.4.29//': java.io.IOException: Error downloading [https://static.crates.io/crates/log/0.4.29/download] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index__log-0.4.29/temp11969474201146905877/download.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index/BUILD.bazel:496:6: @@rules_rust++crate+crate_index//:log depends on @@rules_rust++crate+crate_index__log-0.4.29//:log in repository @@rules_rust++crate+crate_index__log-0.4.29 which failed to fetch. no such package '@@rules_rust++crate+crate_index__log-0.4.29//': java.io.IOException: Error downloading [https://static.crates.io/crates/log/0.4.29/download] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++crate+crate_index__log-0.4.29/temp11969474201146905877/download.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end 46261064519327832228484234377050977145340608887140589539623902111129761066394 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 159, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp6231520070936828609/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp6231520070936828609/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/util/process_wrapper/BUILD.bazel:31:36: @@rules_rust+//util/process_wrapper:process_wrapper depends on @@rules_rust++i+rules_rust_tinyjson//:tinyjson in repository @@rules_rust++i+rules_rust_tinyjson which failed to fetch. no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp6231520070936828609/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_good_b_bad_rma 105544236881512485483065880340422083867929901607011124366112726011013748626322 None
subprocess.run(pip_args, check=True, env=env)
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_python++python+python_3_10_x86_64-unknown-linux-gnu/lib/python3.10/subprocess.py", line 526, in run
raise CalledProcessError(retcode, process.args,
subprocess.CalledProcessError: Command '['/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_python++python+python_3_10_host/python', '-m', 'pip', '--isolated', 'wheel', '--no-deps', '-r', '/tmp/tmpyteuz9t7']' returned non-zero exit status 2.
===== stderr end =====
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 43823411106966315710704140984989105953384171932429363358283134279440895748031 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 159, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp8880284919157967484/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp8880284919157967484/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/util/process_wrapper/BUILD.bazel:31:36: @@rules_rust+//util/process_wrapper:process_wrapper depends on @@rules_rust++i+rules_rust_tinyjson//:tinyjson in repository @@rules_rust++i+rules_rust_tinyjson which failed to fetch. no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp8880284919157967484/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_corrupted_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_bad_b_good_prod 63838048066795200145610518696153353112859577764329537504282354114775053095555 None
WARNING: Download from https://static.crates.io/crates/rusb/0.9.4/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/deser-hjson/2.2.4/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
WARNING: Download from https://static.crates.io/crates/regex/1.11.1/download failed: class com.google.devtools.build.lib.bazel.repository.downloader.UnrecoverableHttpException Unknown host: static.crates.io
ERROR: no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp11212414910611302860/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust+/util/process_wrapper/BUILD.bazel:31:36: @@rules_rust+//util/process_wrapper:process_wrapper depends on @@rules_rust++i+rules_rust_tinyjson//:tinyjson in repository @@rules_rust++i+rules_rust_tinyjson which failed to fetch. no such package '@@rules_rust++i+rules_rust_tinyjson//': java.io.IOException: Error downloading [https://static.crates.io/crates/tinyjson/tinyjson-2.5.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust++i+rules_rust_tinyjson/temp11212414910611302860/tinyjson-2.5.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_corrupted_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_boot_policy_valid_a_bad_b_good_rma 19704548783640985559640252117056680596286906549322652843358981623926309455189 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 159, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.crates.io/crates/bindgen-cli/bindgen-cli-0.71.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1/temp6712672767959079750/bindgen-cli-0.71.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: no such package '@@rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1//': java.io.IOException: Error downloading [https://static.crates.io/crates/bindgen-cli/bindgen-cli-0.71.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1/temp6712672767959079750/bindgen-cli-0.71.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust_bindgen+/3rdparty/BUILD.bazel:54:6: @@rules_rust_bindgen+//3rdparty:bindgen depends on @@rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1//:bindgen-cli in repository @@rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1 which failed to fetch. no such package '@@rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1//': java.io.IOException: Error downloading [https://static.crates.io/crates/bindgen-cli/bindgen-cli-0.71.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1/temp6712672767959079750/bindgen-cli-0.71.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_corrupted_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 41214419151376575744193827582401237713441876601733691377130029862202674995806 None
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/bazel_tools/tools/build_defs/repo/http.bzl", line 159, column 45, in _http_archive_impl
download_info = ctx.download_and_extract(
Error in download_and_extract: java.io.IOException: Error downloading [https://static.crates.io/crates/bindgen-cli/bindgen-cli-0.71.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1/temp17377852404881077867/bindgen-cli-0.71.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: no such package '@@rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1//': java.io.IOException: Error downloading [https://static.crates.io/crates/bindgen-cli/bindgen-cli-0.71.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1/temp17377852404881077867/bindgen-cli-0.71.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust_bindgen+/3rdparty/BUILD.bazel:54:6: @@rules_rust_bindgen+//3rdparty:bindgen depends on @@rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1//:bindgen-cli in repository @@rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1 which failed to fetch. no such package '@@rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1//': java.io.IOException: Error downloading [https://static.crates.io/crates/bindgen-cli/bindgen-cli-0.71.1.crate] to /nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_rust_bindgen++rust_ext+rules_rust_bindgen__bindgen-cli-0.71.1/temp17377852404881077867/bindgen-cli-0.71.1.crate.tar.gz: Unknown host: static.crates.io
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_corrupted_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_e2e_asm_init_test_unlocked0 105069791259566130096572171479844261118586682411103499421017436733175830482433 None
subprocess.run(pip_args, check=True, env=env)
File "/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_python++python+python_3_10_x86_64-unknown-linux-gnu/lib/python3.10/subprocess.py", line 526, in run
raise CalledProcessError(retcode, process.args,
subprocess.CalledProcessError: Command '['/nightly/runs/.cache/bazel/_bazel_root/5fbabd58f74ed10ce4d4abef6fdbdfee/external/rules_python++python+python_3_10_host/python', '-m', 'pip', '--isolated', 'wheel', '--no-deps', '-r', '/tmp/tmpxidozqpj']' returned non-zero exit status 2.
===== stderr end =====
ERROR: Analysis of target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_sim_dv' failed; build aborted: Analysis failed
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
rom_volatile_raw_unlock 75433923386493490411622517944047510773179617966619582807085137980610395163791 None
Chronologic VCS simulator copyright 1991-2025
Contains Synopsys proprietary information.
Compiler version X-2025.06-SP2-1_Full64; Runtime version X-2025.06-SP2-1_Full64; Sep 8 17:16 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
rom_e2e_self_hash 72011629749295725645721673659147183532284238926276300159664058242220920221877 None
Another command (pid=371565) is running. Waiting for it to complete on the server (server_pid=204870)...
Another command (pid=193759) is running. Waiting for it to complete on the server (server_pid=204870)...
Another command (pid=496899) is running. Waiting for it to complete on the server (server_pid=204870)...
WARNING: Target pattern parsing failed.
ERROR: Skipping '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': target 'rom_e2e_self_hash_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e/release' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/release/BUILD
ERROR: no such target '//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test_sim_dv': target 'rom_e2e_self_hash_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e/release' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/release/BUILD
ERROR: Build did NOT complete successfully
_run_cmd -> had a non-zero return code of 1.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1
UVM_ERROR @ * us: (cip_base_scoreboard.sv:254) scoreboard [scoreboard] alert fatal has unexpected signal int error 14 test runs
chip_sw_sleep_pin_retention 50408098101050302462986972660465048848705862704333043855266759687492155597382 379
UVM_INFO @ 2940.770280 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_spi_device_pinmux_sleep_retention 73837443293412156678496701311630090137471110514347144334530770107248151447685 374
UVM_INFO @ 2983.756188 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_random_sleep_all_reset_reqs 94036285599133453357638424665883078429551206413926418619797538618976532972562 392
UVM_INFO @ 6974.918926 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_normal_sleep_all_reset_reqs 95074892829503673086050091429392475662263084821040198331085069908725169442589 377
UVM_INFO @ 3210.321692 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_normal_sleep_por_reset 79809303866918168820612114899049283538266334975807411888413646022178072407385 388
UVM_INFO @ 4767.223950 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_random_sleep_power_glitch_reset 103134065212553963246693520930430879754188417826540594531166010897332033206927 379
UVM_INFO @ 3424.786694 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_sleep_sram_ret_contents_no_scramble 16169431804142243395009516324290255359860008481108951942175117687092695471398 377
UVM_INFO @ 2726.852176 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_sleep_sram_ret_contents_scramble 61223786906124051900011733697961627337404244223965880336162308285086840327134 381
UVM_INFO @ 2393.973512 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup 61815638646437299234413598905711960181791338887846208848660816200884311387418 372
UVM_INFO @ 2724.346218 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_clkmgr_sleep_frequency 64428197916343772485877010848446578865072154802112665957143874310998557342640 407
UVM_INFO @ 4580.885358 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_normal_sleep_all_wake_ups 84791950065158657643716218837961508986499153323783920598608576739778192899244 374
UVM_INFO @ 3086.606376 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_lowpower_cancel 81151302924113907668162012762954885453083011824082955550387101838381264162117 372
UVM_INFO @ 3403.880962 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_pwrmgr_random_sleep_all_wake_ups 52980862116356053991014353200885222522557982452323074909148599447782904465949 373
UVM_INFO @ 2336.491248 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_rv_dm_access_after_wakeup 95080390683593653111347554795569927914144926071447251493045191011386489547406 390
UVM_INFO @ 2697.860184 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 5 test runs
chip_csr_aliasing 32464064954752808193797429873902869953700106745020736530175657391962353642247 None
chip_sw_exit_test_unlocked_bootstrap 34753758879679724630052333764920880602508974161245698201106551503732055981211 None
chip_sw_keymgr_dpe_sideload_otbn 80391432176813872896297182853367343048745541924430873020892981942370472850871 None
ate_bootstrap_one_frame 1760119005717550509156952076288877182564248546691566262994580968127202314601 None
ate_bootstrap_disjoint 53328232372012853021233193107455950892662796614209911138353123271122666841255 None
Error-[NOA] Null object access 4 test runs
chip_sw_otp_ctrl_rot_auth_config 25626557636746479861753199703395456159756192842825117304483854379625652038442 379
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted 103880997982476996647276753025625695673795942692826456807264220659860721223163 403
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
rom_e2e_jtag_inject_test_unlocked0 98315240047323229796277199564236904073101462499622969951934161610963265586685 379
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
rom_e2e_jtag_inject_dev 115747767227380650544850743713026380609584703638214402151806581148343278600726 379
src/lowrisc_dv_jtag_dmi_agent_0/jtag_rv_debugger.sv, 1108
The object at dereference depth 1 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
UVM_ERROR @ * us: (jtag_rv_debugger.sv:604) [debugger] Check failed pc == exp_addr (* [*] vs * [*]) 3 test runs
rom_e2e_jtag_debug_test_unlocked0 6452738016832574322067018928526969920297331621334776945869435211457111746806 359
UVM_INFO @ 1910.536500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_jtag_debug_dev 43312669308351777881985722923503454097721063576247069220587158021130164300314 359
UVM_INFO @ 2240.946500 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_e2e_jtag_debug_rma 75158076262290450973742804629691828131788590447666677878973375045514845521725 359
UVM_INFO @ 2101.043000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [lc_walkthrough_test_sim_dv(sw/device/lib/testing/test_framework/ottf_alerts.c:172)] ERROR: Alert * is asserted but not expected 2 test runs
chip_sw_lc_walkthrough_prod 28102155313127400424374654391909518636548112987094020250978583567795742642575 433
UVM_INFO @ 16380.633046 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_lc_walkthrough_rma 100753672103001041128224940900012263404229676457531611023573853826852202854757 405
UVM_INFO @ 11400.611692 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * us hit, indicating a probable testbench issue 2 test runs
chip_sw_lc_walkthrough_testunlocks 44418152787259314065093774629753651655991924075743095358174855126152019299636 529
UVM_INFO @ 60000.000000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_rv_core_ibex_icache_invalidate 92814748100062594100047975417891394382993392328158190096649271603794038931550 377
UVM_INFO @ 60000.000000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (cip_base_scoreboard.sv:256) scoreboard [scoreboard] alert fatal has unexpected timeout error 2 test runs
chip_sw_alert_handler_lpg_sleep_mode_pings 111069098376638620313425861986039651099690888515860846757750350480715393992365 373
UVM_INFO @ 2689.043184 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_sw_alert_handler_entropy 68078728104239784528824280804635244962523749335551864635059656946302565736803 498
UVM_INFO @ 2964.885228 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (jtag_riscv_driver.sv:208) driver [driver] Could not activate RV_DM after * attempts! 2 test runs
chip_jtag_csr_rw 84013167403345990821263368261241638287964316871103995732862564353066584565689 5365
UVM_INFO @ 2729.790182 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
chip_jtag_mem_access 35140252531748128013176858206002513121770809255384711610922176609414599654499 5365
UVM_INFO @ 2547.225673 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (sec_cm_pkg.sv:48) [sec_cm_pkg::find_sec_cm_if_proxy] no proxy with path *rstmgr.u_d0_spi_host*.leaf_rst_path 1 test run
chip_sw_rstmgr_rst_cnsty_escalation 102923262833507421768682621347167913105356256978931019697194022689724683471187 365
UVM_INFO @ 10.240001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [spi_passthrough_test_sim_dv(sw/device/tests/sim_dv/spi_passthrough_test.c:382)] CHECK-fail: irq == kDtSpiDeviceIrqUploadCmdfifoNotEmpty 1 test run
chip_sw_spi_device_pass_through_collision 80635806933174850381236123685634248596970364565616368025757633104522506152158 391
UVM_INFO @ 3328.445810 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (chip_sw_rram_rma_unlocked_vseq.sv:162) [chip_sw_rram_rma_unlocked_vseq] wait timeout occurred! 1 test run
chip_sw_rram_rma_unlocked 33406181821658066624100632126093022282207755446032157099784345384168348697376 337
UVM_INFO @ 10010.240001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [otp_ctrl_lc_signals_test_sim_dv(sw/device/lib/testing/otp_ctrl_testutils.c:39)] Expected a DAI error for access to * 1 test run
chip_sw_otp_ctrl_lc_signals_rma 51077523492517455726797167119301108408845869350069201061918457979909251834543 404
UVM_INFO @ 5506.151159 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [all_escalation_resets_test_sim_dv(sw/device/tests/sim_dv/all_escalation_resets_test.c:715)] CHECK-fail: Alert handler NMI state not expected: 1 test run
chip_sw_otp_ctrl_escalation 19636526730500769244357114943559452761193433985179243490150204826283702656852 379
alert_enable:1
alert_raised:0
UVM_INFO @ 3319.247916 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (chip_sw_base_vseq.sv:923) virtual_sequencer [chip_sw_lc_walkthrough_vseq] max attempt reached to get lc status LcExtClockSwitched! 1 test run
chip_sw_lc_walkthrough_dev 81227853474190133923630580391164402885419974921262848036228228866776382696177 372
UVM_INFO @ 25458.078916 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(rstreqs[*] && (reset_cause == HwReq))' 1 test run
chip_sw_pwrmgr_deep_sleep_por_reset 97323250692209097882391935919304420849639361517064318184155202072815577214054 389
UVM_ERROR @ 6792.634000 us: (pwrmgr_rstreqs_sva_if.sv:49) [ASSERT FAILED] HwResetOn_A
UVM_INFO @ 6792.634000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(!$fell((pwrmgr_data_o.done == MuBi4True)))' 1 test run
chip_sw_pwrmgr_sleep_power_glitch_reset 58828479929388149971736283553601485774016775264867645691785375336600896174314 377
UVM_ERROR @ 2795.382313 us: (rom_ctrl.sv:590) [ASSERT FAILED] PwrmgrDataChk_A
UVM_INFO @ 2795.382313 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (chip_sw_base_vseq.sv:340) virtual_sequencer [chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq] SW TEST TIMED OUT. STATE: SwTestStatusInTest, TIMEOUT = * ns 1 test run
chip_sw_adc_ctrl_sleep_debug_cable_wakeup 108768363088492599775193695933750306961982172384789893889937659364881448351946 396
UVM_INFO @ 34612.860686 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [alert_test_sim_dv(hw/top_earlgrey/sw/autogen/tests/alert_test.c:340)] CHECK-fail: Expect alert *! 1 test run
chip_sw_alert_test 74547098002371039567705117141345944778235415294255370206759675020660500076914 371
UVM_INFO @ 2549.953222 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [alert_handler_lpg_sleep_mode_alerts_test_sim_dv(sw/device/lib/testing/ret_sram_testutils.c:67)] CHECK-fail: testing_utilities != ((void*)0) 1 test run
chip_sw_alert_handler_lpg_sleep_mode_alerts 32302293898995500201005846347188163737445089358162542008130990369465294122079 373
UVM_INFO @ 2572.485482 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (chip_sw_base_vseq.sv:340) virtual_sequencer [chip_sw_base_vseq] SW TEST TIMED OUT. STATE: SwTestStatusInTest, TIMEOUT = * ns 1 test run
chip_sw_hmac_multistream 53595562454345038367567664678489440432710009068627411997221496309908349981500 414
UVM_INFO @ 12010.400001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_test_status_if.sv:65) [tb.u_sim_sram.u_sim_sram_if.u_sw_test_status_if] SW test status must not change after reaching the pass or fail state. 1 test run
chip_sw_clkmgr_reset_frequency 33896257442696656979921397959183095807821426528361096856665909316591653009489 400
UVM_INFO @ 9458.472332 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [clkmgr_jitter_frequency_test_sim_dv(sw/device/lib/testing/test_framework/ottf_alerts.c:172)] ERROR: Alert * is asserted but not expected 1 test run
chip_sw_clkmgr_jitter_frequency 77928964505070991437349659634754005952231725546991317220654757179340065447769 407
UVM_INFO @ 3614.627716 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (cip_base_vseq.sv:660) [chip_rv_dm_lc_disabled_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch 1 test run
chip_rv_dm_lc_disabled 29919774928442970700936696047936028268836779393882004819840920608830978054452 299
UVM_INFO @ 2296.394274 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR @ * us: (sw_logger_if.sv:526) [ast_clk_rst_inputs_sim_dv(sw/device/lib/testing/autogen/isr_testutils.c:41)] CHECK-fail: Only adc_ctrl IRQ * expected to fire. Actual IRQ state = * 1 test run
chip_sw_ast_clk_rst_inputs 37562332274818810052511518782440265482366352151061165892715948515615015037310 391
UVM_INFO @ 9156.402950 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (csr_utils_pkg.sv:619) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout chip_reg_block.spi_device.cmd_info_*.opcode (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=1) 1 test run
ate_bootstrap_flash_erase 19600963771905859672481572833162653433716519582904100074680653601160740927266 339
UVM_INFO @ 10010.320001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(pend_req[h2d.a_source].pend == *)' 1 test run
rom_e2e_shutdown_output 23790466582086669216168469815254051269069615830338749854856898321944339305106 403
UVM_ERROR @ 17343.426036 us: (tlul_assert.sv:314) [ASSERT FAILED] pendingReqPerSrc_M
UVM_INFO @ 17343.426036 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL @ * us: (chip_sw_base_vseq.sv:887) virtual_sequencer [chip_sw_lc_raw_unlock_vseq] Cycle timeout (*) for pinmux to connect JTAG to lc_ctrl 1 test run
rom_raw_unlock 110054304477189099366879044148165729979587043758342508427714415633459729189645 384
UVM_INFO @ 11254.358134 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---