Simulation Results: i2c

 
08/09/2026 16:50:36 DVSim: v1.52.1 sha: 1c01039 json Branch: master Tool: vcs [X-2025.06-SP2-1_Full64]
Coverage statistics
  • Total
  • 81.16 %
  • code
  • 97.60 %
  • assert
  • 98.11 %
  • func
  • 47.78 %
  • line
  • 98.94 %
  • branch
  • 97.43 %
  • cond
  • 94.04 %
  • toggle
  • 100.00 %
Validation stages
V1
71.43%
V2
14.63%
V2S
50.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 0 1 0.00
i2c_host_smoke 0.000s 0.000us 0 1 0.00
target_smoke 0 1 0.00
i2c_target_smoke 0.000s 0.000us 0 1 0.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.440s 23.849us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.350s 31.088us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 1.330s 167.695us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 0.400s 59.937us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 0.450s 413.472us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.350s 31.088us 1 1 100.00
i2c_csr_aliasing 0.400s 59.937us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.000s 0.000us 0 1 0.00
host_stress_all 0 1 0.00
i2c_host_stress_all 0.000s 0.000us 0 1 0.00
host_maxperf 0 1 0.00
i2c_host_perf 0.000s 0.000us 0 1 0.00
host_override 0 1 0.00
i2c_host_override 0.000s 0.000us 0 1 0.00
host_fifo_watermark 0 1 0.00
i2c_host_fifo_watermark 0.000s 0.000us 0 1 0.00
host_fifo_overflow 0 1 0.00
i2c_host_fifo_overflow 0.000s 0.000us 0 1 0.00
host_fifo_reset 0 3 0.00
i2c_host_fifo_reset_fmt 0.000s 0.000us 0 1 0.00
i2c_host_fifo_fmt_empty 0.000s 0.000us 0 1 0.00
i2c_host_fifo_reset_rx 0.000s 0.000us 0 1 0.00
host_fifo_full 0 1 0.00
i2c_host_fifo_full 0.000s 0.000us 0 1 0.00
host_timeout 0 1 0.00
i2c_host_stretch_timeout 0.000s 0.000us 0 1 0.00
i2c_host_mode_toggle 0 1 0.00
i2c_host_mode_toggle 0.000s 0.000us 0 1 0.00
target_glitch 0 1 0.00
i2c_target_glitch 0.000s 0.000us 0 1 0.00
target_stress_all 0 1 0.00
i2c_target_stress_all 0.000s 0.000us 0 1 0.00
target_maxperf 0 1 0.00
i2c_target_perf 0.000s 0.000us 0 1 0.00
target_fifo_empty 0 2 0.00
i2c_target_stress_rd 0.000s 0.000us 0 1 0.00
i2c_target_intr_smoke 0.000s 0.000us 0 1 0.00
target_fifo_reset 0 2 0.00
i2c_target_fifo_reset_acq 0.000s 0.000us 0 1 0.00
i2c_target_fifo_reset_tx 0.000s 0.000us 0 1 0.00
target_fifo_full 0 3 0.00
i2c_target_stress_wr 0.000s 0.000us 0 1 0.00
i2c_target_stress_rd 0.000s 0.000us 0 1 0.00
i2c_target_intr_stress_wr 0.000s 0.000us 0 1 0.00
target_timeout 0 1 0.00
i2c_target_timeout 0.000s 0.000us 0 1 0.00
target_clock_stretch 0 1 0.00
i2c_target_stretch 0.000s 0.000us 0 1 0.00
bad_address 0 1 0.00
i2c_target_bad_addr 0.000s 0.000us 0 1 0.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 0.000s 0.000us 0 1 0.00
target_fifo_watermark 0 2 0.00
i2c_target_fifo_watermarks_acq 0.000s 0.000us 0 1 0.00
i2c_target_fifo_watermarks_tx 0.000s 0.000us 0 1 0.00
host_mode_config_perf 0 2 0.00
i2c_host_perf 0.000s 0.000us 0 1 0.00
i2c_host_perf_precise 0.000s 0.000us 0 1 0.00
host_mode_clock_stretching 0 1 0.00
i2c_host_stretch_timeout 0.000s 0.000us 0 1 0.00
target_mode_tx_stretch_ctrl 0 1 0.00
i2c_target_tx_stretch_ctrl 0.000s 0.000us 0 1 0.00
target_mode_nack_generation 0 3 0.00
i2c_target_nack_acqfull 0.000s 0.000us 0 1 0.00
i2c_target_nack_acqfull_addr 0.000s 0.000us 0 1 0.00
i2c_target_nack_txstretch 0.000s 0.000us 0 1 0.00
host_mode_halt_on_nak 0 1 0.00
i2c_host_may_nack 0.000s 0.000us 0 1 0.00
target_mode_smbus_maxlen 0 1 0.00
i2c_target_smbus_maxlen 0.000s 0.000us 0 1 0.00
alert_test 0 1 0.00
i2c_alert_test 0.000s 0.000us 0 1 0.00
intr_test 1 1 100.00
i2c_intr_test 0.380s 19.006us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 0.720s 69.626us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 0.720s 69.626us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.440s 23.849us 1 1 100.00
i2c_csr_rw 0.350s 31.088us 1 1 100.00
i2c_csr_aliasing 0.400s 59.937us 1 1 100.00
i2c_same_csr_outstanding 0.610s 208.107us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.440s 23.849us 1 1 100.00
i2c_csr_rw 0.350s 31.088us 1 1 100.00
i2c_csr_aliasing 0.400s 59.937us 1 1 100.00
i2c_same_csr_outstanding 0.610s 208.107us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 1 2 50.00
i2c_tl_intg_err 1.060s 266.686us 1 1 100.00
i2c_sec_cm 0.000s 0.000us 0 1 0.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.060s 266.686us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 0.000s 0.000us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 0.000s 0.000us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 0.000s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
Job cancelled because one of its dependencies failed or was killed. 41 test runs
i2c_host_smoke 19695564238576646784555449990457951159956733407921891004989708569021546399626 None
i2c_host_override 104161165815144857050823695630415441927577349969476309156348631882911033175213 None
i2c_host_fifo_watermark 22016315652091950945551744224044731786843984137487324229974505009970576223278 None
i2c_host_fifo_overflow 63144921213658894274871657904828640347167692492495786936053271718561577088429 None
i2c_host_fifo_reset_fmt 32780030348655102017214703176459027997972194086116979857203942752064406829180 None
i2c_host_fifo_fmt_empty 20157536375835761185852703314542924685396670073379043224729210720265381783496 None
i2c_host_fifo_reset_rx 111254553173980656171982018223713857762588182644245029671148734692267180301809 None
i2c_host_fifo_full 62573834003459039382540457260695133472263104444251085156409241409380728742542 None
i2c_host_perf 8336321500300363908287256374955125235526451393412024590184297387462116159154 None
i2c_host_perf_precise 83311520391525787798147144209501505118756803721489931642063006469150989357110 None
i2c_host_stretch_timeout 85550126916043178751957538966577182330142021761538245957587712644002667206045 None
i2c_host_error_intr 75804116371070580218380353026326831243559952933279159835643831477275278595477 None
i2c_host_stress_all 62542501023276012760688215765059346788974833680485607574752423717380048122434 None
i2c_target_glitch 103939196437117156690020127338773282863835189244773370369112626767977070534792 None
i2c_target_smoke 73582123115557411439408636972830497373495543587312034249757406734380023938263 None
i2c_target_stress_wr 92862237205579926322869985450255929425232365295836459745454520301300891062083 None
i2c_target_stress_rd 97574484438402278501131200673284954422267947382174771199522560895195215651780 None
i2c_target_stretch 6711925518729524421433166337109133169547039538308180885587356508369057122546 None
i2c_target_intr_smoke 71542944746687212404018709386668143583624533882240001072237208937126338942709 None
i2c_target_intr_stress_wr 101416780801651326726024477552886106943522904540195168456786065834069915851416 None
i2c_target_timeout 27894244827098318799172859316469717808837460197323303426024799095307777154973 None
i2c_target_unexp_stop 92565717759089369685235434317765501141963009983307833613298148697863911585978 None
i2c_target_fifo_reset_acq 96039792730939681253646700274460710901163937161986802970455160201070882613253 None
i2c_target_fifo_reset_tx 9317458982877121864611736042234286002606795512157860862436086842781609081585 None
i2c_target_perf 97758024870434819430009845511942164587201934232172005329355024042752547815125 None
i2c_target_stress_all 115649961780506297153390422345725199903753817817287217734424712355820731558384 None
i2c_target_bad_addr 24009770429458194810533883589254288049526393830198267117263329590392624767060 None
i2c_target_hrst 90926541911743026968686115654195666896893521696995808208990642783810349806209 None
i2c_host_stress_all_with_rand_reset 51305049293414348470054272110414145411103733369355228704658992432737461522513 None
i2c_target_stress_all_with_rand_reset 27818150684951944762018593165459828752780136685392002940750249474168845706122 None
i2c_host_mode_toggle 86826919252491616560426974654136764172671604539515701508400438375357457477255 None
i2c_host_may_nack 94902102369712857971424123874027739124176127744256301878438346579413237868284 None
i2c_target_fifo_watermarks_acq 104689579480771241467522780287073424824178903115718184008839496008768281054716 None
i2c_target_fifo_watermarks_tx 99246815615241180502275412773756839435627449356536106741296480651763664217922 None
i2c_target_tx_stretch_ctrl 21619888336168999067437350723378566300087554981525258714384551727144199958208 None
i2c_target_smbus_maxlen 108442313868539783635112301678455717474440223568284094534400076853629767689626 None
i2c_target_nack_acqfull 4866382936651848428323188630909891205214114612055782318139300308630142835271 None
i2c_target_nack_acqfull_addr 38293796469452269598350380356310631431416586419759056810433628983156007326630 None
i2c_target_nack_txstretch 37998924062569697665961363333522519413434291578657023596374043443815416732922 None
i2c_sec_cm 53055944467707347950417937210018082158464975035915603753400696392528785685316 None
i2c_alert_test 67128576677630787479627536034898531223546128266645403287232681913557818826195 None
Job returned a non-zero exit code: * 1 test run
default None None
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CPU time: 1.113 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 255