Simulation Results: kmac/masked

 
10/09/2026 17:06:13 DVSim: v1.52.2 sha: 5bf9391 json Branch: master Tool: vcs [X-2025.06-SP2-1_Full64]
Coverage statistics
  • Total
  • 80.09 %
  • code
  • 65.82 %
  • assert
  • 93.25 %
  • func
  • 81.19 %
  • line
  • 97.09 %
  • branch
  • 89.84 %
  • cond
  • 84.31 %
  • toggle
  • 23.06 %
  • FSM
  • 34.81 %
Validation stages
V1
100.00%
V2
72.41%
V2S
62.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 47.860s 14422.705us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.930s 36.383us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.800s 20.533us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 16.690s 4706.901us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 1.150s 44.024us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.510s 338.358us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.800s 20.533us 1 1 100.00
kmac_csr_aliasing 1.150s 44.024us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.720s 147.903us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.180s 34.246us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 883.650s 16480.675us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 600.830s 25316.626us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 36.800s 5394.435us 1 1 100.00
kmac_test_vectors_sha3_256 1909.360s 383030.259us 1 1 100.00
kmac_test_vectors_sha3_384 1136.280s 81197.300us 1 1 100.00
kmac_test_vectors_sha3_512 13.870s 3020.084us 1 1 100.00
kmac_test_vectors_shake_128 138.180s 17350.958us 1 1 100.00
kmac_test_vectors_shake_256 91.170s 18437.768us 1 1 100.00
kmac_test_vectors_kmac 1.990s 106.734us 1 1 100.00
kmac_test_vectors_kmac_xof 2.090s 668.379us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 202.690s 14412.250us 1 1 100.00
app 0 1 0.00
kmac_app 3.710s 213.576us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 3.310s 170.162us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 2.820s 202.505us 0 1 0.00
error 1 1 100.00
kmac_error 364.620s 96043.096us 1 1 100.00
key_error 0 1 0.00
kmac_key_error 0.720s 2.954us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.820s 8.808us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 4.750s 181.316us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.940s 151.400us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.750s 46.519us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 1.120s 36.391us 0 1 0.00
stress_all 0 1 0.00
kmac_stress_all 589.680s 34509.552us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.660s 38.777us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.720s 16.286us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.560s 262.645us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.560s 262.645us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.930s 36.383us 1 1 100.00
kmac_csr_rw 0.800s 20.533us 1 1 100.00
kmac_csr_aliasing 1.150s 44.024us 1 1 100.00
kmac_same_csr_outstanding 1.290s 132.250us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.930s 36.383us 1 1 100.00
kmac_csr_rw 0.800s 20.533us 1 1 100.00
kmac_csr_aliasing 1.150s 44.024us 1 1 100.00
kmac_same_csr_outstanding 1.290s 132.250us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.440s 172.027us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.440s 172.027us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.440s 172.027us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.440s 172.027us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.190s 494.543us 1 1 100.00
tl_intg_err 1 2 50.00
kmac_sec_cm 0.970s 93.840us 0 1 0.00
kmac_tl_intg_err 4.120s 421.841us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 4.120s 421.841us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 1.120s 36.391us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 47.860s 14422.705us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 202.690s 14412.250us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.440s 172.027us 1 1 100.00
sec_cm_fsm_sparse 0 1 0.00
kmac_sec_cm 0.970s 93.840us 0 1 0.00
sec_cm_ctr_redun 0 1 0.00
kmac_sec_cm 0.970s 93.840us 0 1 0.00
sec_cm_packer_ctr_redun 0 1 0.00
kmac_sec_cm 0.970s 93.840us 0 1 0.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 47.860s 14422.705us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 1.120s 36.391us 0 1 0.00
sec_cm_fsm_local_esc 0 1 0.00
kmac_sec_cm 0.970s 93.840us 0 1 0.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 4.140s 78.334us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 47.860s 14422.705us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 25.980s 3014.082us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. 7 test runs
kmac_app 26282886640429563645509690385966871090265540785893298853671549188880073573366 79
UVM_INFO @ 213575634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 76681606980032738311010052862081609261481714511280173716756727704362411600000 78
UVM_INFO @ 170161662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 13893491356729115690313060295313204752250041727324628596839519890092683172212 79
UVM_INFO @ 202504973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_mubi 8500259107848264373084608382596699222954806167069809852939983067353774926167 79
UVM_INFO @ 78334467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 48373017835194853939181084289282228552073628233133003905258977859710540009497 77
UVM_INFO @ 2954371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 103136123330997634869265790077291171144351103021424589864809496375829202705977 77
UVM_INFO @ 46518870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 23081704901457024489856273622429996666151936317619816594017465997113918312592 135
UVM_INFO @ 34509551750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). 2 test runs
kmac_lc_escalation 109855164117614012358520296953925445347684643474077606681799459081001873051924 81
UVM_INFO @ 36390528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sec_cm 102852176048215800336023940095083222754655070830828633157380112577107002666198 81
UVM_INFO @ 93840006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 1 test run
kmac_sideload_invalid 6840709838724914677264069454143347823222881511116255618021099002767212921924 76
UVM_INFO @ 8808156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1296) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
kmac_stress_all_with_rand_reset 29367587753069350299924105055365102173366965024536132827280050926525219166748 97
UVM_INFO @ 3014081587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---