| V1 |
|
100.00% |
| V2 |
|
68.97% |
| V2S |
|
62.50% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| kmac_smoke | 10.810s | 1740.897us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| kmac_csr_hw_reset | 0.780s | 45.375us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| kmac_csr_rw | 0.790s | 172.027us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| kmac_csr_bit_bash | 14.440s | 1826.144us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| kmac_csr_aliasing | 0.940s | 212.113us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 1.730s | 228.398us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| kmac_csr_rw | 0.790s | 172.027us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 0.940s | 212.113us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| kmac_mem_walk | 0.610s | 17.825us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| kmac_mem_partial_access | 0.980s | 118.466us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 1 | 1 | 100.00 | |||
| kmac_long_msg_and_output | 2089.360s | 33002.543us | 1 | 1 | 100.00 | |
| burst_write | 1 | 1 | 100.00 | |||
| kmac_burst_write | 790.890s | 70189.372us | 1 | 1 | 100.00 | |
| test_vectors | 7 | 8 | 87.50 | |||
| kmac_test_vectors_sha3_224 | 0.630s | 74.915us | 0 | 1 | 0.00 | |
| kmac_test_vectors_sha3_256 | 1771.500s | 112365.598us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_384 | 1317.070s | 305858.265us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_512 | 13.880s | 2725.134us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_128 | 1582.090s | 118904.793us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_256 | 1787.300s | 114803.991us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac | 2.800s | 227.724us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac_xof | 2.400s | 57.192us | 1 | 1 | 100.00 | |
| sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 143.330s | 3544.740us | 1 | 1 | 100.00 | |
| app | 0 | 1 | 0.00 | |||
| kmac_app | 1.750s | 64.916us | 0 | 1 | 0.00 | |
| app_with_partial_data | 0 | 1 | 0.00 | |||
| kmac_app_with_partial_data | 0.600s | 1.763us | 0 | 1 | 0.00 | |
| entropy_refresh | 0 | 1 | 0.00 | |||
| kmac_entropy_refresh | 2.220s | 159.992us | 0 | 1 | 0.00 | |
| error | 1 | 1 | 100.00 | |||
| kmac_error | 87.500s | 2004.673us | 1 | 1 | 100.00 | |
| key_error | 0 | 1 | 0.00 | |||
| kmac_key_error | 0.680s | 22.176us | 0 | 1 | 0.00 | |
| sideload_invalid | 0 | 1 | 0.00 | |||
| kmac_sideload_invalid | 0.790s | 28.587us | 0 | 1 | 0.00 | |
| edn_timeout_error | 1 | 1 | 100.00 | |||
| kmac_edn_timeout_error | 28.050s | 6005.456us | 1 | 1 | 100.00 | |
| entropy_mode_error | 1 | 1 | 100.00 | |||
| kmac_entropy_mode_error | 28.540s | 6336.551us | 1 | 1 | 100.00 | |
| entropy_ready_error | 0 | 1 | 0.00 | |||
| kmac_entropy_ready_error | 0.680s | 3.136us | 0 | 1 | 0.00 | |
| lc_escalation | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.620s | 4.055us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| kmac_stress_all | 1.880s | 48.039us | 0 | 1 | 0.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| kmac_intr_test | 0.690s | 98.868us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| kmac_alert_test | 0.620s | 65.168us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 2.480s | 89.270us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 2.480s | 89.270us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 0.780s | 45.375us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.790s | 172.027us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 0.940s | 212.113us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 0.880s | 89.156us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 0.780s | 45.375us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.790s | 172.027us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 0.940s | 212.113us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 0.880s | 89.156us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 110.769us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 110.769us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 110.769us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 110.769us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 3.390s | 245.950us | 1 | 1 | 100.00 | |
| tl_intg_err | 1 | 2 | 50.00 | |||
| kmac_sec_cm | 1.070s | 319.425us | 0 | 1 | 0.00 | |
| kmac_tl_intg_err | 1.300s | 822.972us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| kmac_tl_intg_err | 1.300s | 822.972us | 1 | 1 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.620s | 4.055us | 0 | 1 | 0.00 | |
| sec_cm_sw_key_key_masking | 1 | 1 | 100.00 | |||
| kmac_smoke | 10.810s | 1740.897us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 143.330s | 3544.740us | 1 | 1 | 100.00 | |
| sec_cm_cfg_shadowed_config_shadow | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 110.769us | 1 | 1 | 100.00 | |
| sec_cm_fsm_sparse | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.070s | 319.425us | 0 | 1 | 0.00 | |
| sec_cm_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.070s | 319.425us | 0 | 1 | 0.00 | |
| sec_cm_packer_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.070s | 319.425us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_regwen | 1 | 1 | 100.00 | |||
| kmac_smoke | 10.810s | 1740.897us | 1 | 1 | 100.00 | |
| sec_cm_fsm_global_esc | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.620s | 4.055us | 0 | 1 | 0.00 | |
| sec_cm_fsm_local_esc | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.070s | 319.425us | 0 | 1 | 0.00 | |
| sec_cm_absorbed_ctrl_mubi | 0 | 1 | 0.00 | |||
| kmac_mubi | 2.110s | 979.134us | 0 | 1 | 0.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 1 | 1 | 100.00 | |||
| kmac_smoke | 10.810s | 1740.897us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| kmac_stress_all_with_rand_reset | 80.560s | 3733.029us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. | 9 test runs | |||
| kmac_app | 67919744210947403577425486918864981421390275540001415080575036825221584387984 | 78 |
UVM_INFO @ 64916155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_app_with_partial_data | 76653254208070162979958237949035169092857323662948968479634303689337464329850 | 77 |
UVM_INFO @ 1763138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_refresh | 40800399678706053612283529831859413244328649984985277714036904362986653779610 | 78 |
UVM_INFO @ 159991583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_mubi | 43769046844049650972497657213693642683090677617758946467072061147302621671785 | 78 |
UVM_INFO @ 979134427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_key_error | 24236059357947658771317593259501625795337382607952801125821858327103233610308 | 77 |
UVM_INFO @ 22176243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_ready_error | 89992914088629596245605568189775021155133079798435133133638778496099114646336 | 77 |
UVM_INFO @ 3136146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_lc_escalation | 435410093543218579663187239983603760062643610108681137725399989014399685689 | 79 |
UVM_INFO @ 4054718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_stress_all | 100775823011696881279612009636763451685737104587492565032188580364140335293709 | 80 |
UVM_INFO @ 48038566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_stress_all_with_rand_reset | 106009226101525431022080856327062761509745362400401238510311681630033586891203 | 296 |
UVM_INFO @ 3733028762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] | 1 test run | |||
| kmac_sideload_invalid | 8407477580534857790267538584748490567539994688386552080896780695714782557903 | 76 |
UVM_INFO @ 28587464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: kmac_reg_block.intr_state.kmac_done reset value: * | 1 test run | |||
| kmac_test_vectors_sha3_224 | 39502425834998213845353079287205105638015633805616597919695770468381526947974 | 78 |
UVM_INFO @ 74914983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). | 1 test run | |||
| kmac_sec_cm | 92889972429648720126170581065130232982929458091768970879368534778295130997552 | 82 |
UVM_INFO @ 319424775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|