Simulation Results: aes/unmasked

 
27/03/2026 17:03:20 DVSim: v1.16.0 sha: 114d1c4 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 95.09 %
  • code
  • 95.02 %
  • assert
  • 98.13 %
  • func
  • 92.13 %
  • block
  • 95.70 %
  • line
  • 97.27 %
  • branch
  • 91.12 %
  • toggle
  • 98.08 %
  • FSM
  • 93.62 %
Validation stages
V1
100.00%
V2
99.86%
V2S
94.10%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 0.000us 1 1 100.00
smoke 50 50 100.00
aes_smoke 5.000s 0.000us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 4.000s 0.000us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 4.000s 0.000us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 8.000s 0.000us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 5.000s 0.000us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 3.000s 0.000us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 4.000s 0.000us 20 20 100.00
aes_csr_aliasing 5.000s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 5.000s 0.000us 50 50 100.00
aes_config_error 4.000s 0.000us 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
key_length 150 150 100.00
aes_smoke 5.000s 0.000us 50 50 100.00
aes_config_error 4.000s 0.000us 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
back2back 100 100 100.00
aes_stress 4.000s 0.000us 50 50 100.00
aes_b2b 12.000s 0.000us 50 50 100.00
backpressure 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
multi_message 200 200 100.00
aes_smoke 5.000s 0.000us 50 50 100.00
aes_config_error 4.000s 0.000us 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
aes_alert_reset 4.000s 0.000us 50 50 100.00
failure_test 150 150 100.00
aes_man_cfg_err 3.000s 0.000us 50 50 100.00
aes_config_error 4.000s 0.000us 50 50 100.00
aes_alert_reset 4.000s 0.000us 50 50 100.00
trigger_clear_test 49 50 98.00
aes_clear 4.000s 0.000us 49 50 98.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 0.000us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 7.000s 0.000us 1 1 100.00
reset_recovery 50 50 100.00
aes_alert_reset 4.000s 0.000us 50 50 100.00
stress 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
sideload 100 100 100.00
aes_stress 4.000s 0.000us 50 50 100.00
aes_sideload 4.000s 0.000us 50 50 100.00
deinitialization 50 50 100.00
aes_deinit 4.000s 0.000us 50 50 100.00
stress_all 9 10 90.00
aes_stress_all 24.000s 0.000us 9 10 90.00
gcm_save_and_restore 100 100 100.00
aes_gcm_save_restore 4.000s 0.000us 100 100 100.00
alert_test 50 50 100.00
aes_alert_test 3.000s 0.000us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 6.000s 0.000us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 6.000s 0.000us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 4.000s 0.000us 5 5 100.00
aes_csr_rw 4.000s 0.000us 20 20 100.00
aes_csr_aliasing 5.000s 0.000us 5 5 100.00
aes_same_csr_outstanding 3.000s 0.000us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 4.000s 0.000us 5 5 100.00
aes_csr_rw 4.000s 0.000us 20 20 100.00
aes_csr_aliasing 5.000s 0.000us 5 5 100.00
aes_same_csr_outstanding 3.000s 0.000us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 4.000s 0.000us 50 50 100.00
fault_inject 650 700 92.86
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_cipher_fi 42.000s 0.000us 330 350 94.29
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 5.000s 0.000us 20 20 100.00
tl_intg_err 25 25 100.00
aes_tl_intg_err 5.000s 0.000us 20 20 100.00
aes_sec_cm 6.000s 0.000us 5 5 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 5.000s 0.000us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
aes_alert_reset 4.000s 0.000us 50 50 100.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
sec_cm_main_config_sparse 213 220 96.82
aes_smoke 5.000s 0.000us 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
aes_alert_reset 4.000s 0.000us 50 50 100.00
aes_core_fi 288.000s 0.000us 63 70 90.00
sec_cm_gcm_config_sparse 263 270 97.41
aes_gcm_save_restore 4.000s 0.000us 100 100 100.00
aes_config_error 4.000s 0.000us 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
aes_core_fi 288.000s 0.000us 63 70 90.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
sec_cm_aux_config_regwen 98 100 98.00
aes_readability 3.000s 0.000us 48 50 96.00
aes_stress 4.000s 0.000us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 4.000s 0.000us 50 50 100.00
aes_sideload 4.000s 0.000us 50 50 100.00
sec_cm_key_sw_unreadable 48 50 96.00
aes_readability 3.000s 0.000us 48 50 96.00
sec_cm_data_reg_sw_unreadable 48 50 96.00
aes_readability 3.000s 0.000us 48 50 96.00
sec_cm_key_sec_wipe 48 50 96.00
aes_readability 3.000s 0.000us 48 50 96.00
sec_cm_iv_config_sec_wipe 48 50 96.00
aes_readability 3.000s 0.000us 48 50 96.00
sec_cm_data_reg_sec_wipe 48 50 96.00
aes_readability 3.000s 0.000us 48 50 96.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 4.000s 0.000us 50 50 100.00
sec_cm_main_fsm_sparse 47 50 94.00
aes_fi 1503.000s 0.000us 47 50 94.00
sec_cm_main_fsm_redun 700 750 93.33
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_cipher_fi 42.000s 0.000us 330 350 94.29
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_cipher_fsm_sparse 47 50 94.00
aes_fi 1503.000s 0.000us 47 50 94.00
sec_cm_cipher_fsm_redun 650 700 92.86
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_cipher_fi 42.000s 0.000us 330 350 94.29
sec_cm_cipher_ctr_redun 330 350 94.29
aes_cipher_fi 42.000s 0.000us 330 350 94.29
sec_cm_ctr_fsm_sparse 47 50 94.00
aes_fi 1503.000s 0.000us 47 50 94.00
sec_cm_ctr_fsm_redun 370 400 92.50
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_ghash_fsm_sparse 47 50 94.00
aes_fi 1503.000s 0.000us 47 50 94.00
sec_cm_ctrl_sparse 700 750 93.33
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_cipher_fi 42.000s 0.000us 330 350 94.29
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_main_fsm_global_esc 50 50 100.00
aes_alert_reset 4.000s 0.000us 50 50 100.00
sec_cm_main_fsm_local_esc 700 750 93.33
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_cipher_fi 42.000s 0.000us 330 350 94.29
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_cipher_fsm_local_esc 700 750 93.33
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_cipher_fi 42.000s 0.000us 330 350 94.29
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_ctr_fsm_local_esc 370 400 92.50
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_ghash_fsm_local_esc 137 140 97.86
aes_fi 1503.000s 0.000us 47 50 94.00
aes_ghash_fi 3.000s 0.000us 90 90 100.00
sec_cm_data_reg_local_esc 650 700 92.86
aes_fi 1503.000s 0.000us 47 50 94.00
aes_control_fi 40.000s 0.000us 273 300 91.00
aes_cipher_fi 42.000s 0.000us 330 350 94.29
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 42.000s 0.000us 0 10 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_scoreboard.sv:775) scoreboard [scoreboard] # *
aes_stress_all 23582707548294647776039833513364519848221163566516810338068414545974084164237 20644
UVM_FATAL @ 1120236464 ps: (aes_scoreboard.sv:775) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] # 0
TEST FAILED MESSAGES DID NOT MATCH
0 41 e7 00 0
1 00 c5 00 0
aes_clear 107927500635856277660993306105162896315408351706758897212333565355915081785756 3927
UVM_FATAL @ 271313723 ps: (aes_scoreboard.sv:775) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] # 4
TEST FAILED MESSAGES DID NOT MATCH
0 49 4d a4 0
1 16 61 e9 0
aes_fi 86674323927263342361431606773126955147710000989199642784715951886765063039115 2272
UVM_FATAL @ 117469451 ps: (aes_scoreboard.sv:775) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] # 0
TEST FAILED MESSAGES DID NOT MATCH
0 d4 64 00 0
1 00 ab 00 0
UVM_ERROR (cip_base_vseq.sv:1237) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
aes_stress_all_with_rand_reset 62861121936620110626270393940665253138367642677177791809729858735324596731722 158
UVM_ERROR @ 239631718 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 239631718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 94241470455982566011546241842063225626782889964338413566320514136942043607808 358
UVM_ERROR @ 1019760123 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1019760123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 81885900383918051482833046827747408879820980865480532064571760248590659198022 323
UVM_ERROR @ 1117688591 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1117688591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:75) [aes_reseed_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 91231462737085114208471943916157558921353607413547921910302999085629152586976 1187
UVM_FATAL @ 684041161 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_reseed_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 684041161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:104) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 76188186758002507960768292467237265681266195460674700698062922139190042860219 158
UVM_FATAL @ 10005489732 ps: (aes_core_fi_vseq.sv:104) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005489732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 11523713173670668516559233529523305462403975476355020227154358632521504346495 522
UVM_ERROR @ 158762398 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 158762398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 29292246289439344709391461373242898692396471866983656834456630426456151486344 387
UVM_ERROR @ 1606964944 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1606964944 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 1727392055423625999072850760982937343388901948957932315759886000976450725784 826
UVM_ERROR @ 1119715634 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1119715634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 36214853374239263365449281760321825640822515448637925923987023386593220206440 1094
UVM_ERROR @ 2272616319 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 2272616319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 93180061405234795549861606300855708649368838731002123477175276621188426294379 548
UVM_ERROR @ 2538100669 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 2538100669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 84931181220546540570563123360524893998562141884381187507745079136170792456844 156
UVM_FATAL @ 10005963193 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005963193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 14237762454438651438585380436333667567627981192405446181903620396032259414374 154
UVM_FATAL @ 10005351885 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005351885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 77188622680942932509656015915814292536642159225059589056387571805970865564484 153
UVM_FATAL @ 10004940943 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004940943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:75) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 5476790656980081434894047139305675525066959615853145368514354994275610345413 154
UVM_FATAL @ 52990616 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 52990616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
aes_cipher_fi 108568439045339176805491162374938108548966146399823317764659522202450150491466 143
UVM_FATAL @ 10008773452 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008773452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 4470162242017620604301320820669753410355653359313338424997353658000624619873 145
UVM_FATAL @ 10021285687 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10021285687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 103233701773042034187367139280080806859631972862238440749198774286759308668206 153
UVM_FATAL @ 10016161605 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10016161605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 15071460701060777934260692648757071757126524954725764183628602420273096996786 154
UVM_FATAL @ 10009988495 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009988495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 96026951938575788087310114457664601339458521949703611697341696999061798592679 146
UVM_FATAL @ 10002474055 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10002474055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 47190244028545009954405573946384685985755697802222290592283801863765295020078 158
UVM_FATAL @ 10002394561 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10002394561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 105182868920762233638581024790826499079317558642869307294728504231126259350351 145
UVM_FATAL @ 10045462402 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10045462402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 56951901128841565084802551839475367089442097797495702889585040928771734697077 155
UVM_FATAL @ 10006371987 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006371987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 111571621521791405420081505925567025739317970137801136277598995416830713575742 156
UVM_FATAL @ 10033487248 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10033487248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
aes_control_fi 111072986567555826221181294005731251846817098585563233228601206226420876151272 155
UVM_FATAL @ 10002601798 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10002601798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 34240338700755391211006451435246933268541990296256459352573217679982613763802 149
UVM_FATAL @ 10026820486 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10026820486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 81344185424475485357828777834553236368293189942400473243324575020461611642763 147
UVM_FATAL @ 10012171451 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012171451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 79157023236984668948856057153932590816162351374377404317013440515886846616540 143
UVM_FATAL @ 10008668571 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008668571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 47935560423058855023541289753686405014245994024159279928987087606125758452029 141
UVM_FATAL @ 10010703575 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010703575 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 63743399918074764548033714040010106012760593211506903245134938664921351192285 150
UVM_FATAL @ 10005424245 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005424245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 80906001054208067813872741668785895013058837109822582062733356512067924197234 157
UVM_FATAL @ 10027707440 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10027707440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 74070407614220294587691708550180545161736013457048854335711701948179834780715 146
UVM_FATAL @ 10006247889 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006247889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 9474250864817579820281995996294877114853992171736030159579076033201582866857 156
UVM_FATAL @ 10009122447 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009122447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 108300805592715639688081485676159434135131832631807478222478829403034083708433 144
UVM_FATAL @ 10006761947 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006761947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 23707090698430707392916677748407062970437014698902229635966040778645218240574 141
UVM_FATAL @ 10009499423 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009499423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 69670360994259794290280785495406832310510114528680980936341138944998288175897 155
UVM_FATAL @ 10012074013 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012074013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 86068182522595365493920358753292037583214832834749017502106838637532206407597 144
UVM_FATAL @ 10008678159 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008678159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 101270758939388392865448129540172632544224053465994653188932472887509821824246 144
UVM_FATAL @ 10010277675 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010277675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
aes_cipher_fi 48530449202592203313350389999977302835244450428631813453479339774062422175472 None
Job timed out after 1 minutes
aes_control_fi 32797191223929112163991140800554144853018713816761636813493389354027943166844 None
Job timed out after 1 minutes
aes_cipher_fi 76708904559656937064717432535827552377117424045401734969195087226424937233726 None
Job timed out after 1 minutes
aes_control_fi 8864250963136012478109247186932676279957616993776761229856843840469717621927 None
Job timed out after 1 minutes
aes_control_fi 101849147120323214027174520595399154777764290923757431804460071536426936250253 None
Job timed out after 1 minutes
aes_control_fi 89853548901824727487958153678747553791282493173297155563836700957346328170308 None
Job timed out after 1 minutes
aes_cipher_fi 101047694859467206565747685430925686241196977837935983172654466975385826269855 None
Job timed out after 1 minutes
aes_control_fi 5963907450670091559827967058271025375283755067259596614535373753268930386504 None
Job timed out after 1 minutes
aes_control_fi 14941953131550912682051943255445033404988406989552655679444413733685457388223 None
Job timed out after 1 minutes
aes_control_fi 109498284842060627901370114706639836233617234040861581300349290381197063543067 None
Job timed out after 1 minutes
aes_cipher_fi 14738480046377709689665746464025368062442508004984004333625806765368396023447 None
Job timed out after 1 minutes
aes_control_fi 31440297693646043724390481581566182916894709636712000880684898284629750523418 None
Job timed out after 1 minutes
aes_cipher_fi 46539700910704214513188531445066349960416554903701202169487185033249195340014 None
Job timed out after 1 minutes
aes_control_fi 67543330961969158991396115673863125273569889702341869244075053295523415350171 None
Job timed out after 1 minutes
aes_cipher_fi 66406884194143801177407549748264905732558616206575692135448475112812308712254 None
Job timed out after 1 minutes
aes_control_fi 81236638360067955854438663111195190912996801490362626208228324988849388585093 None
Job timed out after 1 minutes
aes_cipher_fi 76746582137393102835521664646434715476420557417099416316845569037041518674765 None
Job timed out after 1 minutes
aes_cipher_fi 83289193650906038143582675225784337889213736787291918152040440193522290193602 None
Job timed out after 1 minutes
aes_cipher_fi 103724295542311055464144172846286012962160960470845035418749132981529719939576 None
Job timed out after 1 minutes
aes_control_fi 46527442534301320671333098371014381753448435820022400361858270712940117033099 None
Job timed out after 1 minutes
aes_control_fi 7838356485607284244911168249522748331301019685008035158189432513075782282081 None
Job timed out after 1 minutes
aes_cipher_fi 95621780908840300061713481027381605083044494213052855777821817680873359853314 None
Job timed out after 1 minutes
aes_cipher_fi 10629539889973857395087609411825193267466869318132918455858491719572896621546 None
Job timed out after 1 minutes
UVM_FATAL (aes_readability_vseq.sv:66) virtual_sequencer [aes_readability_vseq] ----|Write data reg was Readable |----
aes_readability 54823687247095959020213904085940144251636623891533516862996450209790265939631 140
UVM_FATAL @ 9318672 ps: (aes_readability_vseq.sv:66) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_readability_vseq] ----|Write data reg was Readable |----
UVM_INFO @ 9318672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_readability 4933652534253082458808421835779719043661684602891727231918895192853139320456 139
UVM_FATAL @ 4713210 ps: (aes_readability_vseq.sv:66) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_readability_vseq] ----|Write data reg was Readable |----
UVM_INFO @ 4713210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
aes_fi 49594532737777822953884759560825148097910078300531412795190372065798323910768 14275293
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 75432221025893459476906443791349284911083752675631259964577299481075942158085 145
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 65009318094709835725290427335296492293693602585141544978006386786762578528193 143
UVM_FATAL @ 10013237217 ps: (aes_core_fi_vseq.sv:93) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013237217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6)
aes_core_fi 56825539753944936172137905112710440055867616602355924643305932732395592521888 143
UVM_FATAL @ 10010077514 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0xf633f384, Comparison=CompareOpEq, exp_data=0x0, call_count=6)
UVM_INFO @ 10010077514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 115272672811082522213710668811475401498959740618969794997753818644385564488098 144
UVM_FATAL @ 10028913182 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x58881a84, Comparison=CompareOpEq, exp_data=0x0, call_count=6)
UVM_INFO @ 10028913182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:910) scoreboard [scoreboard]
aes_fi 23392153127974426803095470385133189091478200112511995805670398661212028237301 6935
UVM_FATAL @ 97771489 ps: (aes_scoreboard.sv:910) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0