| V1 |
|
98.75% |
| V2 |
|
98.75% |
| unmapped |
|
90.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| prim_alert_request_test | 79 | 80 | 98.75 | |||
| prim_async_alert | 0.540s | 0.000us | 20 | 20 | 100.00 | |
| prim_async_fatal_alert | 0.530s | 0.000us | 19 | 20 | 95.00 | |
| prim_sync_alert | 0.510s | 0.000us | 20 | 20 | 100.00 | |
| prim_sync_fatal_alert | 0.520s | 0.000us | 20 | 20 | 100.00 | |
| prim_alert_test | 79 | 80 | 98.75 | |||
| prim_async_alert | 0.540s | 0.000us | 20 | 20 | 100.00 | |
| prim_async_fatal_alert | 0.530s | 0.000us | 19 | 20 | 95.00 | |
| prim_sync_alert | 0.510s | 0.000us | 20 | 20 | 100.00 | |
| prim_sync_fatal_alert | 0.520s | 0.000us | 20 | 20 | 100.00 | |
| prim_alert_ping_request_test | 79 | 80 | 98.75 | |||
| prim_async_alert | 0.540s | 0.000us | 20 | 20 | 100.00 | |
| prim_async_fatal_alert | 0.530s | 0.000us | 19 | 20 | 95.00 | |
| prim_sync_alert | 0.510s | 0.000us | 20 | 20 | 100.00 | |
| prim_sync_fatal_alert | 0.520s | 0.000us | 20 | 20 | 100.00 | |
| prim_alert_integrity_errors_test | 79 | 80 | 98.75 | |||
| prim_async_alert | 0.540s | 0.000us | 20 | 20 | 100.00 | |
| prim_async_fatal_alert | 0.530s | 0.000us | 19 | 20 | 95.00 | |
| prim_sync_alert | 0.510s | 0.000us | 20 | 20 | 100.00 | |
| prim_sync_fatal_alert | 0.520s | 0.000us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| prim_alert_init_trigger_test | 79 | 80 | 98.75 | |||
| prim_async_alert | 0.540s | 0.000us | 20 | 20 | 100.00 | |
| prim_async_fatal_alert | 0.530s | 0.000us | 19 | 20 | 95.00 | |
| prim_sync_alert | 0.510s | 0.000us | 20 | 20 | 100.00 | |
| prim_sync_fatal_alert | 0.520s | 0.000us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| Unmapped | 18 | 20 | 90.00 | |||
| prim_async_fatal_alert_with_3_cycles_skew | 0.530s | 0.000us | 18 | 20 | 90.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Offending 'alert_o' | ||||
| prim_async_fatal_alert | 73342403562503633713192219150376931721059650701863397306520539721261202747645 | 100 |
Offending 'alert_o'
UVM_ERROR src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv(320) @ 30776000: reporter [ASSERT FAILED] Alert_A
Starting assertion attempts at time 30836090ps: level = 0 arg = i_alert_receiver.PingDiffOk_A (from inst prim_alert_tb (src/lowrisc_dv_prim_alert_sim_0.1/tb/prim_alert_tb.sv:254))
[prim_alert_seq] Ping signal integrity error sequence finished!
|
|
| prim_async_fatal_alert_with_3_cycles_skew | 79749213346896864745649455777116836619360359323407200677307739004917602228503 | 100 |
Offending 'alert_o'
UVM_ERROR src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv(320) @ 28642000: reporter [ASSERT FAILED] Alert_A
Starting assertion attempts at time 28702019ps: level = 0 arg = i_alert_receiver.PingDiffOk_A (from inst prim_alert_tb (src/lowrisc_dv_prim_alert_sim_0.1/tb/prim_alert_tb.sv:254))
[prim_alert_seq] Ping signal integrity error sequence finished!
|
|
| Offending 'ping_ok_o' | ||||
| prim_async_fatal_alert_with_3_cycles_skew | 25611661699812624856387577257357454086211566280827732150257187709383367883940 | 100 |
Offending 'ping_ok_o'
UVM_ERROR src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv(312) @ 29375000: reporter [ASSERT FAILED] PingResponse1_A
Starting assertion attempts at time 29434599ps: level = 0 arg = i_alert_receiver.PingDiffOk_A (from inst prim_alert_tb (src/lowrisc_dv_prim_alert_sim_0.1/tb/prim_alert_tb.sv:254))
[prim_alert_seq] Ping signal integrity error sequence finished!
|
|