Simulation Results: aes/masked

 
03/04/2026 17:01:04 DVSim: v1.16.0 sha: 3ba6465 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.43 %
  • code
  • 98.15 %
  • assert
  • 98.57 %
  • func
  • 95.57 %
  • block
  • 98.23 %
  • line
  • 99.41 %
  • branch
  • 95.06 %
  • toggle
  • 98.13 %
  • FSM
  • 100.00 %
Validation stages
V1
100.00%
V2
99.50%
V2S
95.82%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 0.000us 1 1 100.00
smoke 50 50 100.00
aes_smoke 8.000s 0.000us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 3.000s 0.000us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 3.000s 0.000us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 8.000s 0.000us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 4.000s 0.000us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 0.000us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 3.000s 0.000us 20 20 100.00
aes_csr_aliasing 4.000s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 8.000s 0.000us 50 50 100.00
aes_config_error 9.000s 0.000us 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
key_length 150 150 100.00
aes_smoke 8.000s 0.000us 50 50 100.00
aes_config_error 9.000s 0.000us 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
back2back 100 100 100.00
aes_stress 26.000s 0.000us 50 50 100.00
aes_b2b 63.000s 0.000us 50 50 100.00
backpressure 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
multi_message 198 200 99.00
aes_smoke 8.000s 0.000us 50 50 100.00
aes_config_error 9.000s 0.000us 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
aes_alert_reset 69.000s 0.000us 48 50 96.00
failure_test 148 150 98.67
aes_man_cfg_err 6.000s 0.000us 50 50 100.00
aes_config_error 9.000s 0.000us 50 50 100.00
aes_alert_reset 69.000s 0.000us 48 50 96.00
trigger_clear_test 50 50 100.00
aes_clear 84.000s 0.000us 50 50 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 11.000s 0.000us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 8.000s 0.000us 1 1 100.00
reset_recovery 48 50 96.00
aes_alert_reset 69.000s 0.000us 48 50 96.00
stress 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
sideload 100 100 100.00
aes_stress 26.000s 0.000us 50 50 100.00
aes_sideload 9.000s 0.000us 50 50 100.00
deinitialization 49 50 98.00
aes_deinit 1410.000s 0.000us 49 50 98.00
stress_all 10 10 100.00
aes_stress_all 111.000s 0.000us 10 10 100.00
gcm_save_and_restore 100 100 100.00
aes_gcm_save_restore 12.000s 0.000us 100 100 100.00
alert_test 50 50 100.00
aes_alert_test 3.000s 0.000us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 4.000s 0.000us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 4.000s 0.000us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 3.000s 0.000us 5 5 100.00
aes_csr_rw 3.000s 0.000us 20 20 100.00
aes_csr_aliasing 4.000s 0.000us 5 5 100.00
aes_same_csr_outstanding 3.000s 0.000us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 3.000s 0.000us 5 5 100.00
aes_csr_rw 3.000s 0.000us 20 20 100.00
aes_csr_aliasing 4.000s 0.000us 5 5 100.00
aes_same_csr_outstanding 3.000s 0.000us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 67.000s 0.000us 50 50 100.00
fault_inject 663 700 94.71
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_cipher_fi 49.000s 0.000us 332 350 94.86
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 0.000us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 0.000us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 0.000us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 0.000us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 5.000s 0.000us 20 20 100.00
tl_intg_err 25 25 100.00
aes_sec_cm 9.000s 0.000us 5 5 100.00
aes_tl_intg_err 4.000s 0.000us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 4.000s 0.000us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 48 50 96.00
aes_alert_reset 69.000s 0.000us 48 50 96.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 0.000us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 0.000us 20 20 100.00
sec_cm_main_config_sparse 214 220 97.27
aes_smoke 8.000s 0.000us 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
aes_alert_reset 69.000s 0.000us 48 50 96.00
aes_core_fi 65.000s 0.000us 66 70 94.29
sec_cm_gcm_config_sparse 266 270 98.52
aes_gcm_save_restore 12.000s 0.000us 100 100 100.00
aes_config_error 9.000s 0.000us 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
aes_core_fi 65.000s 0.000us 66 70 94.29
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 0.000us 20 20 100.00
sec_cm_aux_config_regwen 100 100 100.00
aes_readability 4.000s 0.000us 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 26.000s 0.000us 50 50 100.00
aes_sideload 9.000s 0.000us 50 50 100.00
sec_cm_key_sw_unreadable 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_data_reg_sw_unreadable 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_key_sec_wipe 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_iv_config_sec_wipe 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_data_reg_sec_wipe 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 26.000s 0.000us 50 50 100.00
sec_cm_main_fsm_sparse 49 50 98.00
aes_fi 813.000s 0.000us 49 50 98.00
sec_cm_main_fsm_redun 713 750 95.07
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_cipher_fi 49.000s 0.000us 332 350 94.86
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_cipher_fsm_sparse 49 50 98.00
aes_fi 813.000s 0.000us 49 50 98.00
sec_cm_cipher_fsm_redun 663 700 94.71
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_cipher_fi 49.000s 0.000us 332 350 94.86
sec_cm_cipher_ctr_redun 332 350 94.86
aes_cipher_fi 49.000s 0.000us 332 350 94.86
sec_cm_ctr_fsm_sparse 49 50 98.00
aes_fi 813.000s 0.000us 49 50 98.00
sec_cm_ctr_fsm_redun 381 400 95.25
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_ghash_fsm_sparse 49 50 98.00
aes_fi 813.000s 0.000us 49 50 98.00
sec_cm_ctrl_sparse 713 750 95.07
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_cipher_fi 49.000s 0.000us 332 350 94.86
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_main_fsm_global_esc 48 50 96.00
aes_alert_reset 69.000s 0.000us 48 50 96.00
sec_cm_main_fsm_local_esc 713 750 95.07
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_cipher_fi 49.000s 0.000us 332 350 94.86
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_cipher_fsm_local_esc 713 750 95.07
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_cipher_fi 49.000s 0.000us 332 350 94.86
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_ctr_fsm_local_esc 381 400 95.25
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_ctr_fi 3.000s 0.000us 50 50 100.00
sec_cm_ghash_fsm_local_esc 139 140 99.29
aes_fi 813.000s 0.000us 49 50 98.00
aes_ghash_fi 6.000s 0.000us 90 90 100.00
sec_cm_data_reg_local_esc 663 700 94.71
aes_fi 813.000s 0.000us 49 50 98.00
aes_control_fi 31.000s 0.000us 282 300 94.00
aes_cipher_fi 49.000s 0.000us 332 350 94.86
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 44.000s 0.000us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 59710824720069909183210562261146792712476099399428656046742935616386891727605 1244
UVM_ERROR @ 1189741413 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1189741413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 88490893626438670153885357285863462503962212681532453702757620001640694349365 306
UVM_ERROR @ 239683085 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 239683085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 88024024055113785762145982424291368703097419804507459521369616504441340742308 509
UVM_ERROR @ 756397305 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 756397305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 731426961509948237300311010895229940540403547864181942046194164734683028816 1322
UVM_ERROR @ 14220980561 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 14220980561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1237) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
aes_stress_all_with_rand_reset 106582589984390587445514834513292652157849430702548225551800708573973748664543 145
UVM_ERROR @ 237234458 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 237234458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 74001135931586160679213895128151444985900143691732405432439606641643447363039 666
UVM_ERROR @ 920060974 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 920060974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 4425137282401720898980644370000633855448010497681428298446125706968880200665 573
UVM_ERROR @ 2205290113 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 2205290113 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:75) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 56106066860403642800310890831604744088418775349522688546879395576588414610212 211
UVM_FATAL @ 348374350 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 348374350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 90095493646256033385570185721416308495835461616833550748853136950295608006818 146
UVM_FATAL @ 10010390288 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010390288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 72941118193975472014614185442930223403739864116258865391294685926010616134400 151
UVM_FATAL @ 10027401176 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10027401176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 94024742633132569634504526870071952408419865107947182137422912612940895298122 158
UVM_FATAL @ 10020976242 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10020976242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:75) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 25974169936705439896605187178504171897292692199370460454678291674030744209242 154
UVM_FATAL @ 69004505 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 69004505 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 103956378260577146823414387825701370447629326709164489701878803921234751650969 681
UVM_FATAL @ 508321508 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 508321508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
aes_cipher_fi 50368453614821815773556310582521937131276052841556780332460072781331273592949 None
Job timed out after 1 minutes
aes_control_fi 95701668922079512960434816503491137680702943174358054481135530215640408613348 None
Job timed out after 1 minutes
aes_control_fi 32054176207150391769552593881692075575516844138099388090382427031502014832539 None
Job timed out after 1 minutes
aes_control_fi 83366547750184260613926218402054913728279303179983523968845708374607327918313 None
Job timed out after 1 minutes
aes_control_fi 6049314762852811566797881624143728108078158796247867105363951791557209407155 None
Job timed out after 1 minutes
aes_control_fi 108563540585525238705884264301327976871952273431499471921744618818324697051787 None
Job timed out after 1 minutes
aes_cipher_fi 113567418182020809067003566707060381223045348388128709098894076423932628686105 None
Job timed out after 1 minutes
aes_cipher_fi 100909758588144537912693623601476866571390678488288476757834347427516666054558 None
Job timed out after 1 minutes
aes_control_fi 55701667994317195726520122031076728451019575324559605349313395963854398451265 None
Job timed out after 1 minutes
aes_control_fi 96319124637380959717229838591465290656095582586987559805675230063893623326179 None
Job timed out after 1 minutes
aes_control_fi 17245578251334128516738375328821771133050159883211520912048174609087502865615 None
Job timed out after 1 minutes
aes_cipher_fi 4513415876160270380338093560520427681242464979798156861081019074274284782257 None
Job timed out after 1 minutes
aes_control_fi 102864347733105995615497321655390441945719276826160786541978336881659389155192 None
Job timed out after 1 minutes
aes_control_fi 96218297480782425888313068876374852983211439164215682001237219057978360470153 None
Job timed out after 1 minutes
aes_control_fi 2511553813628388573582187704467146400908348054790570173597515098880079953118 None
Job timed out after 1 minutes
aes_control_fi 48182106092071840782100283971959112315787367882499046840808017090225816157289 None
Job timed out after 1 minutes
aes_cipher_fi 23920167270510383555727544876151636657120992389986479676417133791023501519221 None
Job timed out after 1 minutes
aes_cipher_fi 60993081929652334910588769228500269713849538030505220554026200155490771646590 None
Job timed out after 1 minutes
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
aes_deinit 1860190488226076055490373497604988043999359701861740020582183079007616478592 168
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_fi 74306109848866816313620250124801244906611043924258497544578861462576713050557 6854894
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4)
aes_alert_reset 113404106252088208333619064379167286627106844800548501230665693654651232207903 367320
UVM_FATAL @ 10035046758 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0xef9d8284, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10035046758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 36509645300370562736573796266553663452713178597899063710284627423496142066295 141
UVM_FATAL @ 10038449472 ps: (aes_core_fi_vseq.sv:93) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10038449472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1112): Assertion AesModeValid has failed
aes_alert_reset 35397645870439667759190181066482732359576663005187789313076138730497255228071 1010
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1112): (time 17789573 PS) Assertion tb.dut.u_aes_core.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 17789573 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[2].gen_fsm_n.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 17789573 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[1].gen_fsm_p.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 17789573 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[0].gen_fsm_p.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
UVM_ERROR @ 17789573 ps: (aes_core.sv:1112) [ASSERT FAILED] AesModeValid
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
aes_cipher_fi 55040257498070163988834383159114630336051536698031699696978430862137996333403 156
UVM_FATAL @ 10009583428 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009583428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 73274632346574312577553336019717735031116663407800629147161340490142464515918 148
UVM_FATAL @ 10041581418 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10041581418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 18953287595345380197733327768004371019910445731707595494127087782172628186262 147
UVM_FATAL @ 10014494250 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10014494250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 55880730786174466548466541668199283610008923009606112337954801008377877874330 143
UVM_FATAL @ 10008903097 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008903097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 81298824661070681526195498809821026325912066887728353757823293890740471429845 151
UVM_FATAL @ 10005107271 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005107271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 27631012681790781801678297025085929701135793654021087660651609991748790251155 145
UVM_FATAL @ 10016851868 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10016851868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 78255079311785244452453042148618841672700004477625255853001836978137992996867 161
UVM_FATAL @ 10024740232 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10024740232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 59947227739325771535695933424341007886350423035845756879646188231499894231149 152
UVM_FATAL @ 10069574780 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10069574780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 41887258534681595884700171258106170201915778275162816907438181407870372430697 153
UVM_FATAL @ 10260769925 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10260769925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 52997472276979709443881609272162786313553522374171167233751957447753229543008 147
UVM_FATAL @ 10011312282 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011312282 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 49992378809718500820796938633988478187356752682197945188785455165522526626798 147
UVM_FATAL @ 10010746414 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010746414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
aes_control_fi 790966005799590184666061387021197194646261468872133688166726245673725065901 153
UVM_FATAL @ 10013648681 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013648681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 67330296631114980248054209007000686356945707054139770711975986034177863486188 150
UVM_FATAL @ 10025517568 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10025517568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 40726762578256796637596771382668735990559893249802692865673015936346400056219 143
UVM_FATAL @ 10026743825 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10026743825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 11213482737390282800825697221706185338364646042872924111395576433726379662127 151
UVM_FATAL @ 10023441120 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10023441120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 29561528503494213579955120444033300914305061086311734146864661213906353480341 148
UVM_FATAL @ 10012700259 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012700259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 55901655065532267006048843234058749320410244434268247879696066703646468539400 150
UVM_FATAL @ 10028934275 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10028934275 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)
aes_cipher_fi 94146555746992356210762699459477766993283590314676378954737167937794968053516 141
UVM_FATAL @ 10046160573 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x7ecaac84, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10046160573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---