Simulation Results: gpio

 
03/04/2026 17:01:04 DVSim: v1.16.0 sha: 3ba6465 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.46 %
  • code
  • 92.55 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.28 %
  • cond
  • 95.40 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
99.29%
V2
92.30%
V2S
95.56%
V3
39.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.530s 0.000us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.540s 0.000us 50 50 100.00
gpio_smoke_en_cdc_prim 1.200s 0.000us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.170s 0.000us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.890s 0.000us 5 5 100.00
csr_rw 19 20 95.00
gpio_csr_rw 0.840s 0.000us 19 20 95.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 5.440s 0.000us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 1.800s 0.000us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.370s 0.000us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 24 25 96.00
gpio_csr_rw 0.840s 0.000us 19 20 95.00
gpio_csr_aliasing 1.800s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.670s 0.000us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.310s 0.000us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.270s 0.000us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.250s 0.000us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 2.580s 0.000us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 2.540s 0.000us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 17.830s 0.000us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 4.390s 0.000us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.060s 0.000us 50 50 100.00
stress_all 7 50 14.00
gpio_stress_all 66.620s 0.000us 7 50 14.00
alert_test 50 50 100.00
gpio_alert_test 0.780s 0.000us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.740s 0.000us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.150s 0.000us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.150s 0.000us 20 20 100.00
tl_d_outstanding_access 43 50 86.00
gpio_csr_rw 0.840s 0.000us 19 20 95.00
gpio_same_csr_outstanding 1.290s 0.000us 14 20 70.00
gpio_csr_aliasing 1.800s 0.000us 5 5 100.00
gpio_csr_hw_reset 0.890s 0.000us 5 5 100.00
tl_d_partial_access 43 50 86.00
gpio_csr_rw 0.840s 0.000us 19 20 95.00
gpio_same_csr_outstanding 1.290s 0.000us 14 20 70.00
gpio_csr_aliasing 1.800s 0.000us 5 5 100.00
gpio_csr_hw_reset 0.890s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 24 25 96.00
gpio_sec_cm 1.300s 0.000us 5 5 100.00
gpio_tl_intg_err 2.250s 0.000us 19 20 95.00
sec_cm_bus_integrity 19 20 95.00
gpio_tl_intg_err 2.250s 0.000us 19 20 95.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 39 50 78.00
gpio_rand_straps 0.770s 0.000us 39 50 78.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 15.130s 0.000us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.990s 0.000us 50 50 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 30282192490339348297190759568183518839354509967815078697891385824435842517444 622
UVM_ERROR @ 1324142042 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3572912324 [0xd4f650c4] vs 745943431 [0x2c763187])
UVM_INFO @ 1324142042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35524336948806685648984980569345962850712277385572375242355290269158451671800 710
UVM_ERROR @ 11553766981 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4250656759 [0xfd5bdff7] vs 1049651795 [0x3e906a53])
UVM_INFO @ 11553766981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 104057161290405263301756171413940857254328336329486153554792520733985030834170 1062
UVM_ERROR @ 3536340270 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2313114922 [0x89df552a])
UVM_INFO @ 3536340270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 61716293512964900909952065351996615909380558922510171612682128431469841478718 686
UVM_ERROR @ 1084847775 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (93473449 [0x5924aa9] vs 2588131709 [0x9a43c17d])
UVM_INFO @ 1084847775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 56934254906346919838387059089319526618355589125632520459409904376300340819575 75
UVM_ERROR @ 4959298 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1027584912 [0x3d3fb390])
UVM_INFO @ 4959298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 83769796763930270235782435235266293186958223458991288967441302740693827853819 1088
UVM_ERROR @ 15490169171 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3712514099 [0xdd487833])
UVM_INFO @ 15490169171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 10638726867775612399280169894990975538377977220534780852895059741012272031758 1059
UVM_ERROR @ 25311746357 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2540274752 [0x97698440])
UVM_INFO @ 25311746357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 90906354182513893937139944093327819892835141477781282419907530629842902956665 75
UVM_ERROR @ 3721121 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1423969574 [0x54e00d26])
UVM_INFO @ 3721121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 69975997982146803814537328650891048628080615635390141080837131528136897493884 1185
UVM_ERROR @ 4937545940 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3636443888 [0xd8bfbaf0] vs 3229761301 [0xc0823f15])
UVM_INFO @ 4937545940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 87103418132545697560125580835442285338863847988555039889206158300816320141249 75
UVM_ERROR @ 44537283 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3340350693 [0xc719b4e5])
UVM_INFO @ 44537283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 99822301354949336579898837028012873109652449975519878861809748915588328927486 75
UVM_ERROR @ 5796260 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2301762480 [0x89321bb0])
UVM_INFO @ 5796260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 94595116905399999666448492545720145374686221883430202805481663342349484509461 792
UVM_ERROR @ 2172457230 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3150010664 [0xbbc15928] vs 814003667 [0x3084b5d3])
UVM_INFO @ 2172457230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 83395168403323694085150508898963735888069906085235876229455040075189020809023 75
UVM_ERROR @ 2267975 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1890743553 [0x70b27501])
UVM_INFO @ 2267975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 52426870318698684001219352725212451168529748972598649074135691478622742959558 301
UVM_ERROR @ 4626962579 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2191609145 [0x82a14d39])
UVM_INFO @ 4626962579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 14580920747535191747837312332093555790706462304370473569572343464360890817980 75
UVM_ERROR @ 6550825 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2383678305 [0x8e140b61])
UVM_INFO @ 6550825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 51461707708769210100079752476101774462291590331885737661592992468173948511727 1818
UVM_ERROR @ 13658906883 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2667967910 [0x9f05f5a6])
UVM_INFO @ 13658906883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 64616170168065595630136434431954311252267293768063343411312003543383070448797 75
UVM_ERROR @ 1272868 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3228734299 [0xc072935b])
UVM_INFO @ 1272868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 46656722640810198128159844943209896462832769344075609532376856359503739808067 963
UVM_ERROR @ 9040587673 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3772119652 [0xe0d5fa64])
UVM_INFO @ 9040587673 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 65206429799322175571294140872484363166155966929399488702771378582461757587626 1001
UVM_ERROR @ 1923591754 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2802977316 [0xa7120a24])
UVM_INFO @ 1923591754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 82344417639290942155437889868776859410100802717099302472428958100336838856755 253
UVM_ERROR @ 1554122167 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (305376219 [0x1233abdb] vs 1486054228 [0x58936354])
UVM_INFO @ 1554122167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 15111717486393687690228497597715115615693442221313486483654788303644690221122 77
UVM_ERROR @ 595477853 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1401400200 [0x5387ab88] vs 2949465715 [0xafcd4673])
UVM_INFO @ 595477853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 94984901151272894555837084122112209194113687788382147757576447328934843449348 266
UVM_ERROR @ 982995403 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3362566376 [0xc86cb0e8])
UVM_INFO @ 982995403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 39785848128376149708591017695316719653271832346948451702790275629176618619458 565
UVM_ERROR @ 4630366479 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 988677548 [0x3aee05ac])
UVM_INFO @ 4630366479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 26379012491304835941613608017517931901927845177602511010514423310776014234053 75
UVM_ERROR @ 302573498 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 638203201 [0x260a3541])
UVM_INFO @ 302573498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 71475706988376889938823962692029067093994126531861295163889349682227238425724 256
UVM_ERROR @ 1051574924 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 534077274 [0x1fd55f5a])
UVM_INFO @ 1051574924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 100567299892104089272803611301091770047087317145324963454993015759954527227159 336
UVM_ERROR @ 2784676791 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1115178914 [0x427847a2] vs 1573887397 [0x5dcf9da5])
UVM_INFO @ 2784676791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 17742051122263041274888884912669335243946574943694179259271194705537217157551 1374
UVM_ERROR @ 5895969672 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4167220147 [0xf862bbb3] vs 3998371728 [0xee524f90])
UVM_INFO @ 5895969672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 13879952613396555979002741689307607904992622137925628007502144305000705716379 297
UVM_ERROR @ 3217990642 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4163358800 [0xf827d050])
UVM_INFO @ 3217990642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 58061040960357879211217723377410627031254700777062043369227154815233515336100 533
UVM_ERROR @ 771192151 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 753424958 [0x2ce85a3e])
UVM_INFO @ 771192151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 27351558485803259382505989663400524901845800776722795014135715625899865108805 75
UVM_ERROR @ 7676685 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 504481520 [0x1e11c6f0])
UVM_INFO @ 7676685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 74657298851656218898606610311972071533230584044631710028524833159843242595234 79
UVM_ERROR @ 297073410 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (311959168 [0x12981e80] vs 2022012556 [0x7885768c])
UVM_INFO @ 297073410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 9203353345165927922495776859231690248340217573005710979934856442602959388777 240
UVM_ERROR @ 485645056 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1653882627 [0x62943f03] vs 1103670098 [0x41c8ab52])
UVM_INFO @ 485645056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 98744022996704207504283496570023715167749793996297300829141103680142498833731 77
UVM_ERROR @ 690668764 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2169223018 [0x814bb76a])
UVM_INFO @ 690668764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 60192182260705576097525924771124578384750071905079621156480035147786747513106 2388
UVM_ERROR @ 14410667489 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1049679235 [0x3e90d583])
UVM_INFO @ 14410667489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 77767414402022926687706028101096055100164594029851299494489973592761631014434 727
UVM_ERROR @ 7469423863 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3195914107 [0xbe7dc77b] vs 1766514291 [0x694ade73])
UVM_INFO @ 7469423863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 99846280038520433610050508293466667267198765251041684275243938355746136790110 487
UVM_ERROR @ 415443592 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (955168158 [0x38eeb59e] vs 50157365 [0x2fd5735])
UVM_INFO @ 415443592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 27328558441983493476691369964269358516620326431842044522089042061109461536337 75
UVM_ERROR @ 1438730 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 700067680 [0x29ba2f60])
UVM_INFO @ 1438730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 14415475514710945250159088581435351326123926987816132962975383860352595726808 941
UVM_ERROR @ 1778956405 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1379321949 [0x5236c85d] vs 1213746206 [0x48584c1e])
UVM_INFO @ 1778956405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 87004264084968627976947326604077662078104447384616185120818337797156511941592 2397
UVM_ERROR @ 6494330217 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1397249972 [0x534857b4])
UVM_INFO @ 6494330217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 45723707365885846243029644912611562957207570470474948504893733528520066883920 320
UVM_ERROR @ 437616522 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (294827018 [0x1192b40a] vs 2568919091 [0x991e9833])
UVM_INFO @ 437616522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 44869206305150941575120982717408652651545087775324312743356735941146369182639 75
UVM_ERROR @ 1720669 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3303917151 [0xc4edc65f])
UVM_INFO @ 1720669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 98533052514837401629620687058875911073639691722517100646907799898650760747330 453
UVM_ERROR @ 725432402 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3634775205 [0xd8a644a5])
UVM_INFO @ 725432402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 87545695904314573412121105715358335264477571167061649326104106423820531429459 446
UVM_ERROR @ 918955236 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1593613113 [0x5efc9b39] vs 4073315018 [0xf2c9daca])
UVM_INFO @ 918955236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 106209159416326076198881778661353682243240311975962199997795765429959944540453 1584
UVM_ERROR @ 22852034566 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1131812958 [0x4376185e] vs 600373129 [0x23c8f789])
UVM_INFO @ 22852034566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 16994777378410080249010526811049456616189099523628656798798845461591758146527 75
UVM_ERROR @ 1594562 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 591971165 [0x2348c35d])
UVM_INFO @ 1594562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 55037772626126082784818248822661342036148449297933089501811633212979230817831 1249
UVM_ERROR @ 5730041432 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2978770317 [0xb18c6d8d] vs 3530544185 [0xd26fd439])
UVM_INFO @ 5730041432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 112800382136050195473590079307190055246495247371001594927825597804749432362472 78
UVM_ERROR @ 285199250 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3288044868 [0xc3fb9544])
UVM_INFO @ 285199250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 20980137692314284567920442041695966574315484533117834066501775964223395433456 1225
UVM_ERROR @ 6804632802 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1480735194 [0x584239da])
UVM_INFO @ 6804632802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 63369379660886579605841545058751256299059459293863999089815459051323038240812 75
UVM_ERROR @ 5905219 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3061608510 [0xb67c703e])
UVM_INFO @ 5905219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 24025627335708205848879717874555871660959244778991465735464526350967686831525 554
UVM_ERROR @ 1809072097 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3596210625 [0xd659d1c1] vs 1924432586 [0x72b482ca])
UVM_INFO @ 1809072097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 58533772820254346101515738103703471695767190050026638752734848260898948387415 146
UVM_ERROR @ 192892707 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4170208504 [0xf89054f8])
UVM_INFO @ 192892707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 21723291677879983912485639425657943623262861215148096812198684186597276102097 2965
UVM_ERROR @ 5566690957 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2736547728 [0xa31c6790] vs 1773879964 [0x69bb429c])
UVM_INFO @ 5566690957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 110848720251833315800844618379736770950017271329667766372623480232552238036217 86
UVM_ERROR @ 809123720 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1336062929 [0x4fa2b3d1] vs 4141672339 [0xf6dce793])
UVM_INFO @ 809123720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 10645433602978380982282164784947933039589469657567824058706377552117345168195 888
UVM_ERROR @ 2508857337 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3761079839 [0xe02d861f])
UVM_INFO @ 2508857337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 67924578417331019842331940183945730865947774999257594950424319354413556516350 80
UVM_FATAL @ 618214141 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 618214141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 67438049226749704915939778211565474421927488958819214427958527546986040295301 80
UVM_FATAL @ 18701258 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 18701258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27814175395586398859935201004669062992030176195488079770466174411214159662398 81
UVM_FATAL @ 264177467 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 264177467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16154659462476640442841447813584557325365914920542737318203951096818603881218 131
UVM_FATAL @ 626533964 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 626533964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79787402559621582028008679145893728830396039114066269755797753055446987089857 404
UVM_FATAL @ 760059553 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 760059553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101647359367592542977671633480367203541792455421152877413796665667822950418017 80
UVM_FATAL @ 1047279 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1047279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 20207362752134612225228824324985960871614039444082307255972708058628506658149 80
UVM_FATAL @ 4463321 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4463321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 56813411231255597850819511593903916328115921791667912795802003251049561760843 348
UVM_FATAL @ 2041533496 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2041533496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 36422072120350405561458515024184115375430902315416546119378766571128714631591 80
UVM_FATAL @ 20224155 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 20224155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 74945633978252993088354287370660526196349402454324118106045367274190861243251 80
UVM_FATAL @ 9800327 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 9800327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79531368166457886297265518320961419957651438409253210246846689852992071731745 82
UVM_FATAL @ 254481528 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 254481528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21716023755067209005697787092196244833272881515263053799340911717993541835141 180
UVM_FATAL @ 1424168246 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1424168246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 26462483341539990023887846749698262105735356632300647349122180469174183494245 85
UVM_FATAL @ 387335975 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 387335975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 19822919484540368201342016342080959343221145804782215539067607524857102193068 80
UVM_FATAL @ 4230044 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4230044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 25527511426476483498658743514011729855871364392217654349435799492137214294485 115
UVM_FATAL @ 290645667 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 290645667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69893404446476218226108122490604864685796631595729120982308362372741070748517 167
UVM_FATAL @ 756606014 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 756606014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 107797298861964709246344259909954926040432238323248311231870538627916175250033 605
UVM_FATAL @ 2778081257 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2778081257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 59718041885906852357194765052360770597168445271830850282600226191024270880219 80
UVM_FATAL @ 157915479 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 157915479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 49315814050020947484373594409403362053156337479415811017298254758372220603635 85
UVM_FATAL @ 12030339 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 12030339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23403788895261284890817618874295897735513250778279244953240107564930515266172 80
UVM_FATAL @ 13569222 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 13569222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21516130051852569999752241113683855012209191979802602349974805449665737462344 80
UVM_FATAL @ 2452177 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2452177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 753927251917057201925938466493165189704378804553914378011954311367027660301 308
UVM_FATAL @ 635799421 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 635799421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112770744964767428273179673187513919663185185380688262602728144194187192238701 185
UVM_FATAL @ 2416620102 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2416620102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 109765432738287357731441575227164715996130562742035669754740570002549663716401 80
UVM_FATAL @ 160475472 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 160475472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 67221372717705481684234844090595785228564220394029173858790355965839759984774 80
UVM_FATAL @ 17611173 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 17611173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 83190267315488213996580649468242138555906363134658421947417510950259568347701 81
UVM_FATAL @ 237740624 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 237740624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -*
gpio_stress_all_with_rand_reset 11205884085966804762938822092135647975116069608468376151485629937205475196542 79
UVM_FATAL @ 260954813 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 260954813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 72204328569941171615303293762353110446893599563693306241633387354317539869649 80
UVM_FATAL @ 189921932 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 189921932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 7822065104874581710431179027031128094026885486032432496844035836040965692728 81
UVM_FATAL @ 941533041 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 941533041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 17774487119085785407810069563273402879449920174175958619054650030578862027476 78
UVM_FATAL @ 9751996 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 9751996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82531381449584380692639556654574031923786176443856054526585166809245228892981 330
UVM_FATAL @ 1924301921 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1924301921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 80535166142261609738096522286091242159483803748073850243875207384041404337441 78
UVM_FATAL @ 7830104 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 7830104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 56161124082222346972807342494169198530408078149614116731089047219239279273665 344
UVM_FATAL @ 651498341 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 651498341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104385848960497285048150073095539281161490599787988811326137521471271672169896 78
UVM_FATAL @ 6536763 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 6536763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69132160174510429772649271429076574480437348196364067115279520636761322126052 292
UVM_FATAL @ 634837784 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 634837784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 39858143235633494500652158991226757040479758351630964574217252570521979142922 274
UVM_FATAL @ 470111643 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 470111643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 109310473429714981172210850850948056614419092322956683936644854947279158874394 79
UVM_FATAL @ 4859221905 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 4859221905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 85912537393082578462699457137367503207219614415725228786476701833362148681612 78
UVM_FATAL @ 3107965 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3107965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 93433848717753202643464587319023739816264411893708132112900249920447808803357 78
UVM_FATAL @ 6520398 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 6520398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69135737387619791819141348063856481739985604055665100050348997756751486972283 78
UVM_FATAL @ 49625898 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 49625898 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 46261090351767419024653043190298158211730363330446536092670228681540215260161 78
UVM_FATAL @ 5072479 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 5072479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40496433011877597413154826851247542432494033191798992717375973901540792601045 78
UVM_FATAL @ 3944833 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3944833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 78309946767775772873245094187001708787176510275836455900122441165497025758844 78
UVM_FATAL @ 2121294 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2121294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 29842117334959763657134249247354252480171871512247090318043739940789865662575 300
UVM_FATAL @ 98914195 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 98914195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69791194558104648772973194089905650606460931762863742623543149706065840077945 80
UVM_FATAL @ 305470078 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 305470078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 109609108385137240604605640948897497178253331147119568539293870075052271419796 78
UVM_FATAL @ 2111291371 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2111291371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 64901778537603772755145146591441628490453635786482857974472032172787924076629 360
UVM_FATAL @ 3027122763 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3027122763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4040179305237299777584109986993385656686344330111588741309593562329441958217 78
UVM_FATAL @ 9749684 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 9749684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 9505033851594680689843421306119738506897915431565142727652952136551681598464 79
UVM_FATAL @ 269721175 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 269721175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 92898635249614508299482452814185369064867421932891395000755049907397301658542 282
UVM_FATAL @ 519235413 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 519235413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:649) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 85543385012627578229207398907020013897957708636947217229955884614560798429396 77
UVM_ERROR @ 139827972 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x585c3768 read out mismatch
UVM_INFO @ 139827972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 83396593544618685618501114230514517628306947267739161701429307040382115247283 77
UVM_ERROR @ 139184077 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (2 [0x2] vs 0 [0x0]) addr 0x9c787078 read out mismatch
UVM_INFO @ 139184077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 19120288045726225515776624602243618318818647250545620754326525053371738524898 78
UVM_ERROR @ 282888543 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (8162820 [0x7c8e04] vs 8162821 [0x7c8e05]) addr 0x5020a848 read out mismatch
UVM_INFO @ 282888543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 4425520182876597828684861869603549631936740536505973874265927330648714710700 78
UVM_ERROR @ 161643851 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0xacc0d568 read out mismatch
UVM_INFO @ 161643851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 53366053675103378825219848469838923623480420015556534208112638901197215437422 76
UVM_ERROR @ 36616717 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (2 [0x2] vs 0 [0x0]) addr 0xdd42db7c read out mismatch
UVM_INFO @ 36616717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 4385868425275544274792535683257174216558417368178326132854783194253558220424 77
UVM_ERROR @ 133484587 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x2e759c84 read out mismatch
UVM_INFO @ 133484587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_* reset value: *
gpio_csr_rw 34012302584603598476338132481453009506289368740511006509979566367071544935759 77
UVM_ERROR @ 18875652 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (5 [0x5] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_0 reset value: 0x0
UVM_INFO @ 18875652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_* reset value: *
gpio_tl_intg_err 78818217179530997910655832408727026087279867180886686570652880019151973890897 204
UVM_ERROR @ 321769821 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (9286148 [0x8db204] vs 9286149 [0x8db205]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_7 reset value: 0x4
UVM_INFO @ 321769821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---