Simulation Results: otp_ctrl

 
03/04/2026 17:01:04 DVSim: v1.16.0 sha: 3ba6465 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.41 %
  • code
  • 80.84 %
  • assert
  • 94.41 %
  • func
  • 83.99 %
  • line
  • 88.66 %
  • branch
  • 86.08 %
  • cond
  • 87.11 %
  • toggle
  • 89.42 %
  • FSM
  • 52.93 %
Validation stages
V1
87.94%
V2
68.28%
V2S
80.54%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.660s 0.000us 1 1 100.00
smoke 40 50 80.00
otp_ctrl_smoke 18.130s 0.000us 40 50 80.00
csr_hw_reset 5 5 100.00
otp_ctrl_csr_hw_reset 3.490s 0.000us 5 5 100.00
csr_rw 20 20 100.00
otp_ctrl_csr_rw 2.820s 0.000us 20 20 100.00
csr_bit_bash 5 5 100.00
otp_ctrl_csr_bit_bash 10.250s 0.000us 5 5 100.00
csr_aliasing 5 5 100.00
otp_ctrl_csr_aliasing 10.240s 0.000us 5 5 100.00
csr_mem_rw_with_rand_reset 13 20 65.00
otp_ctrl_csr_mem_rw_with_rand_reset 4.300s 0.000us 13 20 65.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
otp_ctrl_csr_rw 2.820s 0.000us 20 20 100.00
otp_ctrl_csr_aliasing 10.240s 0.000us 5 5 100.00
mem_walk 5 5 100.00
otp_ctrl_mem_walk 2.100s 0.000us 5 5 100.00
mem_partial_access 5 5 100.00
otp_ctrl_mem_partial_access 2.120s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 0 1 0.00
otp_ctrl_partition_walk 126.400s 0.000us 0 1 0.00
init_fail 194 300 64.67
otp_ctrl_init_fail 8.740s 0.000us 194 300 64.67
partition_check 17 60 28.33
otp_ctrl_background_chks 17.040s 0.000us 2 10 20.00
otp_ctrl_check_fail 54.730s 0.000us 15 50 30.00
regwen_during_otp_init 32 50 64.00
otp_ctrl_regwen 13.700s 0.000us 32 50 64.00
partition_lock 18 50 36.00
otp_ctrl_dai_lock 74.150s 0.000us 18 50 36.00
interface_key_check 20 50 40.00
otp_ctrl_parallel_key_req 35.900s 0.000us 20 50 40.00
lc_interactions 216 250 86.40
otp_ctrl_parallel_lc_req 24.830s 0.000us 34 50 68.00
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
otp_dai_errors 46 50 92.00
otp_ctrl_dai_errs 80.630s 0.000us 46 50 92.00
otp_macro_errors 19 50 38.00
otp_ctrl_macro_errs 53.420s 0.000us 19 50 38.00
test_access 14 50 28.00
otp_ctrl_test_access 35.730s 0.000us 14 50 28.00
stress_all 4 50 8.00
otp_ctrl_stress_all 201.810s 0.000us 4 50 8.00
intr_test 50 50 100.00
otp_ctrl_intr_test 2.280s 0.000us 50 50 100.00
alert_test 50 50 100.00
otp_ctrl_alert_test 4.510s 0.000us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
otp_ctrl_tl_errors 8.370s 0.000us 20 20 100.00
tl_d_illegal_access 20 20 100.00
otp_ctrl_tl_errors 8.370s 0.000us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
otp_ctrl_csr_hw_reset 3.490s 0.000us 5 5 100.00
otp_ctrl_csr_rw 2.820s 0.000us 20 20 100.00
otp_ctrl_csr_aliasing 10.240s 0.000us 5 5 100.00
otp_ctrl_same_csr_outstanding 4.620s 0.000us 20 20 100.00
tl_d_partial_access 50 50 100.00
otp_ctrl_csr_hw_reset 3.490s 0.000us 5 5 100.00
otp_ctrl_csr_rw 2.820s 0.000us 20 20 100.00
otp_ctrl_csr_aliasing 10.240s 0.000us 5 5 100.00
otp_ctrl_same_csr_outstanding 4.620s 0.000us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
tl_intg_err 24 25 96.00
otp_ctrl_tl_intg_err 31.540s 0.000us 19 20 95.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
prim_count_check 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
prim_fsm_check 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_bus_integrity 19 20 95.00
otp_ctrl_tl_intg_err 31.540s 0.000us 19 20 95.00
sec_cm_secret_mem_scramble 40 50 80.00
otp_ctrl_smoke 18.130s 0.000us 40 50 80.00
sec_cm_part_mem_digest 40 50 80.00
otp_ctrl_smoke 18.130s 0.000us 40 50 80.00
sec_cm_dai_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_kdi_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_lci_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_part_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_scrmbl_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_timer_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_dai_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_kdi_seed_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_kdi_entropy_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_lci_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_part_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_scrmbl_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_timer_integ_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_timer_cnsty_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_timer_lfsr_redun 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_dai_fsm_local_esc 187 205 91.22
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_lci_fsm_local_esc 182 200 91.00
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
sec_cm_kdi_fsm_local_esc 182 200 91.00
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
sec_cm_part_fsm_local_esc 201 250 80.40
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
otp_ctrl_macro_errs 53.420s 0.000us 19 50 38.00
sec_cm_scrmbl_fsm_local_esc 182 200 91.00
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
sec_cm_timer_fsm_local_esc 187 205 91.22
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_dai_fsm_global_esc 187 205 91.22
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_lci_fsm_global_esc 182 200 91.00
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
sec_cm_kdi_fsm_global_esc 182 200 91.00
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
sec_cm_part_fsm_global_esc 201 250 80.40
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
otp_ctrl_macro_errs 53.420s 0.000us 19 50 38.00
sec_cm_scrmbl_fsm_global_esc 182 200 91.00
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
sec_cm_timer_fsm_global_esc 187 205 91.22
otp_ctrl_parallel_lc_esc 39.870s 0.000us 182 200 91.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_part_data_reg_integrity 194 300 64.67
otp_ctrl_init_fail 8.740s 0.000us 194 300 64.67
sec_cm_part_data_reg_bkgn_chk 15 50 30.00
otp_ctrl_check_fail 54.730s 0.000us 15 50 30.00
sec_cm_part_mem_regren 18 50 36.00
otp_ctrl_dai_lock 74.150s 0.000us 18 50 36.00
sec_cm_part_mem_sw_unreadable 18 50 36.00
otp_ctrl_dai_lock 74.150s 0.000us 18 50 36.00
sec_cm_part_mem_sw_unwritable 18 50 36.00
otp_ctrl_dai_lock 74.150s 0.000us 18 50 36.00
sec_cm_lc_part_mem_sw_noaccess 18 50 36.00
otp_ctrl_dai_lock 74.150s 0.000us 18 50 36.00
sec_cm_access_ctrl_mubi 18 50 36.00
otp_ctrl_dai_lock 74.150s 0.000us 18 50 36.00
sec_cm_token_valid_ctrl_mubi 40 50 80.00
otp_ctrl_smoke 18.130s 0.000us 40 50 80.00
sec_cm_lc_ctrl_intersig_mubi 18 50 36.00
otp_ctrl_dai_lock 74.150s 0.000us 18 50 36.00
sec_cm_test_bus_lc_gated 40 50 80.00
otp_ctrl_smoke 18.130s 0.000us 40 50 80.00
sec_cm_test_tl_lc_gate_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 333.990s 0.000us 5 5 100.00
sec_cm_direct_access_config_regwen 32 50 64.00
otp_ctrl_regwen 13.700s 0.000us 32 50 64.00
sec_cm_check_trigger_config_regwen 40 50 80.00
otp_ctrl_smoke 18.130s 0.000us 40 50 80.00
sec_cm_check_config_regwen 40 50 80.00
otp_ctrl_smoke 18.130s 0.000us 40 50 80.00
sec_cm_macro_mem_integrity 19 50 38.00
otp_ctrl_macro_errs 53.420s 0.000us 19 50 38.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 0 1 0.00
otp_ctrl_low_freq_read 65.630s 0.000us 0 1 0.00
stress_all_with_rand_reset 0 100 0.00
otp_ctrl_stress_all_with_rand_reset 30.410s 0.000us 0 100 0.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *
otp_ctrl_csr_mem_rw_with_rand_reset 68673521338041945669002983673911530424714141896082467030299471634863721511352 97
UVM_ERROR @ 269444429 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 269444429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 111358023125933141612934300081803978154690127773657183504902212539826250766887 91
UVM_ERROR @ 31898464 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31898464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 113154729038465810204194583763629619931760010978135689786440730769468924985508 91
UVM_ERROR @ 62230863 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62230863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 75855111897921254362700543681232836507765173725383923040731541477473840029284 91
UVM_ERROR @ 32474384 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32474384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 56151141662549921331149788967671041063965457697149505320073910885780715957994 91
UVM_ERROR @ 32731490 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32731490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 48302621727605400174078507651174269341113179026917463375612430803761516324343 91
UVM_ERROR @ 120324302 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120324302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 34230771462284376393486885640853484791966386627608083210037610086879710802235 97
UVM_ERROR @ 76206877 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 76206877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 31966076513048439343741856771017988926684368488588287839645232637357198746662 91
UVM_ERROR @ 30494004 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30494004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2484976585417371392318572282313177928666215043672470326682940875194999422166 92
UVM_ERROR @ 499740900 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 499740900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 82013790995824855229130624561777819779265061553450109522999934727355250608905 92
UVM_ERROR @ 500837493 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 500837493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49548468545775492070198530007895854255348406462528399598364154709535967851517 92
UVM_ERROR @ 503672726 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 503672726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 58351251068373185532053189638160355007580455155817322098596411660318417734071 94
UVM_ERROR @ 32499574 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32499574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90961051171142647304197432816784745967179276225687236400568216064011837923540 98
UVM_ERROR @ 124585917 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 124585917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 80665421577617927009101960495027513894432939005939654522441897341073882928170 91
UVM_ERROR @ 497166237 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 497166237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 10880992218496389146486499112192438735858312062076511772292134715050670368643 91
UVM_ERROR @ 71246139 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 71246139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 85511000174338936489286436437803730658210993246275625549842504416229865086127 92
UVM_ERROR @ 49097690 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 49097690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 111257976806445602641831226286555846126718417402983913579907006655668012039458 92
UVM_ERROR @ 126098856 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126098856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 54540722082050379928611914747180099188276528601822674359599494548332887609790 91
UVM_ERROR @ 105194574 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 105194574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90320709703663380014319674837765207166147235859164064665772541267000587516443 96
UVM_ERROR @ 128676480 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 128676480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 62158848015217894208925847244852498414055816358252671614008810837613089648867 207
UVM_ERROR @ 1603692173 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1603692173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73001549741624698585451945566392708847819162210609790763013845904119043819284 4692
UVM_ERROR @ 8275688253 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 8275688253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 93804429962823138554725303232350735321894690060741844293371492593741865509991 93
UVM_ERROR @ 45799344 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 45799344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 92414770772400320854864091782421826504607250401099807647114798032298672699830 94
UVM_ERROR @ 32450020 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32450020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 18154738364148586320749248273669284824057098716327592391466312365855083338717 92
UVM_ERROR @ 74824934 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 74824934 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 61002555005188420934882122339321101529337480958976117663716779937921210120061 92
UVM_ERROR @ 93420780 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 93420780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 4874661264746275247258766800967258773595395143458075495098217385939294776864 238
UVM_ERROR @ 74308532 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 74308532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 39471861844699009178857846018510213005593291483098278983098826314264997717814 100
UVM_ERROR @ 527688089 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 527688089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 69928082661705765127243442668566791949097453145296898302840306670953597539707 245
UVM_ERROR @ 2119814060 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 2119814060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 61820626068716476184054298355842052140634547241482530323705602094124110210509 94
UVM_ERROR @ 127408985 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 127408985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 80005186175997366750224184169756042481398851451359825806865859352198483086799 95
UVM_ERROR @ 48664476 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 48664476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 41077233844687415985437590474954102420307616590418278264710303587458006024493 91
UVM_ERROR @ 512571767 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 512571767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 27868738782756899948531657758715614339595727495731078106849967979069898248936 96
UVM_ERROR @ 33974460 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33974460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 61252325465695523011577339008518146317833547492015379257842254481678846879118 94
UVM_ERROR @ 111836215 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 111836215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 3706971753706693147587054202628512109801859816772808777967680354777205346517 96
UVM_ERROR @ 34416631 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34416631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 6929498844233845591382993867912417954018980129129588771073679417431156874042 159
UVM_ERROR @ 275138305 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 275138305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 31879529456820384610486779895505188572353810516792001743486154932380894184653 94
UVM_ERROR @ 31605640 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31605640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 58263642553983568970828844648451410254986002669200561733014467266618197205067 94
UVM_ERROR @ 34612712 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34612712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 33216412679856672998636711767958734425581723891010181775362636382940430798386 91
UVM_ERROR @ 120230475 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120230475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 97313108578572753855755742072579097363188975803576229285953117538052700428694 100
UVM_ERROR @ 504437027 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 504437027 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 14120192953044133162346513152928471757996564663027454850666233864273832001044 94
UVM_ERROR @ 62601699 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62601699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 83078585654579425002333247471272369376936042805890952184394986061411764270193 98
UVM_ERROR @ 32526603 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32526603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 9704495078024787584560000822220779142920902594307736024401474610123198254878 100
UVM_ERROR @ 511951950 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 511951950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 62752193651267650434963792028454219186739151928018032895309328607781414407359 96
UVM_ERROR @ 504646377 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 504646377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 59365048331571175883037139613783718524106918168487047845472233840567753390329 96
UVM_ERROR @ 34941315 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34941315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 85565488217265983707961274806908991478076697947710652392847353813492365671762 91
UVM_ERROR @ 63596943 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63596943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 110353617654779598334562581900647062484689057983646803681348472216701217107293 92
UVM_ERROR @ 41943142 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 41943142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 23439914035026972459673413952508421127566447313872687224249400209453500358107 96
UVM_ERROR @ 63093410 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63093410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 8822081914637981036668020936703484031922491137403638072602943720246229657569 91
UVM_ERROR @ 508218929 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 508218929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 3227780311914798456145916023677840547193571194746764782691194439943875018813 91
UVM_ERROR @ 500947633 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 500947633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 105360616813847186808777243762749543361872230731518399849512337359040287494538 92
UVM_ERROR @ 60066657 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 60066657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 58827804634232409243577734999000965177878431128692657309020683280506772619802 91
UVM_ERROR @ 124549276 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 124549276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 61988636992959454302930500620430601043901471306100134948033768368316555333963 101
UVM_ERROR @ 63153497 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63153497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 89193823441092703316946378774203023413814221166793363204904839500395638909124 101
UVM_ERROR @ 121745090 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121745090 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 62862599095941301013393126837426725256591329922544955538092820852024378122125 251
UVM_ERROR @ 13138519060 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 13138519060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 33820289949461010128117461432610221222232954726122026075771249281554193814000 94
UVM_ERROR @ 126203243 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126203243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 29904336986833301619253553276750948512604280564131491178936076599386757214133 221
UVM_ERROR @ 793575401 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 793575401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 28212592810768139031626021158180534715197162966620388672543643663242449437183 4487
UVM_ERROR @ 580346146 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 580346146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55650262918524736186515415737432026995747659260483542547207597586715632805897 98
UVM_ERROR @ 76817638 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 76817638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 47835945960921327904939171013398483409980001697003673526651452549383769627685 92
UVM_ERROR @ 505305208 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 505305208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2757682830143619649555257245029062009209843188636850729310618897267628774454 94
UVM_ERROR @ 33106755 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33106755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 36476025622716407659025453280706079975752802604996997129947057392176483761401 200
UVM_ERROR @ 299169707 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 299169707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 52108764179376198688752374938147907571896922535334331025924771139279231428432 105
UVM_ERROR @ 66542248 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 66542248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 46759921535292405564408253578302579670910939447247371344821846209011663306556 100
UVM_ERROR @ 41472418 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 41472418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63830478186854185720178397301474810625555344417550222224471561024466566133251 91
UVM_ERROR @ 31658436 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31658436 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65956292100019393339116977891405451040564263529311377114703084664608154374906 92
UVM_ERROR @ 125235701 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125235701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 13471482647172462624948112729840063166495976757438170495353200657638865051477 92
UVM_ERROR @ 60881246 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 60881246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 97532487324447853016881149652870459056996739880115972769180242989698853294622 91
UVM_ERROR @ 43614337 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 43614337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 91522487178827997094728716496334959640943240472926911342543472453363114039005 232
UVM_ERROR @ 1152111068 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1152111068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 44893622767882977871647267628350655484364765671748775886385826119347543646049 91
UVM_ERROR @ 32693774 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32693774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 42463530499124073077751106740301017053841147502740660956416920394774342835703 92
UVM_ERROR @ 39816992 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 39816992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 94333925101841764077447508454897404878828918001174503024592971399851632278328 92
UVM_ERROR @ 32053917 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32053917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 11287928617171927761581949177724724739292257743661894920569786974602109191508 91
UVM_ERROR @ 35934204 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 35934204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 71870722394406698012731584050460653669233155838971377409962468384526414505451 98
UVM_ERROR @ 64579435 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 64579435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 40794019613242345065308518163249006452651671897836660997004498314447856441379 91
UVM_ERROR @ 75436245 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 75436245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 93730788403746686904160577852772511825612074405724736437039668607006997177026 109
UVM_ERROR @ 133356414 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 133356414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49519369681411451762238293685394277040854479403622041506439163775750328372259 102
UVM_ERROR @ 46261548 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 46261548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 78487658671873242728482813983649493536909582738173708082662044579827669427099 96
UVM_ERROR @ 127938585 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 127938585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 107161266741180232009361198606421775351152678296339463737567574900476249132859 96
UVM_ERROR @ 30599410 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30599410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7636549033065555393330054522137699669817830096356533344784529169773106648753 96
UVM_ERROR @ 30273125 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30273125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 23816641006502962657919899325252721290511342948112988477597060587947209101501 103
UVM_ERROR @ 128074377 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 128074377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 113250082598262240099394612849907134847269909299236565911586034711922748053383 94
UVM_ERROR @ 120046643 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120046643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 45791706191570292058702375604790230282319167883137242106739543580131727851790 92
UVM_ERROR @ 31107418 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31107418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 35207571396182695177645794431410870908474094851796711629674581459455405241599 91
UVM_ERROR @ 62526159 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62526159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 60305705364753311988644940799416036160424566434144336369906793468994743070145 96
UVM_ERROR @ 33541719 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33541719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 3864728811439139310698292525438939881312062071043659744459066074293162903374 91
UVM_ERROR @ 64386078 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 64386078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63089861467810534850789666229999693958881311792056654816725833435146517700582 157
UVM_ERROR @ 69029899 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 69029899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 4205197887155732091023813630658637766550666260943903892432155369718142291787 94
UVM_ERROR @ 106900609 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 106900609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 44180127768601078962753785254926028729169678653643975275692175691872826266291 94
UVM_ERROR @ 36734602 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 36734602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 18640600058330417586120022966048414074356125772929139082692772732680910295278 11200
UVM_ERROR @ 473773376 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 473773376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 31860596690690576195299968195296482520151931219117043538764032981123764348503 92
UVM_ERROR @ 42799608 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 42799608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 94080766336615970656322661078569976780211573904322128766923831569607615574013 92
UVM_ERROR @ 40724800 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 40724800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 24341839035433567898634690173587587258725711769207452132779646805992788648508 91
UVM_ERROR @ 502049329 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 502049329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65001965614242815541925920023134932103132514095968501398764868727367826513160 92
UVM_ERROR @ 32137197 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32137197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 95921514040188642308818683334188713601270196447863142102132770984249181053654 91
UVM_ERROR @ 110667991 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 110667991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 52643348574702088176587382208038418759859221129884154530319843028539632326083 94
UVM_ERROR @ 31327273 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31327273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 62597879816925545838145010566231274147780448649970996682398694445933663949506 92
UVM_ERROR @ 120959391 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120959391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 27597663257130069804711376089468637404410357083441489495452830240577227855169 96
UVM_ERROR @ 506613136 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 506613136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 62386220748625938511428369975891328143558431773698354010160621786412339532824 91
UVM_ERROR @ 63595164 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63595164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 10898049858882898441035720856209706798744702964700900983308963459121211873085 92
UVM_ERROR @ 31527713 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31527713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 98458787417611606459597745891280641557739102865468188977547246964020410558000 91
UVM_ERROR @ 39477900 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 39477900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 98364058382547088288496909123145483794126111910136550220295674363328553700857 91
UVM_ERROR @ 61498709 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61498709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 32902220246756235370794796584314516597088349672569532600089855681470252293187 1078
UVM_ERROR @ 79766962 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 79766962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [otp_ctrl_common_vseq] expect alert:fatal_prim_otp_alert to fire
otp_ctrl_tl_intg_err 39989879215503574527833436573848428419543856351108011649194303833867509143529 385
UVM_ERROR @ 1704773792 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] expect alert:fatal_prim_otp_alert to fire
UVM_INFO @ 1704773792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: *
otp_ctrl_smoke 3278730960177411089887273385430486321414304614580278374846642327783526479329 5672
UVM_ERROR @ 677871235 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 677871235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 14074653166229575810553959831142213916879477108998248396809877944459126647247 606
UVM_ERROR @ 160622388 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 160622388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 54161037393116135936167185452589249140954749164358937826015610918355874261295 2540
UVM_ERROR @ 153903410 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 153903410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 109299464428787131027559551783057688710258556465304240008897801078882487887301 4302
UVM_ERROR @ 2969421055 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 2969421055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 57879250841911061288206524057774359726065911226927923600725979214414001407783 695
UVM_ERROR @ 975039009 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 975039009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103129285763421085320250829543054898915853283583080163369110184344189807515701 801
UVM_ERROR @ 41924493 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 41924493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 23079133437041145205185130760734016942869431416659527775436431934652641111449 2404
UVM_ERROR @ 255318523 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 255318523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 79634415135268205094333596842643189081007800584149972360428820227182867192719 633
UVM_ERROR @ 963395188 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 963395188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 73207037668125298073535746894714924807522166377532875827445334847780941429287 5040
UVM_ERROR @ 97621949 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 97621949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30109392069537458696696311984244618569029801046470348056219242678228982943090 593
UVM_ERROR @ 75781374 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 75781374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103928759965913284520891386763315544738035537681368773638411886550194959878391 183
UVM_ERROR @ 43259289 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 43259289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 98227905546009216436617906992014396998935671526324681212474724556162977105588 3346
UVM_ERROR @ 1080664693 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1080664693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 58912567061420188089158615359792989523063231291823018303904259258994594673560 257
UVM_ERROR @ 36904055 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 36904055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 70215579890579465034943245327915698322380198612425498541848659205029330039374 1027
UVM_ERROR @ 990763577 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 990763577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 49589667378236437427379668420024876028986077773508047657895781362267824674524 225
UVM_ERROR @ 131220773 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 131220773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 48517921390121116557278800965987138825526106978548756294452003453829674591616 1582
UVM_ERROR @ 130714984 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 130714984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 53506169968522542052955052612492223577263225647744199475843303012909926063725 2880
UVM_ERROR @ 68205370 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 68205370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 98711590627624868502424756246704418112732983072559797709010701471343211178898 3028
UVM_ERROR @ 209989178 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 209989178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 100776242532955849935287170627071059124240485527312894035277405282744407658355 1924
UVM_ERROR @ 158663128 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 158663128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 40695348283008634681940095934796386459296450515623265421588261461726859443700 2498
UVM_ERROR @ 348304258 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 348304258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 102024429490531189293336736520390741089934227841430212120537905535501584703411 1199
UVM_ERROR @ 104233124 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 104233124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 87406618135495457837520354335105388516847619522074433120996651492689504322788 4782
UVM_ERROR @ 201618030 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 201618030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 78064719222718448442577953479333393403762043822455620299909137439224901712103 99
UVM_ERROR @ 52518941 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 52518941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 89313573479999684293259658872028161098228543168377460484018592070576122764732 401
UVM_ERROR @ 34516066 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 34516066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 9612133114214793327271958623510629211273692305268068724444058558157078652323 1148
UVM_ERROR @ 75539499 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 75539499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 46002260673645927298888695838939660319585027296265899092196019544156742998550 4542
UVM_ERROR @ 3006932213 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 3006932213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35734551942215421200143605717229965055703510020102775087992384794628729936403 429
UVM_ERROR @ 160894843 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 160894843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 44396249190633724633520971314225631982269082223345654282052153125974062490413 3574
UVM_ERROR @ 305016499 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 305016499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 27359190535475965544543129118463031229042726452453284309438018439909754703268 3384
UVM_ERROR @ 232279111 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 232279111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 107667645722795121470568984600841125184687663587387093730851104594139526860151 1019
UVM_ERROR @ 150561052 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 150561052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 76008150960199505555462953051183435223477589498333131677066819501158268276761 2662
UVM_ERROR @ 153145483 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 153145483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63199614500543236085430961453157542005717205865481701270312168650578152057402 241
UVM_ERROR @ 49681366 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 49681366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 22011922169021033374393233318596052858214194661080278499618707637742025076700 2954
UVM_ERROR @ 169425409 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 169425409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94827641028916552671777965821620439520621752472247330178662746707585724987620 287
UVM_ERROR @ 69003716 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 69003716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 131479873973213546324103637249171862711179763824412160939044107042960875881 1954
UVM_ERROR @ 141241153 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 141241153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 75553370996682550910461365016606484566101613156386420649217416253989428997047 2112
UVM_ERROR @ 135100023 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 135100023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 33571431405639311197823359914642497080977003003664684172983071754807470617574 2307
UVM_ERROR @ 1015831411 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1015831411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 60071622793449641730932541183598667161247136519086509278425953004837880325236 2008
UVM_ERROR @ 979416963 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 979416963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 90496298108024648347022730552817625248138201361205126064912988425908498072602 908
UVM_ERROR @ 749451818 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 749451818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 68074529957091750791050016035016833963389732055514396057322953789229133058954 1698
UVM_ERROR @ 211889294 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 211889294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 107006627235617565977438980241880048581548319505803692363851267044708984666162 1532
UVM_ERROR @ 61636216 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 61636216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 13769124721496870937599951276331407019856909346433057164202478796841506830360 7840
UVM_ERROR @ 3897262144 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 3897262144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 111679066005415698114123572317859495665752947661490468193009907378652195860232 1672
UVM_ERROR @ 73759282 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 73759282 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 106870342329086899323459345006140774220739381212146657668082508168257947284124 3264
UVM_ERROR @ 209470286 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 209470286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 70181469743621828477824175475850819109663503762991622010033822056766466074417 549
UVM_ERROR @ 151546650 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 151546650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 36159257020694281954504692226168208890487069158267804146435561711043962826069 349
UVM_ERROR @ 192154586 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 192154586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 37001003756721290215660471494363818430512638153694742568203779852600580140296 233
UVM_ERROR @ 37063097 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 37063097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112043276447364098499681512578266662469768645225135875032727857638155244296655 141
UVM_ERROR @ 166499151 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 166499151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 9670883300260180385304013385816289633974470091807439785594358788739085273333 985
UVM_ERROR @ 191301168 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 191301168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 49625586805977136993387638216206535243678748367651662870198485741824306305313 187
UVM_ERROR @ 33544341 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 33544341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 54673685082570128114775782151404137255681549050805999373317704918353919502479 313
UVM_ERROR @ 201366068 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 201366068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 91873865355257549283819889923199880010751971620631358857587117799968747765732 355
UVM_ERROR @ 44981711 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 44981711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 83513016205851523383443531378658326807864578601321722554258101996194835449000 229
UVM_ERROR @ 109284762 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 109284762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 28551333581042935786645735559101878562877331880140422966422831891701143065374 563
UVM_ERROR @ 36613271 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 36613271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 84485715279916019802748500643594913086350957831360803999305296808344293083810 1313
UVM_ERROR @ 205727270 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 205727270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100358591643351015543010824781894662578426229706070990502477589204172243827203 475
UVM_ERROR @ 73213138 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 73213138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 4288442218240787623738830943532194260621237334816732824039923672186740974451 1991
UVM_ERROR @ 194832161 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 194832161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94939386916940904835720721583054969245996896480654104156064753134606386814202 187
UVM_ERROR @ 49203135 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 49203135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 93601314348686231901462669046879476078438262195139649799737755476069287420427 459
UVM_ERROR @ 38586582 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38586582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 59667434919385411610656627074969120716054190469912268461334735434489258346684 99
UVM_ERROR @ 40548722 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 40548722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 1934719492284433813994364923447363691710614784756915645875035743839651259645 1205
UVM_ERROR @ 242630899 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 242630899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 93052419940485475118951348300390947415776003068397544931048977167404521420542 781
UVM_ERROR @ 125091358 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 125091358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72563532455610353461953650572844386113173855400099092956733705228371273952691 973
UVM_ERROR @ 127255195 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 127255195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 65149444912329948535713856156577068670821549645287032046278418181078495036886 907
UVM_ERROR @ 85778219 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 85778219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24400594060629863590389577667641887655176596575686699476858360009787407148662 887
UVM_ERROR @ 900741749 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 900741749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109808458622822083649795831525366457256155432359640599663910567122621600996451 449
UVM_ERROR @ 39969542 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 39969542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35193422939071163287018126167342052456851130803215302857076658155293699706012 195
UVM_ERROR @ 153520358 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 153520358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 40109332198462891557817921705602447022838753649859483524308782447021396458418 2155
UVM_ERROR @ 83608896 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 83608896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112184298225577946829159433975463695773070545310900137295741766017453064596425 491
UVM_ERROR @ 38778000 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38778000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38711766683372341474697041129124461297547532264316415325015047013233837912951 857
UVM_ERROR @ 51177404 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 51177404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 48224155139185208898243422662355770231028386390619609261745812984104366899704 1163
UVM_ERROR @ 183184443 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 183184443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 18929894817879555272980429564614197582720993381511755096586713450301577042300 769
UVM_ERROR @ 61763224 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 61763224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 64059924174929314198297040130859092060914542265366198098780973055352156604548 1583
UVM_ERROR @ 112082752 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 112082752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61461401059186717065169375076705906386357800243895572536835001698703286561441 841
UVM_ERROR @ 41497217 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 41497217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51031613647298023242576213370372136968856315574914603486268747642894225394301 1461
UVM_ERROR @ 54152022 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 54152022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 28890892263219113589737951654279257752695472940016113698434218550133527628783 985
UVM_ERROR @ 171389498 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 171389498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 36497379808637324651575641134903325142792358450124026775203567945295537391163 187
UVM_ERROR @ 51401786 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 51401786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 8005980398395083164957973606854247194045499812862186550295693271533265556458 329
UVM_ERROR @ 135224600 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 135224600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 84389931673646591679836006990425512882532739657394792707968751740003789060266 1067
UVM_ERROR @ 91484630 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 91484630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104239098816717140511441468809106222234606819765299471276482961655867755886330 2081
UVM_ERROR @ 125878620 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 125878620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72281469683087185453996433234375811147428996868077276455641943707093107408712 1119
UVM_ERROR @ 58476116 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 58476116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 78389104039458218696856123074793762032756939330870228937309545340759985891153 2531
UVM_ERROR @ 132894058 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 132894058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 33243488622147325778756905859639834200064480405787394243711071341782148176299 625
UVM_ERROR @ 43629409 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 43629409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 68510256754619921047653711210615793375571168339621654728505158446873999631700 409
UVM_ERROR @ 70182287 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 70182287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 36945311275962872243287518652773684269321278001804232024254769185550471733550 275
UVM_ERROR @ 33485266 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 33485266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 14890194798583691779491142189581999514969134197778568436736926211429904196434 199
UVM_ERROR @ 91785067 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 91785067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 56857848133612886966143776563356697296622611720249628191429029145614616378597 1273
UVM_ERROR @ 113159478 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 113159478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 16872010447365804344288306941839037799726960592210009914268687312953469623713 497
UVM_ERROR @ 38020882 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38020882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 71867301943916883436801292894162239162339680808543599688872827813482088005077 181
UVM_ERROR @ 536905248 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 536905248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 25373560481629014834124959244073320737310091695251505503046757173407693715799 187
UVM_ERROR @ 184303657 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 184303657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 92177677135540483716009771731817908921995622468085029567911210089515325515846 599
UVM_ERROR @ 55432169 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 55432169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 11902697608800572605263805489274055532021759424099795893820462203710835001009 1667
UVM_ERROR @ 864182110 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 864182110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 9691385777433395302541340905884700760681886004213347499889833359096016394722 229
UVM_ERROR @ 48458020 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 48458020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 23776915006282910300049264526490063728398267824566611306906625519647252435527 757
UVM_ERROR @ 659287119 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 659287119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 44043855603937889339637088342033609280244994779675124031075526023917233875195 1903
UVM_ERROR @ 145374575 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 145374575 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22474739854572938959429807207778635707796532504621958508500933441700286833156 1013
UVM_ERROR @ 110753546 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 110753546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 93073019821045868730757722880682164477712478633328670691826454141036587959706 99
UVM_ERROR @ 62995245 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 62995245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51266105033770801939210564902792938165378780033758569713645000926572071583497 1665
UVM_ERROR @ 128426504 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 128426504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 64096779426908545237773790161342393251275827474423197175364696362081628011381 819
UVM_ERROR @ 77709357 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 77709357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 47482216600538903053605998079733345560399166521976588228426737553887244215854 475
UVM_ERROR @ 225612937 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 225612937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 34010767990790930628069091318384709830299227190033991810479511348766608300251 1865
UVM_ERROR @ 226974031 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 226974031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 98246354138205029834873195465114157951288521028503576607351911137344885814229 1181
UVM_ERROR @ 277791866 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 277791866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 73229863025847739976589918407289722046783340313685819336119180481965536389276 923
UVM_ERROR @ 166692679 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 166692679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 33896011125052846837922851604275926535532140251881894212025839774540316604176 671
UVM_ERROR @ 644150455 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 644150455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 95004652101646004319181096543777926681456222593201872448515779723864388599524 595
UVM_ERROR @ 39242605 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 39242605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 67796507982278007230284959468358890042822782371945359747850382325879217283921 383
UVM_ERROR @ 68941409 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 68941409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 82862720390418457350815051811226731974385386825321270344729282308355140102623 1965
UVM_ERROR @ 173421784 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 173421784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 102276053105649597030520054248879817272994569719141498302945045959915053431049 907
UVM_ERROR @ 44462803 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 44462803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 68628679626562578835340192272823648981792140182056238723806550988834983659586 267
UVM_ERROR @ 35955861 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 35955861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 16334247029965531976774370110622711841186975775663204633797470120090499149717 1417
UVM_ERROR @ 99395383 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 99395383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 8455852527865550072568197561577692660706670661009983706237599717329296914233 641
UVM_ERROR @ 91960521 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 91960521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51035867397816037187541979560095373342392687404844571758148444499395698427831 141
UVM_ERROR @ 147494285 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 147494285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52368045709358219941420228258867437339736156162483471245864596624365183908336 533
UVM_ERROR @ 42861050 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 42861050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 57817774527944541830835589745410406164120332589646775784592640744878520535017 1091
UVM_ERROR @ 112599367 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 112599367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 9326984389811303349751516996392570383114945015422006096598022644199270012550 461
UVM_ERROR @ 41372669 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 41372669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 36121220365637669211333172871706285392604458144015087019917004193930887695105 2077
UVM_ERROR @ 1092542855 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1092542855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 59968879524635222634563608797646945445086211058046219188286006327006870448487 437
UVM_ERROR @ 178154665 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 178154665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 39144499961252490176562477203456519661976269352110575079660422567014716242792 2561
UVM_ERROR @ 1073391187 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1073391187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 77761019242397844529478890371096394563123193552441008833865293034536299075574 2353
UVM_ERROR @ 188645621 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 188645621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63252438391179522146321236938710575927096606327758111101691671823090507669467 281
UVM_ERROR @ 32541423 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 32541423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 48947631167960773975048650272110055555266338160591828358317477072559632268174 183
UVM_ERROR @ 48918088 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 48918088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 82987731717044702350313920348153839848770822212571687893177620921453832051422 2493
UVM_ERROR @ 1335687287 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1335687287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 70118490796210045638729635446704177161318610598290932879112046648983699976979 527
UVM_ERROR @ 52747116 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 52747116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch
otp_ctrl_partition_walk 64325474503379471425522684561599829504559386543957237634502934619958900331770 120795
UVM_ERROR @ 9719561745 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_partition_walk_vseq] Check failed rdata0 == exp_data0 (0 [0x0] vs 16080 [0x3ed0]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 9719561745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch
otp_ctrl_low_freq_read 77509564688778431610690407367996548194734740096163229518237001784534942054065 89
UVM_ERROR @ 21881578685 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 21881578685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 88057239995742522269950126494241031314926273845316400442935896108311111690304 12703
UVM_ERROR @ 48381065848 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 48381065848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 59267840790490288076394632562175430471267533727521845487982756203641043209968 5747
UVM_ERROR @ 60831872927 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 60831872927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 15475297947486026584428719166162020814122621756289189782138954728964697246765 90
UVM_ERROR @ 22185417151 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22185417151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 34355162173850527735399514331830572742825332667133917911126690950084422788094 24607
UVM_ERROR @ 22813570308 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22813570308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 89421257471270286646364126903555279285773620213597511675205829234083785019902 12295
UVM_ERROR @ 61021435992 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 61021435992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 42977702030929971701126450837579187123631230486966720495601909226202649599670 8924
UVM_ERROR @ 47283998536 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 47283998536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 26670109805295797475157845500477472110306140759211929195836736187380072009639 90
UVM_ERROR @ 54377693744 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 54377693744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 49314973813086054438855368625472695858444192338879941877799015454679736660866 23695
UVM_ERROR @ 85553442780 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 85553442780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 68805661935488362174525992668832107919972305791572564402956587499006440761714 90
UVM_ERROR @ 59235503235 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 59235503235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 2905269488983917273607317907478780408176105854386518767499996878073180515973 2616
UVM_ERROR @ 64922496482 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 64922496482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr
otp_ctrl_background_chks 103204567225382976223789262406705202316841260083470526445281021659115063362112 6588
UVM_ERROR @ 760835799 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 760835799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 62959246828463413131541961102216687450731863932118167099858636672856841422477 5909
UVM_ERROR @ 776151555 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 776151555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 11619803115328034513441302671354230331003565280887898212393102142893750775595 12839
UVM_ERROR @ 873688186 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 873688186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 93876684298804073600506941265856434516175670945285237506104239054180451499858 3571
UVM_ERROR @ 957165996 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 957165996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 40558432722359087712421147544112526697390052352407767066475436604412230866611 9764
UVM_ERROR @ 8074283222 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 8074283222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 112044854534729030932784896475665167615349829686691998366412316079688609699007 3866
UVM_ERROR @ 3085938280 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3085938280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 114024792504036859200190561317655978279159861465412242322127599578590946532204 14246
UVM_ERROR @ 5606280322 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 5606280322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 41833626868605964792477571902647156056173582977021147657205253699424781281530 6657
UVM_ERROR @ 1842012240 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1842012240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 42527734547656818648783804893510860453542147093033005729084767264900725332512 12607
UVM_ERROR @ 1848308825 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1848308825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 50833202176601738575213213270391963040692906251933149327877709870237135593634 6002
UVM_ERROR @ 679976776 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 679976776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 82516004968241718436479454489715867048843985297980485853113306396295343882114 17681
UVM_ERROR @ 3545324722 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3545324722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 50754490499487987600570691984105005161374435310536808665609734298516197412520 9611
UVM_ERROR @ 330893081 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 330893081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 76408936283203188542855374678734320265282401294059990238541861234373234831638 14738
UVM_ERROR @ 656438794 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 656438794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 82799304155246911596488193810899984114681924712470043800754530055272924010690 8747
UVM_ERROR @ 8549645355 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 8549645355 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 8396685502749166008317159046272108652019445083146408402680313213109760721883 31045
UVM_ERROR @ 28894980723 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 28894980723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 24110342956956972395446664638547023449791886295631498425762982141361228688649 6882
UVM_ERROR @ 1175262711 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1175262711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 109439032133341149398242250956200440157049433899769047118568326556319445818707 1612
UVM_ERROR @ 262877573 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 262877573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 114471619351183367147307045433446350671509622194734022218242899908530024772958 2878
UVM_ERROR @ 519654837 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 519654837 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 95954002977425146603355735186584784050503146256268826606919603029172627405647 15462
UVM_ERROR @ 3518425116 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3518425116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 83645868528030556877091814754209772931279224695084108337453111957186970712151 3575
UVM_ERROR @ 656283509 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 656283509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 80980615760703347142392790926741025070580812728027949038277624400051104352922 8921
UVM_ERROR @ 743297295 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 743297295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask *
otp_ctrl_parallel_lc_req 26882940470170882798500793762286142406081062032148423006645285532170963718307 9149
UVM_ERROR @ 4297133290 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 4297133290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 73606969850577956558646332076165692627621410483752743181997879620850849772979 20433
UVM_ERROR @ 2857072131 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 2857072131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 66448059903118861452554220601550002139493997401659837788677507545431163549006 4105
UVM_ERROR @ 1947634117 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 1947634117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 82722145394469463649145475463889881722081436789370281904885221121799772396563 11668
UVM_ERROR @ 717027096 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 717027096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 12660924856105693133682484060671738793228322106448404243567994060823626524748 4330
UVM_ERROR @ 844844443 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 844844443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 4036554153440082496014088961891411950481465046033344172677290124541521671520 1321
UVM_ERROR @ 158604275 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 158604275 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 2583114628887231565397923173945631691713636006220832027903140918582210921411 12656
UVM_ERROR @ 515997978 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 515997978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 75892221760155902424557434333283703374690170600684668650027269294484829134736 15851
UVM_ERROR @ 9390580968 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 9390580968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 100843576192839215613880271801617613215047764872610398616745282050352111514381 2135
UVM_ERROR @ 295785239 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (258 [0x102] vs 256 [0x100]) reg name: status, compare_mask 0
UVM_INFO @ 295785239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 14118245300080333963193440019329864456207774653093035835413276480166600698450 6120
UVM_ERROR @ 704119094 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 704119094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 11447681806136096560226787071226493144471303324125888782915633610775223130290 6947
UVM_ERROR @ 982154136 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 982154136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 71795195842550375318454072993112137371830781484345776203079256018434409630254 2419
UVM_ERROR @ 209027174 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 209027174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 65949245444590317320094835558211409196923967465311600678874731228557560721923 14023
UVM_ERROR @ 7160365105 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 7160365105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 107150168474310242361191932256861908102509574032513289846539882401295259504567 1300
UVM_ERROR @ 144643560 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 144643560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 33425383802371906438567133745127205361887593798208296661039715810892641890636 4838
UVM_ERROR @ 246727241 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 246727241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 90196771828206161203632192408205475809724771452718649535722717300602385610828 9454
UVM_ERROR @ 939415382 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 939415382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 113941199221693931545765986502364667242734153559501513669896017737675446244485 7607
UVM_ERROR @ 804082695 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 804082695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 42442322634290655580157505065537894773793368409368331522489571536057577508295 13631
UVM_ERROR @ 1009302544 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1009302544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state
otp_ctrl_dai_lock 16541176373947962705088268040237468956064552041007803241456634256478605511335 15369
UVM_ERROR @ 951050610 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 951050610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 90219363555333648596662138730395285768558517018139897751992973556618931765380 20166
UVM_ERROR @ 5607489203 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5607489203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 51908942513125954398805011577214123706358570838356209988013181126815709274462 28756
UVM_ERROR @ 8640857572 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 8640857572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 46081655479254014886999383778243121478137183904166393982370403936160507205116 13292
UVM_ERROR @ 1133390498 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1133390498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 37162667552584737119463823985457536482129830822476342204384962157287928369834 4372
UVM_ERROR @ 1128597891 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1128597891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 9113406973784817101061126267527261999203168726028314634674309419959975678070 11474
UVM_ERROR @ 2083508716 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2083508716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 15378320652383159919276784541507096988906712405857197629793457583242204050243 5347
UVM_ERROR @ 679960166 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 679960166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 108463365874370435791008259114876009769587354528138468989228770488637888468201 4623
UVM_ERROR @ 5105795149 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5105795149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 5164520908625894944587099905827592566122600300132499108850565281022364347102 10967
UVM_ERROR @ 3320925384 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3320925384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 109804461126493885365066127798512484948917482673789424780078261106765026077383 4745
UVM_ERROR @ 2112446085 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2112446085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 40809849103541877761043330430607173253739999313845645316865168007264180547068 3966
UVM_ERROR @ 364447357 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 364447357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 101979577869230798199523983830696779594445885475722409599416140549957791946322 12131
UVM_ERROR @ 1253510464 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1253510464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 40156994294379148978750961315890355945258606428320716149481275798301451117619 12938
UVM_ERROR @ 580274693 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 580274693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 50200994770976016067700624801677042153008699804424387743435172040007497976587 6202
UVM_ERROR @ 173749388 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 173749388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 94425265420016738470478614826383051637576580766004492281615937564719629845483 12525
UVM_ERROR @ 12636629752 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 12636629752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 93096675086118606475386059742068325159690852660575401048242828394405447900171 10552
UVM_ERROR @ 728820215 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 728820215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 107994287604922681569353442048991353733040036893232884605392015576361547732096 6862
UVM_ERROR @ 11794038318 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 11794038318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 41098196379919478317737819476745207560861252394436634974480994226249089557769 5891
UVM_ERROR @ 313117374 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 313117374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 93684820525469606063378272705661101095685472569112759285603826531087323070677 297
UVM_ERROR @ 12534939850 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 12534939850 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 110450155864181843848263869375016554657586294860442002534844548956933331584457 15269
UVM_ERROR @ 6588455286 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 6588455286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 81326064945082326834005456574158282103621604619228178101853894543570061441447 2266
UVM_ERROR @ 386503974 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 386503974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 31446482668788676640833516515022950241011514306107472602873809044036695152229 4525
UVM_ERROR @ 851996776 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 851996776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 40925105617043919677790156250086794162712805241969808922837598591226389101066 8830
UVM_ERROR @ 285638365 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 285638365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 718771848728258879412211061202224360003590436485403646530409851075889196466 1611
UVM_ERROR @ 248801520 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 248801520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 88627940441151133069942438908797415785162954581965249138058698734156077362905 9558
UVM_ERROR @ 4332565496 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4332565496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 110562771930436588416874582212787002351296429588874842909727002488814706105525 5023
UVM_ERROR @ 1364933958 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1364933958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 62298645016972100674438568913257469021301534559219680485463332703230699474826 24638
UVM_ERROR @ 2191437227 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2191437227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 24775477232134624697135395074386355782655314163035034436847030577694331297595 14274
UVM_ERROR @ 463482479 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 463482479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 88197592529958159253743486281195583705545750651775757473314326335439762573832 3424
UVM_ERROR @ 156624801 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 156624801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 102765720308370601120798481127521893013736087277721388710823634148543725744587 10289
UVM_ERROR @ 580121837 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 580121837 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 37923834177922296575089243982601335877246409276219016523628766228501044443055 5431
UVM_ERROR @ 1503545414 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1503545414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 50350869750069822435227075996311075028159650406089885546782779433255733339405 13298
UVM_ERROR @ 18088622914 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 18088622914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 635843020826214909516841720195382210136015358219418006207009317243786744365 5189
UVM_ERROR @ 180838362 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 180838362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 105200099958805740934126718443923860542861722989692218145554889492960708048280 13299
UVM_ERROR @ 495797019 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 495797019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 114515071022054963037035966653345717141255239270053782823216010915200015371259 2966
UVM_ERROR @ 1075792554 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1075792554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 20926660598635956647057345589440567530016528150352763157012164181840701620230 376
UVM_ERROR @ 408267096 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 408267096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_*
otp_ctrl_check_fail 71678000231598212763477670718125896330369475443746184049371874560897575549692 6639
UVM_ERROR @ 623958136 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 623958136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 23700651484782375621867567228737002065079650678383917473316137404057959093777 18618
UVM_ERROR @ 3176390156 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1639108011 [0x61b2cdab] vs 1639108009 [0x61b2cda9]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3176390156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 48089150055120005721811059345522773679030319294011030742933722504233882048952 2758
UVM_ERROR @ 178971247 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (508314165 [0x1e4c4235] vs 508313653 [0x1e4c4035]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 178971247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 66757979852425267206979114694911618755284565477036008405738990511471773446496 396
UVM_ERROR @ 249044243 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 249044243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 37198302567019700686950208267766094787462038131647716357115045919890145469605 630
UVM_ERROR @ 103883865 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3839486318 [0xe4d9e96e] vs 3839490414 [0xe4d9f96e]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 103883865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 9728290173228494594589090568750500555253704472827900423660232717601965508615 7634
UVM_ERROR @ 527209273 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 527209273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 29122219353363819171536913187119171460264832683922641480152313936102449717584 350
UVM_ERROR @ 269665066 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (481480808 [0x1cb2d068] vs 481481320 [0x1cb2d268]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 269665066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 60211466472655932189199702847764315407512868153689265361133025257626940767338 862
UVM_ERROR @ 126664408 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 126664408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 32860461949853529305282250977824201671638674022119970795917299114174177327092 4597
UVM_ERROR @ 306557425 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8704 [0x2200]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 306557425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 34446431311218184811785845896106589879238699535532743377041701087298195711203 1088
UVM_ERROR @ 90120677 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2640486015 [0x9d629e7f] vs 2640502383 [0x9d62de6f]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 90120677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 91105377874953488488103704965687525591579883431134479800883341258047197958709 11183
UVM_ERROR @ 14734152227 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 14734152227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 100114487216881635449504515661736257021280933980835288762542105309341584890718 6160
UVM_ERROR @ 158034735 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 158034735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 80354343747016608286421857989929924979359681566613390002860898985458108403509 8232
UVM_ERROR @ 773139080 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 773139080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 7949460730272402034821803920710273497966047837769399060020229385843145540639 13696
UVM_ERROR @ 984795447 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3321561265 [0xc5fb00b1] vs 3321594033 [0xc5fb80b1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 984795447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 28606463425159686721900465199285910525844677562131074593644475088226871993737 5576
UVM_ERROR @ 1080823594 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3567730256 [0xd4a73e50] vs 3567730192 [0xd4a73e10]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1080823594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 107728395559299178510693828018691049079499575762606849864802416099969369154367 7427
UVM_ERROR @ 3565020919 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2530884813 [0x96da3ccd] vs 2530917581 [0x96dabccd]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3565020919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 60158061132217996871230698302889178284908011249271540220017300688281108800636 11734
UVM_ERROR @ 1178066187 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8192 [0x2000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1178066187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 104525843492814078752330294850316805036268074186295560950002185974924338790918 294
UVM_ERROR @ 67134968 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 67134968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 83462778268911789292503948656751276067846507817489247217299110905597326618913 4621
UVM_ERROR @ 788137576 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 788137576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 91050542423559812332736280106588675740224672980550329271584221682732439804112 4702
UVM_ERROR @ 619828834 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 619828834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 15805252142475348978214547788427444931637419494252289487452261528157391175878 3919
UVM_ERROR @ 4384024360 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2890101579 [0xac43734b] vs 2890101611 [0xac43736b]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 4384024360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 92320186761007665545128174777019203920456762805901201008299114800065625366583 1746
UVM_ERROR @ 790079858 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1291771802 [0x4cfedf9a] vs 1291771546 [0x4cfede9a]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 790079858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 49590480510790857024219516842121806738496596008561573188175268982166003252633 9041
UVM_ERROR @ 8838589101 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3242370241 [0xc142a4c1] vs 3242374337 [0xc142b4c1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 8838589101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 29806185224947834602856417026311952303751544926628806160942201263474848763465 7318
UVM_ERROR @ 2342487776 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2342487776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 106292156679928132622291292318785768936791057339737588908013254085342494957410 303
UVM_ERROR @ 468659922 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2435457058 [0x912a2022] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 468659922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 59930318534461845448001397015244501573299225973039121257174500096487704792005 9538
UVM_ERROR @ 669076467 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 669076467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 22605220603070599634084584963942379500396765048410208439784697160843645911302 184
UVM_ERROR @ 92008917 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (519977816 [0x1efe3b58] vs 519977944 [0x1efe3bd8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 92008917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 40061064426850217019276452258380077808830371040732997289524336919150214056971 12291
UVM_ERROR @ 946392894 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 946392894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 9367795663676677783960583571921158780913015643602835825990055576214432399278 5512
UVM_ERROR @ 143498960 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 143498960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 63189897186241239365662975260728754476982370972902431176109216954704147758463 3788
UVM_ERROR @ 422921531 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3892088431 [0xe7fc8e6f] vs 3892086895 [0xe7fc886f]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 422921531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 42098435544127516995254468501367634007026389974878921942474482127516470754509 18630
UVM_ERROR @ 4287330524 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1391743698 [0x52f452d2] vs 1391751890 [0x52f472d2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 4287330524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 13149272430801555341503171261830294905015497602522585095672803378485363953110 4295
UVM_ERROR @ 725125685 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 725125685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 111713454060969533721044308664095261532479020487784972945732687840035663657146 16316
UVM_ERROR @ 1995179655 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1995179655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 100814524828397681882373033878175304764848110031874633763734384263708261088303 20694
UVM_ERROR @ 21333571629 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4125393825 [0xf5e483a1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 21333571629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 111816691881817451605201200293922815713563706331560880997978049591006209992077 5813
UVM_ERROR @ 648987685 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32 [0x20]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 648987685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 31747182135225907877886968729026533405717286934143501696299474132719623404605 796
UVM_ERROR @ 223969548 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32 [0x20]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 223969548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 76675429415340295801738908730827242124761916999228519412114820228674878182192 5515
UVM_ERROR @ 2533111720 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4190764251 [0xf9c9fcdb] vs 4190747867 [0xf9c9bcdb]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2533111720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 76029792713806106322785197802290798180683887522188349884109419446180289009787 268
UVM_ERROR @ 146851051 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32 [0x20]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 146851051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 26618301632604863332338872158295961851209092062685965871395837948214044332125 1324
UVM_ERROR @ 159624763 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 159624763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 69059097196526235613082421150634031492365759105129723349556683526764747139483 6503
UVM_ERROR @ 1294572639 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3605769616 [0xd6ebad90] vs 3605768592 [0xd6eba990]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1294572639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 52723887794502639406535255498244268515773787812566934568084560590555381970828 13609
UVM_ERROR @ 1427319599 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1105958035 [0x41eb9493] vs 1105958291 [0x41eb9593]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1427319599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 109017858140633119484843709059541754663315527331433283682933537818720200640292 3640
UVM_ERROR @ 412467370 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1060816771 [0x3f3ac783] vs 1060816770 [0x3f3ac782]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 412467370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 100084318960753715699350801714539124975952880855380596869179012092599117114349 2344
UVM_ERROR @ 486809938 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2911212402 [0xad859372] vs 2911212386 [0xad859362]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 486809938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 88757138406281576108413458526060871797571093464300421554986716150174124234540 200
UVM_ERROR @ 131947885 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (266759781 [0xfe66e65] vs 266759797 [0xfe66e75]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 131947885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 1274409957296097330891722075683081468061436701369155353080541334292297534676 672
UVM_ERROR @ 175592417 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (754760936 [0x2cfcbce8] vs 754760940 [0x2cfcbcec]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 175592417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 18995971481382138191696143598765312722573775712876029996926816245027064900336 2535
UVM_ERROR @ 2399039419 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2399039419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 111630311111024960932260573212288612994053450106513099614455610115036397571463 2476
UVM_ERROR @ 402769224 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 402769224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 89348145604007476712803299816386553012938023587674206702841650926956651960286 404
UVM_ERROR @ 186438025 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 186438025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 52947144793863749618980370406493128158911017818243069387101038654778048956418 26624
UVM_ERROR @ 11917105297 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1032 [0x408]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 11917105297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 23615321019693836379012464121083180697166590592386198261542642326577980094746 332
UVM_ERROR @ 108008013 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16 [0x10]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 108008013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_*
otp_ctrl_parallel_key_req 98328697863792481578188490870281557268801292993114017062169242319149651467638 2602
UVM_ERROR @ 532709232 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 532709232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 15455311328081194723402517593006599496546348206458541555052382318655768227291 1422
UVM_ERROR @ 340313568 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 340313568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 42368013224199422422402459131845607430017463152795856783073315302498476775355 4042
UVM_ERROR @ 374559203 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 374559203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 85433407532409398620447035156812125895018496973735794450187548755108898349381 4635
UVM_ERROR @ 249236506 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 249236506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 109859164014157526831832004938165306306562426594747561267129171989859904472995 2546
UVM_ERROR @ 74827830 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 74827830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 5126072202137927897808103600313602087071792463120615048901033433203306602060 1504
UVM_ERROR @ 228752079 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 228752079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 2529937073145092908323277216312393298881040715425764280380605229901852163207 1008
UVM_ERROR @ 396114041 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 396114041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 106329782681606675995952238078068203428612674146351884763194842232031054644499 2284
UVM_ERROR @ 2440517430 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2440517430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 5849259661037215935700624433905090779401689361923356731282355645102837853712 1378
UVM_ERROR @ 48944755 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 48944755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 19126833102611737183168675543919107952793481405423509377733187609657817174127 94089
UVM_ERROR @ 17751664621 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 17751664621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 24130232279205553554714432485528041917900831309921743232161964526184964394719 10206
UVM_ERROR @ 11478071814 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 11478071814 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 65284746463746361235524801258158713806858598478078215305404790333433456607949 162
UVM_ERROR @ 523354098 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 523354098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 64064649341046443668651569039348489681477485962465058202612761531138028353065 276
UVM_ERROR @ 185655333 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 185655333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 17327398627658552574188699221553484872176707086378197429895575257108324519694 3203
UVM_ERROR @ 612453624 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 612453624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 36683093120318989145978653682310882570546453292588877859935599193410719406506 26830
UVM_ERROR @ 540883203 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 540883203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 112890801041977309143723160788964456227553191835472267147505113218955812392189 406
UVM_ERROR @ 82008050 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 82008050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 5692015510563697976695959788091620861643587741425361517855563485337433084863 2414
UVM_ERROR @ 106353773 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 106353773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 85929037664574815449244795791543534351792848820655623460640833215410203045837 24212
UVM_ERROR @ 1512013009 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1512013009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 35589452284680905461239367333310603585500913138487890402953101534545140084842 1208
UVM_ERROR @ 126683241 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 126683241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 91753795396683671481992730353178438013053717840714514481473640850643245932028 19137
UVM_ERROR @ 5675417162 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 5675417162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 69306372994864208804787059642650144580783565293054345490601163514533632383787 2522
UVM_ERROR @ 148903644 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 148903644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 79311344093334840249944715198375392188496599298664088560277206100713630787161 1688
UVM_ERROR @ 1858972027 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1858972027 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 65018267498302189034884321726387977028716072983622414205896450224234610367698 2074
UVM_ERROR @ 274947575 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 274947575 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 31159070188573779519472855469463081331390739856602523782382853512273215869401 1111
UVM_ERROR @ 510240363 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 510240363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 39210041278110685762996592490076726297857249742003408106839150802706836265159 7256
UVM_ERROR @ 330247002 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 330247002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 108098459950829625388033423188472650837142033169447467310294354846240336512002 2188
UVM_ERROR @ 169112477 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 169112477 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 4799366195144388764639010785763560778315097821993377142146409269106046397230 9049
UVM_ERROR @ 744840718 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 744840718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 109708835380838027609163403276968339475251966789385600620716021189346957846984 2352
UVM_ERROR @ 282676900 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 282676900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 8657405517383286083008771254369221756694228778355997783539717000049021732587 8641
UVM_ERROR @ 697080387 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 697080387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 112620977676959733608992702930672047497221172542813241575267444897149976884835 43874
UVM_ERROR @ 19177543354 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 19177543354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 59097072280757991062482164111490687869415674792595990669594206215944538993106 3616
UVM_ERROR @ 943171777 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 943171777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 7088579438582119689103641647926007346515792985865214522458485213204455317077 2880
UVM_ERROR @ 682677704 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 682677704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 97848369879727500955228098618374322487172328587808606846759772200682123525516 2946
UVM_ERROR @ 1058971339 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1058971339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 44882711025472112986795633712628342275281881149824809408614230471441010370039 4657
UVM_ERROR @ 1226422866 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1226422866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 87423313600760490259779474526151946431227486660513781508900538645909174651390 450
UVM_ERROR @ 784340839 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 784340839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 67189238772532760215493807426905032300593417370852669228254427760093584068174 1890
UVM_ERROR @ 331745280 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 331745280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 47304400068083361429511882087082629483836301215014427913511792137313137863113 5697
UVM_ERROR @ 652472884 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 652472884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 82261906259406617173689995959059052740008570589895067792216268308450130548898 7796
UVM_ERROR @ 564559971 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 564559971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 19794846482707420510915740539145499751592618515344766235935701430578244863004 4326
UVM_ERROR @ 388055771 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 388055771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 71948261917610580243583508179086687859406210776378175833519891680577549837692 5248
UVM_ERROR @ 170463732 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 170463732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 92156394530737495148460287282586774005693661113758705446877874117007167868636 9896
UVM_ERROR @ 1421976986 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1421976986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 75581368510422057677715656905824078379166107214301162166599420649989980982434 3612
UVM_ERROR @ 374019189 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 374019189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 62924203243573845458280959840549598320139452503060586831327043954684522400717 592
UVM_ERROR @ 864095433 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 864095433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 16173414770990760349965087568384831474124388724335558687003432628399559293044 3927
UVM_ERROR @ 505190152 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 505190152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 107969833588865507646697955314970233084548964492777196369586393338278600731926 2648
UVM_ERROR @ 515080098 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 515080098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 94374905761356411699727029638771016592195346740538660446590902954248257603685 1339
UVM_ERROR @ 3300170483 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3300170483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 22265808299992220325847228362115952535286504622581211873847057984023255770574 4148
UVM_ERROR @ 569088527 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 569088527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 10695043989475288361286898492423046104683709384474194860107224793963411285201 5412
UVM_ERROR @ 917341828 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 917341828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 534938264412611041751185309794512288556837447210177101072592461959943561352 5760
UVM_ERROR @ 475260419 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 475260419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 91036362382456081150719419682527005464709728531563530856261566300712799918874 526
UVM_ERROR @ 134019361 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 134019361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 88411909528991348133351385744924821720763679056771387954709520599709850970377 4814
UVM_ERROR @ 1608347015 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1608347015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 2580780661910411226393533344896900568301715119031752663993108386045606041779 2014
UVM_ERROR @ 449924704 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 449924704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 79402294238252531446914596359340218057157615630127701114226888057723961657967 798
UVM_ERROR @ 916824404 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 916824404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 1063190235393287182243508927253829564647053357400527933017345754659427730616 8341
UVM_ERROR @ 1525492140 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1525492140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 57880889431055058474302591662334293503070080030994312868802932194887234074700 1624
UVM_ERROR @ 186048008 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 186048008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 2460002412076243602085670500713297188983176897131720532447720047314617260704 2130
UVM_ERROR @ 126834556 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 126834556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 53712732200323028957789536834929544144473404428341300932148533804159993908345 2774
UVM_ERROR @ 119161978 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 119161978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 75261540576727357775107507033140643668555319393797966912475627909472442218169 826
UVM_ERROR @ 1414211080 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1414211080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 6767006422166752451607647077872836163784915010439524291257806815512214896667 11748
UVM_ERROR @ 1195423096 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1195423096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 9898755661946730287678272933284409027981659288550126391830903204562079988057 2324
UVM_ERROR @ 158357866 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 158357866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 21033027196355478379086087109352551791439469354173458470457689603956154913153 3314
UVM_ERROR @ 157745602 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 157745602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 8016801715123016125069724766250180911645862391632353403472591218823402128229 1876
UVM_ERROR @ 460491696 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 460491696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 105823148452369163362779109704636028913434886681161457397762945028646111681896 8373
UVM_ERROR @ 235218202 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 235218202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 111201040073140623192340407127073312603844744835416577993647952871330199862099 2534
UVM_ERROR @ 132486996 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 132486996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 5683043296668243017916184446505013995264866085106677204097492348024550823711 518
UVM_ERROR @ 348909730 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 348909730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 88114017285251808304928748268820875649664708273180772639356056246010208539039 5145
UVM_ERROR @ 1081118551 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1081118551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 65506171247978199858577009598197802615671057868926396533551781101127752309720 6059
UVM_ERROR @ 537222082 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 537222082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 109579067301980595179286837364125080441933166390650852550193840380441366955647 3095
UVM_ERROR @ 712439478 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 712439478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 80537572141366038064971363780003236168117655860485486947626558924404989662368 465
UVM_ERROR @ 505111277 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 505111277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 81394590442628878334683354395180088750265849685228255845869684980474955668177 430
UVM_ERROR @ 238155937 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 238155937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 96998331297495699518153487174769746986303434189715036956748865542787071153284 18335
UVM_ERROR @ 848572358 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 848572358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 94902645549151771822899740889202685140327515786097899611842292213487234326197 8659
UVM_ERROR @ 264841206 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 264841206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 26352805488388956450713003239109274717297960025752346802326965543010367484997 1528
UVM_ERROR @ 86444891 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 86444891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 7807849439420622800903240228579579854373280365197044497024604044238484630040 20321
UVM_ERROR @ 482295255 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 482295255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 98380838885089525685879121643583275126575519047272635974644603726662205535636 3298
UVM_ERROR @ 165833600 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 165833600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 77912193723907603346627554572813640237211543140286922847588281180412341903656 9465
UVM_ERROR @ 3440278364 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3440278364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 3735123435033905271428004582453407308842906266706424935883505356288102265985 466
UVM_ERROR @ 972018795 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 972018795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 106179773361738343144344923490945803722823140163110706020510471542060337439851 1074
UVM_ERROR @ 459887785 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 459887785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 53830682568270677033227817087038990814824997155056721838809359054011325137729 8143
UVM_ERROR @ 903451897 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 903451897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 6302720110807010639501307033082062192193570200944700496057045785191943106213 10575
UVM_ERROR @ 221304889 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 221304889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 107009599057589412585114151763147865307645250546931098202721520142871821392167 3646
UVM_ERROR @ 77155580 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 77155580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 90400704534610390082904074751037984642646618171308755745400879641849879007374 1548
UVM_ERROR @ 59945663 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 59945663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 70803007864915632543466155093837436410687604022232206316171238913026753031089 17773
UVM_ERROR @ 2642768850 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2642768850 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 103094116808110796246597941463469156109060824149685656083877687928465919056407 1722
UVM_ERROR @ 265773879 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 265773879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 4512688953474801315704448745523233312804174174462704039965358272882298371979 3804
UVM_ERROR @ 307496729 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 307496729 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 43945342868133128649482296703449301546864722519575775800824795152831730107321 5176
UVM_ERROR @ 1647111584 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1647111584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 13903524963744804296910717714070977022052148454587874970103785517168510846862 3342
UVM_ERROR @ 189693695 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 189693695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 62263376834009499541059611749538642571771435556000806474457060889026684187055 10844
UVM_ERROR @ 264502182 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 264502182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 114277064848925024568997491918597957648446814147038604266020719936497178580998 2158
UVM_ERROR @ 123887654 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 123887654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 3049019808812281378897145769094655634740852092151267372627210628755173387897 4338
UVM_ERROR @ 83081535 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 83081535 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 67784670554416376922696968399606729067737155684073753881906379874055493654303 15353
UVM_ERROR @ 2154345965 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2154345965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 64834196029572794869805316067597625780747258871054388383048831136352966992712 2441
UVM_ERROR @ 210601557 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 210601557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 44297953227605808600052464912217482326900184008508081994410157193735003444676 20819
UVM_ERROR @ 1314902075 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1314902075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 103146501361776153170959396140948003312881028552324642459941196275946688179125 2415
UVM_ERROR @ 290685725 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 290685725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 101117680025178427737630863925022360302138986894606209724240370167807404690324 2416
UVM_ERROR @ 298614422 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 298614422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 101736692199808595150603486758217925993327838882131454071903363064581725842042 4817
UVM_ERROR @ 1053495489 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1053495489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 42824320983483749630304446089025740879339493483744067482893789360708196295707 3817
UVM_ERROR @ 579695978 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 579695978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 26784264101649760494640350620446404040782786834722657777125046442323864190104 2990
UVM_ERROR @ 1004938313 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1004938313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 78195677815250390743186843867127853649507797898838178755849979202711685766287 2196
UVM_ERROR @ 116668581 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 116668581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 87789166327880657986207112095991964267830318722069494391669961147980693779710 29126
UVM_ERROR @ 1158018697 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1158018697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 115655170507991033369098151025509727099339658085155276802403930803614344649403 2174
UVM_ERROR @ 57597167 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 57597167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 91150584691111640486158015328745913331353252913046070059795904978344367536072 9101
UVM_ERROR @ 427330408 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 427330408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 94961791763993930873025781420080081210869192113781456271779537264878480105542 54771
UVM_ERROR @ 3931832759 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3931832759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 29522693524006666043557237793877855622793332651971278164665203258297103712089 3053
UVM_ERROR @ 392526568 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 392526568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 100977177415552148165965331608585438589194734523931052950936047331943015382694 1716
UVM_ERROR @ 117685310 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 117685310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 25156724997018307807086228361776956573762442233133727285780248170401759479906 10580
UVM_ERROR @ 288502121 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 288502121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 103764007212467680142867121105880410470618486181361414913060352949412409666497 2093
UVM_ERROR @ 174378796 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 174378796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 92049263848939804013548014872238335936489841124877193193768163468988561884336 718
UVM_ERROR @ 135566965 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 135566965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 87988624182951582675470926919870452514810949312771301367015739330936342212508 2764
UVM_ERROR @ 259706107 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 259706107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 93704747820657749527669648202577531404956305760322877771774012097706027873513 406
UVM_ERROR @ 136542909 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 136542909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 15313747045887367072096152425294489477733334248499759713868183790583365612201 1680
UVM_ERROR @ 245732233 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 245732233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 79205451233842036126967818478507903785400872044342583003417768416738285086247 1896
UVM_ERROR @ 407647251 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 407647251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 34647292923160527695139421897678023217930479382602843768400491773754814869252 930
UVM_ERROR @ 52627838 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 52627838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 48200699327526297925628813820283539283112680127523316267080647097540722482302 2254
UVM_ERROR @ 86981804 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 86981804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 14070851859981723598539048285635444939410829142908592599666209275966536651167 2124
UVM_ERROR @ 112076563 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 112076563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 113395784149051630108148609750632612809326654048375277130182419037026934614388 2766
UVM_ERROR @ 126632052 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 126632052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 18285210887067348171820591222046602990987096921111512184508825896071717035780 1534
UVM_ERROR @ 182314549 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 182314549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 37949105870989473041703028121583412915066748293738774075451267713427453237033 356
UVM_ERROR @ 104016336 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 104016336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 23635284611257458737704395762390241189258649918963668852959378706680040425214 368
UVM_ERROR @ 564473376 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 564473376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 870213803446405554426234874561061080845103349491348758387795841745279896236 604
UVM_ERROR @ 838954889 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 838954889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 35666543693165933610465319189113218067305770861387009395925543019212704771132 748
UVM_ERROR @ 133628885 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 133628885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1315) [otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger!
otp_ctrl_stress_all 55632142174965779089596340494962255271238760543447772184037747229749688442232 10413
UVM_ERROR @ 14128527289 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 14128527289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 113327011074598846734761184088089350347478082845236608282736916576799119013322 2538
UVM_ERROR @ 2826069359 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 2826069359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 114492905515407931654168991736969860406622144825247544191329172492328574749208 23978
UVM_ERROR @ 6255846606 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 6255846606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 93447293568224653192855135475089498626270961585767536555412394209861392882756 16397
UVM_ERROR @ 1993771518 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1993771518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1315) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger!
otp_ctrl_init_fail 40683268548094515142546492461595127798674817265056697681974492813977172428089 1708
UVM_ERROR @ 1628560330 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1628560330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38735302472244677833766675604017614665781963320575274956712369537084124822854 1706
UVM_ERROR @ 324367120 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 324367120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 33380007430557356510803598788574845067475826217859087341274467437164727317471 1838
UVM_ERROR @ 1703861312 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1703861312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 5044307034542999130335702007464347154742514056159218418921708329074848286308 2044
UVM_ERROR @ 1869247958 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1869247958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 54189153123339219769761356986840099707771094656633701780127886142675387249503 1870
UVM_ERROR @ 2675626292 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 2675626292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 16924252836073195283172401438059153930504329748773829133954414617460384576176 2050
UVM_ERROR @ 572975946 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 572975946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72675240043874385155723688746542049176397008839256064283535428041613724235012 1682
UVM_ERROR @ 2005304319 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 2005304319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 57020951865324372810102759777672986338787339581191890324720768673516080425143 1578
UVM_ERROR @ 250563319 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 250563319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 15050788113181026408981680978243517777836384443260696947201656698505143816856 1530
UVM_ERROR @ 1912299210 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1912299210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 15220878369785198742242940718397697695372099038087648873111219788057370070463 1564
UVM_ERROR @ 178938341 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 178938341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:353) scoreboard [scoreboard] alert fatal_macro_error did not trigger max_delay:*
otp_ctrl_dai_errs 6425945754131230201284658421344894641991705494954212188334396982722730686470 3602
UVM_ERROR @ 164921647 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 164921647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1315) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_macro_error does not trigger!
otp_ctrl_init_fail 39876923445309304302978501248261849321301071338050133683394862774687570787351 1542
UVM_ERROR @ 2712842004 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_macro_error does not trigger!
UVM_INFO @ 2712842004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---