Simulation Results: aes/unmasked

 
10/04/2026 17:12:19 DVSim: v1.29.0 sha: 85f0913 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 95.03 %
  • code
  • 94.99 %
  • assert
  • 98.13 %
  • func
  • 91.98 %
  • block
  • 95.69 %
  • line
  • 97.25 %
  • branch
  • 91.09 %
  • toggle
  • 97.99 %
  • FSM
  • 93.62 %
Validation stages
V1
100.00%
V2
99.71%
V2S
95.23%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 78.478us 1 1 100.00
smoke 50 50 100.00
aes_smoke 3.000s 124.556us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 2.000s 64.451us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 2.000s 56.813us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 7.000s 2765.723us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 3.000s 71.577us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 3.000s 643.455us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 2.000s 56.813us 20 20 100.00
aes_csr_aliasing 3.000s 71.577us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 3.000s 124.556us 50 50 100.00
aes_config_error 4.000s 271.136us 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
key_length 150 150 100.00
aes_smoke 3.000s 124.556us 50 50 100.00
aes_config_error 4.000s 271.136us 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
back2back 100 100 100.00
aes_stress 4.000s 97.728us 50 50 100.00
aes_b2b 8.000s 386.666us 50 50 100.00
backpressure 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
multi_message 200 200 100.00
aes_smoke 3.000s 124.556us 50 50 100.00
aes_config_error 4.000s 271.136us 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
aes_alert_reset 4.000s 326.261us 50 50 100.00
failure_test 150 150 100.00
aes_man_cfg_err 3.000s 73.038us 50 50 100.00
aes_config_error 4.000s 271.136us 50 50 100.00
aes_alert_reset 4.000s 326.261us 50 50 100.00
trigger_clear_test 49 50 98.00
aes_clear 4.000s 218.078us 49 50 98.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 122.631us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 4.000s 365.438us 1 1 100.00
reset_recovery 50 50 100.00
aes_alert_reset 4.000s 326.261us 50 50 100.00
stress 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
sideload 100 100 100.00
aes_stress 4.000s 97.728us 50 50 100.00
aes_sideload 4.000s 104.254us 50 50 100.00
deinitialization 50 50 100.00
aes_deinit 4.000s 354.504us 50 50 100.00
stress_all 9 10 90.00
aes_stress_all 234.000s 11296.420us 9 10 90.00
gcm_save_and_restore 100 100 100.00
aes_gcm_save_restore 4.000s 207.638us 100 100 100.00
alert_test 50 50 100.00
aes_alert_test 3.000s 54.780us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 3.000s 84.842us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 3.000s 84.842us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 2.000s 64.451us 5 5 100.00
aes_csr_rw 2.000s 56.813us 20 20 100.00
aes_csr_aliasing 3.000s 71.577us 5 5 100.00
aes_same_csr_outstanding 3.000s 92.841us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 2.000s 64.451us 5 5 100.00
aes_csr_rw 2.000s 56.813us 20 20 100.00
aes_csr_aliasing 3.000s 71.577us 5 5 100.00
aes_same_csr_outstanding 3.000s 92.841us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 5.000s 215.679us 50 50 100.00
fault_inject 640 700 91.43
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_cipher_fi 34.000s 10007.546us 317 350 90.57
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 137.981us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 137.981us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 137.981us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 137.981us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 4.000s 466.603us 20 20 100.00
tl_intg_err 25 25 100.00
aes_sec_cm 5.000s 928.241us 5 5 100.00
aes_tl_intg_err 3.000s 204.165us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 3.000s 204.165us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
aes_alert_reset 4.000s 326.261us 50 50 100.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 137.981us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 137.981us 20 20 100.00
sec_cm_main_config_sparse 212 220 96.36
aes_smoke 3.000s 124.556us 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
aes_alert_reset 4.000s 326.261us 50 50 100.00
aes_core_fi 278.000s 10012.388us 62 70 88.57
sec_cm_gcm_config_sparse 262 270 97.04
aes_gcm_save_restore 4.000s 207.638us 100 100 100.00
aes_config_error 4.000s 271.136us 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
aes_core_fi 278.000s 10012.388us 62 70 88.57
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 137.981us 20 20 100.00
sec_cm_aux_config_regwen 100 100 100.00
aes_readability 3.000s 81.272us 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 4.000s 97.728us 50 50 100.00
aes_sideload 4.000s 104.254us 50 50 100.00
sec_cm_key_sw_unreadable 50 50 100.00
aes_readability 3.000s 81.272us 50 50 100.00
sec_cm_data_reg_sw_unreadable 50 50 100.00
aes_readability 3.000s 81.272us 50 50 100.00
sec_cm_key_sec_wipe 50 50 100.00
aes_readability 3.000s 81.272us 50 50 100.00
sec_cm_iv_config_sec_wipe 50 50 100.00
aes_readability 3.000s 81.272us 50 50 100.00
sec_cm_data_reg_sec_wipe 50 50 100.00
aes_readability 3.000s 81.272us 50 50 100.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 4.000s 97.728us 50 50 100.00
sec_cm_main_fsm_sparse 47 50 94.00
aes_fi 4.000s 280.871us 47 50 94.00
sec_cm_main_fsm_redun 690 750 92.00
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_cipher_fi 34.000s 10007.546us 317 350 90.57
aes_ctr_fi 3.000s 109.564us 50 50 100.00
sec_cm_cipher_fsm_sparse 47 50 94.00
aes_fi 4.000s 280.871us 47 50 94.00
sec_cm_cipher_fsm_redun 640 700 91.43
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_cipher_fi 34.000s 10007.546us 317 350 90.57
sec_cm_cipher_ctr_redun 317 350 90.57
aes_cipher_fi 34.000s 10007.546us 317 350 90.57
sec_cm_ctr_fsm_sparse 47 50 94.00
aes_fi 4.000s 280.871us 47 50 94.00
sec_cm_ctr_fsm_redun 373 400 93.25
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_ctr_fi 3.000s 109.564us 50 50 100.00
sec_cm_ghash_fsm_sparse 47 50 94.00
aes_fi 4.000s 280.871us 47 50 94.00
sec_cm_ctrl_sparse 690 750 92.00
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_cipher_fi 34.000s 10007.546us 317 350 90.57
aes_ctr_fi 3.000s 109.564us 50 50 100.00
sec_cm_main_fsm_global_esc 50 50 100.00
aes_alert_reset 4.000s 326.261us 50 50 100.00
sec_cm_main_fsm_local_esc 690 750 92.00
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_cipher_fi 34.000s 10007.546us 317 350 90.57
aes_ctr_fi 3.000s 109.564us 50 50 100.00
sec_cm_cipher_fsm_local_esc 690 750 92.00
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_cipher_fi 34.000s 10007.546us 317 350 90.57
aes_ctr_fi 3.000s 109.564us 50 50 100.00
sec_cm_ctr_fsm_local_esc 373 400 93.25
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_ctr_fi 3.000s 109.564us 50 50 100.00
sec_cm_ghash_fsm_local_esc 137 140 97.86
aes_fi 4.000s 280.871us 47 50 94.00
aes_ghash_fi 3.000s 56.415us 90 90 100.00
sec_cm_data_reg_local_esc 640 700 91.43
aes_fi 4.000s 280.871us 47 50 94.00
aes_control_fi 51.000s 200000.000us 276 300 92.00
aes_cipher_fi 34.000s 10007.546us 317 350 90.57
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 19.000s 784.862us 0 10 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_base_vseq.sv:306) virtual_sequencer [aes_reseed_vseq] Expected GCM phase GCM_AAD, got GCM_INIT
aes_stress_all_with_rand_reset 18699515264998696261567458239093272051132146904150960127547169480986060396095 821
UVM_INFO @ 1174766593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 92905978068910612674273936413088794538819706575438114018205621674976954296912 490
UVM_INFO @ 245876969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 69972750461605868359211381089746598367803137411101689717986241608620428619132 426
UVM_INFO @ 612575815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 67792498222617375262915780909748310878608270576814364612413204092006592939814 811
UVM_INFO @ 828534801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 84793655519665431191539467759261835856625348928958031235490916923500717888715 1127
UVM_INFO @ 344508107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 97625890742959087982900383603866453413575020730825433956349486972268021010713 382
UVM_INFO @ 484558116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 16296674461429109594874491687733956789710413908721054945465580485508920835744 544
UVM_INFO @ 6961426607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 100383603785797402604226990348913376510845520857221572439294147711242567799660 1315
UVM_INFO @ 793789161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 47870018171176170365316000175213692779217976423685365479056999931744486703000 757
UVM_INFO @ 3015444402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 86905213237293310307144624971634532775945236569029184931417242648953143666572 772
UVM_INFO @ 784862467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
aes_cipher_fi 22353974118770796241950416887786059285453644769883830476535566584226702989770 150
UVM_INFO @ 10008006811 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 65831195246909281427610441226869510492979812944804046342616216515137016994418 154
UVM_INFO @ 10014105375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 71681215635016808126633472707518689743307920832057422659748948605716854418139 151
UVM_INFO @ 10010461454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 69442420899542625553845586359281682785618688222259831399353155897881681175319 152
UVM_INFO @ 10004834832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 27016129780562023022732435247644655270981025444805739416751728404468846200244 154
UVM_INFO @ 10028688042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 103124709874499688481908803911836707141361478230438475233527787866823136183004 146
UVM_INFO @ 10005878427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 1413135045122222386374102040188573112585080624108552418053369461313676056661 146
UVM_INFO @ 10003046515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 24377910138005987039987100876440893341097601791766728210794302393436123789132 157
UVM_INFO @ 10198855467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 38358558365549788312179057215777064342624368888098324363333067574766722037742 142
UVM_INFO @ 10007558141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 60475260754068982459383352716718559715475183847403748450603143715231539290934 150
UVM_INFO @ 10002529025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 53075835044368187987650985661994313714439725335411218759209608297639179848911 146
UVM_INFO @ 10007545783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 88489022547010536749122424077072676360479247498514272527319654315555243973956 150
UVM_INFO @ 10012593578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 41161803800022291258396738646687229400872037893928522725393573266399465195470 146
UVM_INFO @ 10006971846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 16865863771148111370050903694214594266544074581082578875397078979235886660849 142
UVM_INFO @ 10009470459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 46236169010406741710169879857921433554963130273612178852942222318842372805853 144
UVM_INFO @ 10004832244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 86240539653494037212700087672890900183571190614952035092760266772977903927116 155
UVM_INFO @ 10005478562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 74878413066881674373880703859526604298531489834155836666299488757136648600762 150
UVM_INFO @ 10017510155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=158)
aes_stress_all 103796148415588722367875515944867985310164126712334472497460932777173374641962 816179
UVM_INFO @ 11296419971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7)
aes_core_fi 56063414823363460647869633916946333801519017763434341473829242378378635094631 143
UVM_INFO @ 10008664066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
aes_control_fi 29837084331457908041900691532024625358091658438639950231749603067343650012575 149
UVM_INFO @ 10005101429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 12135199192350324271177597679064827853862155431765047092403693837025260023413 155
UVM_INFO @ 10006697840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 101617162088584180836897900938086250447827512552100322839337549164768059832472 147
UVM_INFO @ 10007710109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 38143602629359898793915466288240971374979307367916649786825666319126081820403 145
UVM_INFO @ 10014144465 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 111865136010735042392652281531576688090334303534104488456832305356017141269617 151
UVM_INFO @ 10013368123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 87350719050481542874851495412247242782478701249325743664424083128591123381170 155
UVM_INFO @ 10007248161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 29804726178081836207370679955936391540947273512492751724939373721149689164710 149
UVM_INFO @ 10015210806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 78526358184709524937757693290934063627935400985869227092177102360648822551488 145
UVM_INFO @ 10012876502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job killed!
aes_cipher_fi 110916181026039266374366263762233709358204314520904846577677094894688451783369 None
aes_control_fi 106536215107520344054539870264412198363927167027568028544982485528959636006778 None
aes_control_fi 80403103401291089289929751495254942849259536279255567217822325568125000436953 None
aes_control_fi 47774334294004805001495730835628333157128065653744395573943465079595882212668 None
aes_cipher_fi 77437678462606479734106407243754987154982123700954471515986471115912055804706 None
aes_control_fi 57793912113676624144839097863502828411897665114347190512836867049030096176568 None
aes_cipher_fi 21380359687315043139977008971964779610104583256747168250518976593245308580080 None
aes_cipher_fi 60393547445302219170870904864933201606350514170093365060400091266576475432381 None
aes_control_fi 36421923870550423548387288026560046124784909006194134770038479035133793219513 None
aes_control_fi 100993233867957238655560985529003378215211110889549347516394157239599698608970 None
aes_cipher_fi 79066458918538196467710822578656652390525707183587860691781173495189999336771 None
aes_cipher_fi 77432110613922161597921628296516420223144470913332724111342900227815070726282 None
aes_control_fi 79652433264086273180479808751474724625749201954233389311478796859541996453522 None
aes_cipher_fi 74996116724439781348971117969303430260913840714029718225399700867721221542143 None
aes_cipher_fi 8458137532731892711880736269027836938043615019402425763989506158447741802506 None
aes_cipher_fi 30324565368891614565127714366054369652948180878409445168783504623524807037800 None
aes_control_fi 22229705343877241737977760252521710160814879484608561515288912342204578755216 None
aes_cipher_fi 57431735607220461269214168350327833060595645918516702696642915271542851488070 None
aes_cipher_fi 30915117903923774963978225310335522806615328742947263072384866712896554808839 None
aes_control_fi 76499953574271055402149732527686242744600429155517695631548431619625256783560 None
aes_cipher_fi 110766244899861280574967531543049773008520752436031141582222714017033142846923 None
aes_control_fi 112999042444548943123419557088689765625260596774209921045658139890007307003119 None
aes_control_fi 22092331800541622196866908456253512227803209534905320303385545174508399808929 None
aes_control_fi 27882278296857516498471104620587400262931714480112033856111775911770954509154 None
aes_cipher_fi 114247486987086061734101324476852749773395113219274559875061073348881322808386 None
aes_control_fi 104667091985957970741934819289747821504000730928879095851485233113639127222327 None
aes_control_fi 66656848463490492212239930868002845897181317740478078004679401331109249459720 None
aes_cipher_fi 56240643424413070224696064797161621378955296072565782577758188631644538340998 None
aes_control_fi 15111650655710872735300981776847380433584359528282649211537826429280706924919 None
aes_cipher_fi 61894547220075231758016103323785724834080981086981306350277475203276026778995 None
UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 108085623732849560967980131235885713643090698282055189218746981675126800580638 143
UVM_INFO @ 10011815298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 35577538486702178622353738886120129598839819299728775815012491719712349033453 143
UVM_INFO @ 10019438774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 107837046638426799148911599137794987843572409421317858550820972089538094652613 143
UVM_INFO @ 10003750985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 45500217013312323236016535221089353328577638446859022146079407551026171731963 151
UVM_INFO @ 10013050637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 82627008674162305168107036874124088684640232564666858807718443193975694032127 155
UVM_INFO @ 10005266543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '*' in file '/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_*/aes_scoreboard.sv' at time * PS + *.
aes_fi 35922616921071479507072921169025095783194827664973987206723452840506902180116 1439
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '738' in file '/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 271302312 PS + 10.
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '738' in file '/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 271302312 PS + 10.
ERROR: Decryption finalizing failed
xmsim: *E,MEMALC: Memory not allocated for actual argument 'predicted_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '738' in file '/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 271302312 PS + 10.
UVM_FATAL (aes_scoreboard.sv:775) scoreboard [scoreboard] # *
aes_clear 85679188467079925575474517116843489296398415305565529472023801480823546558600 1167
TEST FAILED MESSAGES DID NOT MATCH
0 4b 3f 9b 0
1 61 81 b7 0
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1142): Assertion AesSecCmDataRegLocalEscIv has failed (* cycles, starting * PS)
aes_fi 3656307521612892620255889288719855402802364487890294823357786474343635149972 3079
UVM_ERROR @ 36998522 ps: (aes_core.sv:1142) [ASSERT FAILED] AesSecCmDataRegLocalEscIv
UVM_INFO @ 36998522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_fi 85494017990410749265369341081891831704313118548934646613069523669946799776153 3973
UVM_ERROR @ 42937239 ps: (aes_core.sv:1142) [ASSERT FAILED] AesSecCmDataRegLocalEscIv
UVM_INFO @ 42937239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8)
aes_core_fi 20805579882970060791528371564427038422953322582539367361746654821217794536975 142
UVM_INFO @ 10012388166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9)
aes_core_fi 48080424582050195479439912886929504222787263590798318076616436711456320909088 150
UVM_INFO @ 10123514701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
aes_control_fi 63891485677161380654355505821827625761759804137015719102893667162321872916131 155
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_cipher_fi 72862182286557348183490956944403901253924715336183241672397203037339670903726 144
UVM_INFO @ 10753263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---