Simulation Results: clkmgr

 
10/04/2026 17:12:19 DVSim: v1.29.0 sha: 85f0913 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.53 %
  • code
  • 87.94 %
  • assert
  • 94.42 %
  • func
  • 77.24 %
  • line
  • 92.21 %
  • branch
  • 95.06 %
  • cond
  • 89.94 %
  • toggle
  • 100.00 %
  • FSM
  • 62.50 %
Validation stages
V1
68.57%
V2
62.34%
V2S
34.89%
V3
1.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
clkmgr_smoke 2.370s 95.048us 50 50 100.00
csr_hw_reset 5 5 100.00
clkmgr_csr_hw_reset 2.570s 235.975us 5 5 100.00
csr_rw 8 20 40.00
clkmgr_csr_rw 2.820s 144.170us 8 20 40.00
csr_bit_bash 0 5 0.00
clkmgr_csr_bit_bash 7.430s 386.252us 0 5 0.00
csr_aliasing 3 5 60.00
clkmgr_csr_aliasing 1.440s 32.032us 3 5 60.00
csr_mem_rw_with_rand_reset 6 20 30.00
clkmgr_csr_mem_rw_with_rand_reset 3.240s 184.162us 6 20 30.00
regwen_csr_and_corresponding_lockable_csr 11 25 44.00
clkmgr_csr_rw 2.820s 144.170us 8 20 40.00
clkmgr_csr_aliasing 1.440s 32.032us 3 5 60.00
Testpoint Test Max Runtime Sim Time Pass Total %
peri_enables 50 50 100.00
clkmgr_peri 2.770s 136.528us 50 50 100.00
trans_enables 50 50 100.00
clkmgr_trans 5.240s 504.322us 50 50 100.00
clk_status 50 50 100.00
clkmgr_clk_status 2.390s 125.379us 50 50 100.00
jitter 50 50 100.00
clkmgr_smoke 2.370s 95.048us 50 50 100.00
frequency 1 50 2.00
clkmgr_frequency 1.970s 79.464us 1 50 2.00
frequency_timeout 0 50 0.00
clkmgr_frequency_timeout 1.120s 18.714us 0 50 0.00
frequency_overflow 1 50 2.00
clkmgr_frequency 1.970s 79.464us 1 50 2.00
stress_all 3 50 6.00
clkmgr_stress_all 8.550s 613.568us 3 50 6.00
alert_test 50 50 100.00
clkmgr_alert_test 3.500s 180.276us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
clkmgr_tl_errors 11.800s 991.516us 20 20 100.00
tl_d_illegal_access 20 20 100.00
clkmgr_tl_errors 11.800s 991.516us 20 20 100.00
tl_d_outstanding_access 19 50 38.00
clkmgr_csr_hw_reset 2.570s 235.975us 5 5 100.00
clkmgr_csr_rw 2.820s 144.170us 8 20 40.00
clkmgr_csr_aliasing 1.440s 32.032us 3 5 60.00
clkmgr_same_csr_outstanding 3.240s 173.976us 3 20 15.00
tl_d_partial_access 19 50 38.00
clkmgr_csr_hw_reset 2.570s 235.975us 5 5 100.00
clkmgr_csr_rw 2.820s 144.170us 8 20 40.00
clkmgr_csr_aliasing 1.440s 32.032us 3 5 60.00
clkmgr_same_csr_outstanding 3.240s 173.976us 3 20 15.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 3 25 12.00
clkmgr_sec_cm 7.460s 377.057us 3 5 60.00
clkmgr_tl_intg_err 2.840s 117.030us 0 20 0.00
shadow_reg_update_error 20 20 100.00
clkmgr_shadow_reg_errors 4.280s 309.652us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
clkmgr_shadow_reg_errors 4.280s 309.652us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
clkmgr_shadow_reg_errors 4.280s 309.652us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
clkmgr_shadow_reg_errors 4.280s 309.652us 20 20 100.00
shadow_reg_update_error_with_csr_rw 0 20 0.00
clkmgr_shadow_reg_errors_with_csr_rw 1.380s 45.578us 0 20 0.00
sec_cm_bus_integrity 0 20 0.00
clkmgr_tl_intg_err 2.840s 117.030us 0 20 0.00
sec_cm_meas_clk_bkgn_chk 1 50 2.00
clkmgr_frequency 1.970s 79.464us 1 50 2.00
sec_cm_timeout_clk_bkgn_chk 0 50 0.00
clkmgr_frequency_timeout 1.120s 18.714us 0 50 0.00
sec_cm_meas_config_shadow 20 20 100.00
clkmgr_shadow_reg_errors 4.280s 309.652us 20 20 100.00
sec_cm_idle_intersig_mubi 50 50 100.00
clkmgr_idle_intersig_mubi 4.970s 289.065us 50 50 100.00
sec_cm_jitter_config_mubi 8 20 40.00
clkmgr_csr_rw 2.820s 144.170us 8 20 40.00
sec_cm_idle_ctr_redun 3 5 60.00
clkmgr_sec_cm 7.460s 377.057us 3 5 60.00
sec_cm_meas_config_regwen 8 20 40.00
clkmgr_csr_rw 2.820s 144.170us 8 20 40.00
sec_cm_clk_ctrl_config_regwen 8 20 40.00
clkmgr_csr_rw 2.820s 144.170us 8 20 40.00
prim_count_check 3 5 60.00
clkmgr_sec_cm 7.460s 377.057us 3 5 60.00
Testpoint Test Max Runtime Sim Time Pass Total %
regwen 1 50 2.00
clkmgr_regwen 1.370s 38.591us 1 50 2.00
stress_all_with_rand_reset 0 50 0.00
clkmgr_stress_all_with_rand_reset 28.300s 2220.324us 0 50 0.00

Error Messages

   Test seed line log context
UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected *b*, got *b*
clkmgr_frequency 79549114775295992346572512504900044869891393028154366143239099525031324745043 75
UVM_INFO @ 9876607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 58055243940712717053369613828825548999496516277809992302698601763079862986298 79
UVM_INFO @ 491453642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 21491314709522559170859339023115024835379125149269561126631664292034484703415 75
UVM_INFO @ 89513160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 86054336558387525005600293784656099407675053885160503789983715853385449000982 76
UVM_INFO @ 12660626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 43050521575458967836485567679302460227449374451115871848401892834132866959730 78
UVM_INFO @ 39449671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 22890741756080247289226239630977374103251892404571261957110378592880946978540 75
UVM_INFO @ 4369031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 11035414959555823423530252923753108564112592774043020167032202761319365094627 122
UVM_INFO @ 261571295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 40467331589798073351112858990367511587398613056694075183851863388134417212428 75
UVM_INFO @ 9244451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 112013914880618676547783818379742310447171088336382768783919305886589634251030 78
UVM_INFO @ 13767526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 94269525071064710780654719974509750208764908875146695760936256600314097584594 80
UVM_INFO @ 193230142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 40362017614681480271678078503994381926335484050439863860263114378956453634433 76
UVM_INFO @ 6980045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 10933094783646843264510456508044123423656802292795939260851824818277505214455 78
UVM_INFO @ 8673591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 89893966147172145074802719530288204108727912943691107912646421421783726609317 75
UVM_INFO @ 5748100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 41559256533091878261793392268492704455818463224636877710204613965220378641901 75
UVM_INFO @ 14634230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 30307882843916423619933716699605682042417330156901907672974654556226843722179 75
UVM_INFO @ 8255471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 83212528148370329527423641626221078458417883017321753011938324138415120406523 123
UVM_INFO @ 61497927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 94033466273583478656137953705512802453220377065218540335144580599176951533625 75
UVM_INFO @ 5764076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 111459900300481013278938340731240882430712008418107461096618653369957970950502 77
UVM_INFO @ 9961164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 96137981212382160641694889403191058299077116508559496306184710339467654106735 199
UVM_INFO @ 309349581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 73383615101204082909437205440763020654780142718452037338872956101037723880579 76
UVM_INFO @ 7267173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 22483988525356259626863850237272026881755380553629748289131690581727152925852 134
UVM_INFO @ 176234952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 32303930685128978362147613094628345487946845461741062838162431440342391752740 75
UVM_INFO @ 5060746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 16934522590249465745126206102348977666427292748907041431849835753374050590130 78
UVM_INFO @ 9287827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 91372518137268519970372210471557343222224487888518554816156903023101859007615 75
UVM_INFO @ 94863396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 73034381561354930945761099263152273918364522772392081352156699897307385143683 76
UVM_INFO @ 9972268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 42194407728590849035324214340061142819175360275023131086606434501565667988181 76
UVM_INFO @ 13435728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 82679252148558022646850620038334625558441475428466545887747568721782642678293 77
UVM_INFO @ 19690798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 99620241404852607501328900313776255645319682157228732525861493364442478323090 75
UVM_INFO @ 6163587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 101423493541925686581047691100286695493106156080081261643671242483336027308260 75
UVM_INFO @ 6317013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 93667878204621672244864703136766736397598371882195592660667515184019510068877 84
UVM_INFO @ 18359878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 45979223532497307138301730927816882767501975534789275786082418069848548312632 76
UVM_INFO @ 11131621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 31921897334062452650302376930829575304434770441701530205110735931371842918392 77
UVM_INFO @ 12028045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 17046714963299273793725308467818576446204378050827596568815947614992423062318 75
UVM_INFO @ 6278843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 10163917874620304988687688493550480093676934196186330364401494715741127743702 75
UVM_INFO @ 24072630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 98861763117557583120760563585670857610732233313264750458448151348059653960306 75
UVM_INFO @ 11703996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 22374550532015261308369561575209977191166697673174884153299760214690598003495 76
UVM_INFO @ 6238816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 55676664496083722907830199239628663401810071085891834109900677601859591799017 84
UVM_INFO @ 115867196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 46103484518233430330633177257582797366944519486721743301662890305618977562223 80
UVM_INFO @ 79463607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 64045364500662395566222164997669035455282392094503120322104891423378505990884 77
UVM_INFO @ 5827384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 115774326269551869563757437400514779272821593000055660238831503938422652237627 78
UVM_INFO @ 10455475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 47648095783550566941371114686276846163358069878595200747565599758490462274269 77
UVM_INFO @ 11246668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 88699385140249626286572240416326796857229465258577453202043965262142742774416 78
UVM_INFO @ 10556335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 187663666759536544089156354789966590164375434941444793818452189909237678980 76
UVM_INFO @ 220715506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 7583691490124736235373980580976146249863585822816021515691868886870946029297 75
UVM_INFO @ 31267457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 87180897212047667224851795659719765693334771993694725897864615141792241658319 78
UVM_INFO @ 53328766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 67342889956930763941039905491955321310280279090441680242792671543808381670471 76
UVM_INFO @ 6717059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 68245654275755204844212591686832750211001462075409417234868663377791920559803 75
UVM_INFO @ 5981025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 66321335324742782754824254717261308053559067320709397087943276146420696934466 78
UVM_INFO @ 63516536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 77499277658203882921262441583976279740435778003363434008336855035878345944007 75
UVM_INFO @ 6588800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 63832430948988992369375048841484407439167348334878653178309103293228797290178 76
UVM_INFO @ 55991724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 28070396894411632143338425264525767255868525429519879784110562291295939420752 75
UVM_INFO @ 5362704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 115271195967154029801706974552874780058358530348300780726106142412753147082554 95
UVM_INFO @ 471206624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 11883860184480525315638793067111257524901303828936758723492726860865048792450 80
UVM_INFO @ 9855407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 3516746432375699209117015507071488126434544895037720766159409441795119763330 76
UVM_INFO @ 6612545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 51060791162991547869742570707942887722503788397407242013230033248725834008270 87
UVM_INFO @ 123858540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 69251498105372953945100276992945762105526074773475176864296541317394499021800 76
UVM_INFO @ 5176015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 21776074880051165157551003525173528240118765180402458406896947539183015466020 356
UVM_INFO @ 613568329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 104396506057836118579291431282914973070985475746602153896722428381158561229489 75
UVM_INFO @ 17858342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 17731838210615261465824499658916490931784342361505202565594865468278973981024 78
UVM_INFO @ 60411576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 76667749097462122762941764871005269779145480934206702624889427581874214637476 76
UVM_INFO @ 8446292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 28754796793155844444352145455925937631246290083094449466323454268751324773039 231
UVM_INFO @ 235247952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 6997141088228371275519125746415742561754467336952767634187769267350132370147 75
UVM_INFO @ 17854643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 23956749282822272874745399677218554274456931722703857503457962536706990644885 76
UVM_INFO @ 4516980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 88421352431945354363828666655379784001421287848601289585016144703128999819849 75
UVM_INFO @ 8036079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 87333084133108740493285250307404607846720797018007393941769556344560242027218 210
UVM_INFO @ 1957757353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 70318931940196687397242860720699354761297928101722842064860528929278894849264 75
UVM_INFO @ 6184145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 77814988088042310970428637073031898564303550034264987234821327697666105564385 188
UVM_INFO @ 85931828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 114658738735490183877807932914575378971825981746731760811320728203582159037728 75
UVM_INFO @ 6214777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 71650028558173836777218982258852594789051255651384839743049878880843349293249 78
UVM_INFO @ 13823753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 82804002657539873202448389365246362851913167775067252508056990116493601059278 76
UVM_INFO @ 7557243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 63841179728498813213082274122241142502061589737135680496403718770347961457672 76
UVM_INFO @ 13900555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 96596311120121763146699672130736095293980170030711248109214151071192747226857 76
UVM_INFO @ 14788878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 76000775033592286176867337402334921158649578543105286933936763848722770366906 75
UVM_INFO @ 21363941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 103614705122304409775089260937013441899998593771643772657023278268745426053574 108
UVM_INFO @ 22724324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 9170405897216941963399917344141233165009957278316881836355299125031003315089 76
UVM_INFO @ 10584814 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 41620030736491340208185110007252834551123768268778429706788485007679919324791 76
UVM_INFO @ 11186829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 52494969724556034862653213743005079769893724101851306046659261168254398915263 75
UVM_INFO @ 6092084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 82389680137850767552393801395551824448503709647960743822173214509693112239374 102
UVM_INFO @ 2220323935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 49748859664547996835701698811362695797017730470351236425766109447448334351380 76
UVM_INFO @ 11094875 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 23430799484480159288574744638664950011628235412153142048331326279863434340164 182
UVM_INFO @ 841820524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 19475545019707479103141124801667560161505972633465075967616757310508328401032 75
UVM_INFO @ 22144920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 27982174762798645205895740133519016282977654775692189110706456401475338782835 75
UVM_INFO @ 11508025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 36081718326754899604848025976517371648023801490914789853389186255870945360870 100
UVM_INFO @ 23439100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 87735326185069923595471380865400257798089301786562227698740682685700592815711 76
UVM_INFO @ 14950400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 81959814972339322058379503744774482740909764211880696225170741518905693091904 77
UVM_INFO @ 4413353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 58120536110021094896589376679847846855023360955112655690536007192561899967479 75
UVM_INFO @ 8388516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 35639055369093148185791569430922057257747204353794228534139702604881939977671 78
UVM_INFO @ 123377439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 49245773078075961468325819719337174089061502627379784074339753659353760758953 76
UVM_INFO @ 9443915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 37365443665529056280812662509712617433576446121354251177522168369565957373252 76
UVM_INFO @ 54735006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 67250593196678286412395498980815082018569670573447683984035512974649859668798 77
UVM_INFO @ 7775852 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 98619856383733693450331614269776722115728967547566835446891840197173860234762 171
UVM_INFO @ 92977659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 111515380519190958428189708765691077479850426966018914735941983025225911794490 139
UVM_INFO @ 187938678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 63184701693275024768946870027846747886628838211462059753849402006865448196918 75
UVM_INFO @ 9258313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 86320460392186008099323200999721564378056315170979175390012247697954957803404 76
UVM_INFO @ 4580145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 104137040248317746976211365676236034897667795628548254043248832746104707520186 78
UVM_INFO @ 26071860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_timeout_vseq] Mismatch for timeout recoverable error, expected *b*, got *b*
clkmgr_frequency_timeout 62194597156961660456276764028887005997548947461048265497997828534922763742678 77
UVM_INFO @ 6541252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 103791602672444345161117109924033190963281322560213363339893949380655739887480 78
UVM_INFO @ 9179070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 8043488698777468653695986520322218395355758689483408304690169943516276620936 77
UVM_INFO @ 26925459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 62813366444953773342449537849305311174262788009211472740259693559417290602842 78
UVM_INFO @ 3610202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 68258043532043291027592105001969273533906278775904538189213694949069834252038 78
UVM_INFO @ 5212485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 105138605280436819648854575245798592439527464473382094607410894736855679788666 78
UVM_INFO @ 4973177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 61057132197180278244506366527296918667879607727983450908568446886408651906854 78
UVM_INFO @ 8706685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 75355826983249876033543957286400750184386838746660178343520700990361882665085 78
UVM_INFO @ 132827515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 47836354604643409301963450060767416755851241255017790571751806177274026902633 78
UVM_INFO @ 6628496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 81487463759867456291650694448035825773641212172985981861929771795661008675885 164
UVM_INFO @ 69707307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 40239005616267794381852389273524534667148192717997007943232203773636796222169 78
UVM_INFO @ 2481006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 84153933194131286795667348177307774918557966771214655588791030361378802954571 260
UVM_INFO @ 261964826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 97443812949600228757186578498238354843795489652340401962304820838903677457501 78
UVM_INFO @ 5858264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 52352135852126973507261390379720419132071668534041339095891410241128846488458 78
UVM_INFO @ 3030432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 46580798394341598134012254388224975459276979305938264907386106572083846610443 79
UVM_INFO @ 2206993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 14257506725336199999111312782621840393218161854288446325656795999853382708508 78
UVM_INFO @ 2575435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 101753455238070993317757440360511328001451410350707406512737595456503479908439 77
UVM_INFO @ 1421546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 36036209693472841638728660841559545877270424235061284979683042980158848250037 79
UVM_INFO @ 4792112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 113793805312916806464896989487848863804626877283178919565063101908563162306396 77
UVM_INFO @ 17776635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 66886411102649306726410483769305957506396124172581794485556468755446730161297 78
UVM_INFO @ 3838012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 9950327417546761218066420173587483087139858973653121193047588789671698174536 79
UVM_INFO @ 155558059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 55358661278228646542916190178714307065159097885266152583036295375026655645884 78
UVM_INFO @ 2728949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 9222952400584466911644916737328571134439246139017082417135605723567605346069 90
UVM_INFO @ 62209434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 17636661831050639289877425137117714041862907733727399222354930166195032612835 134
UVM_INFO @ 74160455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 86846781374653550472597099499555162937515096078563263820570460724771741225488 78
UVM_INFO @ 11772241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 27601148209954719358959174271837068190281405510143693302620494259792573788547 79
UVM_INFO @ 8623119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 78586390108365010652716218992710577016479497144611240365398789882572835707028 77
UVM_INFO @ 4193328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 84946842153334761071646557759626582813483711490594213978727699836912184598711 78
UVM_INFO @ 3704167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 106514874297974595124542743748567544053157112982646664406629907010284259473297 133
UVM_INFO @ 264265559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 86328537001928617103807581398727129179062495315986195022205851390044625531904 78
UVM_INFO @ 5306563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 21510042863262262703579173253250680034543612212176347490451371091581985096255 78
UVM_INFO @ 10726790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 108696897968863073060601116183791838053590532236733487564036596068378708616901 78
UVM_INFO @ 3934995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 71105326645604362337134320569861104206323070439526363455237229842520757915760 79
UVM_INFO @ 220880850 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 14273975981549915854945895711346395666194981404695171519496059464958889125964 78
UVM_INFO @ 5949298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 103520430177436171261377369218529581093650489891815014013008831415199292138146 78
UVM_INFO @ 8253868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 62262649303172510408018867614441614983264545304703521878681798658642805651350 93
UVM_INFO @ 40289973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 109995187090225407409570055254559823744608581594825380422500322827252137259200 77
UVM_INFO @ 2264738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 44349348478924508865944008101966873535595403055503682097713457925575901972981 79
UVM_INFO @ 10996156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 30567066774187229946047572111524758544756484676607717067528315721952071069850 78
UVM_INFO @ 4268981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 41614708422874594099633416934144457417764026070824577399881086550470522210996 78
UVM_INFO @ 2392161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 6580099616223170565985172115016968396522715719849998085872747202140115345871 139
UVM_INFO @ 217669256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 90225698622003167502853118871632534878075035791699201785735635350418614273735 78
UVM_INFO @ 3159063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 20925896423819121843015552957374678637784933293050618679469724824963429007209 79
UVM_INFO @ 14397086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 83006109361064225935618281149374465619599787997637088338408985252188792811824 78
UVM_INFO @ 5886829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 79802063924224174261297005936075104294662157495246399019215915695279033486701 77
UVM_INFO @ 6435860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 25390445167374467574727753227878468815361053895581942860008146574321625656710 77
UVM_INFO @ 4242830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 113008347284913495032975862817668156124808191307644485516564204205471384298294 89
UVM_INFO @ 40156230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 62143788959672175247391591649973994669002564650847573758566889116442765072814 77
UVM_INFO @ 3118822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 20663646126666375463839616506833971732160399759733268143527385699240944482639 78
UVM_INFO @ 2962931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 101597583286892685006775713518184853549168391305204864422425567507800643765255 79
UVM_INFO @ 5145665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 16389571807019284408531515704793687479832595850439950755448650821719942113392 78
UVM_INFO @ 5594340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 27943441174742160139101544711164070489541843978066480055029781077833210791971 78
UVM_INFO @ 3617894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 9902858013014332764056589741182826814751627624334054903692383975138587999212 149
UVM_INFO @ 73120909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 45754986631947393596277843369201802520381059726379557774593149009093115093389 77
UVM_INFO @ 4311694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 101503004037272993295429792595092428479917488112950212674112213956679511771927 77
UVM_INFO @ 5301822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 41893728529067721808366058634797880977077326093694679347527645566374729348019 79
UVM_INFO @ 3708690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 46265964879261217895342458411227602793887373107779989400170594156245008767452 77
UVM_INFO @ 57386343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 75294129016702134065289971612391290440957256360796622894661084614407236354981 77
UVM_INFO @ 6454088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 45635064443467425406948606805536320093736463516489612617511316532721179435525 79
UVM_INFO @ 12784520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 76700817803420291114720345538866502484639567534274249803511976903033850791134 78
UVM_INFO @ 4893084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 70859146132207682603938563399188363823613710961706928309132965413795815187388 78
UVM_INFO @ 4274782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 77213054423294910817826377005589525191069878275262974367537615947508767868582 78
UVM_INFO @ 9178871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 57339443204154256789421586663096920910469063515243736583680708757236341383372 77
UVM_INFO @ 3106982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 62643332853244682730577541529430277050021931321939915898732687702161363369712 79
UVM_INFO @ 10002971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 30440990203401426204237799791983878666483806429200502575581738867844971142503 78
UVM_INFO @ 2083789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 36497089015649519370657278998259795014360482921471087788650692479165863070981 78
UVM_INFO @ 57785115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 33598945283013052918266432424451226554768102527967541570704991429874667525905 78
UVM_INFO @ 3807925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 21652537448168172550724411390638441740324371791963289159145175871016014713688 79
UVM_INFO @ 15118786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 84995913528435836794588205925225043049522299846879419120776915814553652918888 78
UVM_INFO @ 9246773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 56163217516013171904600216181637553809430682506771633153770352533698849056353 79
UVM_INFO @ 9545357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 86225092279921778118241656572478230339966684850337007147857558460723097130859 78
UVM_INFO @ 4733399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 12267372781083588270061298836207367960165138887244648489493815803375093277554 125
UVM_INFO @ 100414191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 9147922863498489728334423904642448997634039950183079880805481107538293956247 78
UVM_INFO @ 8176126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 25162931142397460678123301855078372215240395743662314668890976358033892584631 78
UVM_INFO @ 9917902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 9999928960441234585348101364443221781272565026912730343176876913318082958972 78
UVM_INFO @ 3917089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 108383849071856193513793983789040821405249496963158203011586804897661378524657 78
UVM_INFO @ 18714437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 89784916983345526236640754272751809514807250089280671501683817609622619294428 211
UVM_INFO @ 86048121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 91616137737899225699553251577482129360989166246371890243152585802425683455060 78
UVM_INFO @ 3162265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 98746560066698873640590943069847336239666044722049715483380445510684648885029 90
UVM_INFO @ 28966848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 105412273273791165001630637371862535358692996703150495633099952093355925191943 78
UVM_INFO @ 4252679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 63910113007324884254077043938400197061686876388148743322071386676208727646389 79
UVM_INFO @ 10111376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 31905199002891170226067846654910903011921308737770710632808772225656262739802 273
UVM_INFO @ 161905357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 20685116532293289977663288087623157256787140931303822313194330953395181228806 77
UVM_INFO @ 4217488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 65610941428459385166775298404981212982919328684860763711187720871383606108220 79
UVM_INFO @ 9061157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 101673525999542285174382648791738710574504373798438913354957024907477856283890 77
UVM_INFO @ 4634615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 12351796434911640074578442395564587065608615387599961672020096105987202361110 78
UVM_INFO @ 9028578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 75876748724995735850525348169986830510760031845577550987948135222793362466467 78
UVM_INFO @ 5182919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 26137508465544639481687098957957899324958998960284865072573884668856355467365 77
UVM_INFO @ 2394754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 13904282231215059753238975208792385570340875386367136134193568980058902738058 79
UVM_INFO @ 21166021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 85345718289232003992157807796945008813352104565480224423052878269141713709722 77
UVM_INFO @ 4127893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 103187227363192687245573640698905316979558156070037157217827663514281194675126 77
UVM_INFO @ 2952274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 107218083813906430511593586070015162455021297797203156704366428777422795108268 78
UVM_INFO @ 5976916 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 43280594790882422334313510890923167427326764339832709709735664956020014824315 85
UVM_INFO @ 41284639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 51519539319703141439057026272997370677028960105565378921208176415174533618100 78
UVM_INFO @ 8064753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 31687820514061913793511344679631939924809956024686641107626517395902064598773 115
UVM_INFO @ 54925775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 112802603912964705631719877573577411903900207578785018476913774915496992183697 77
UVM_INFO @ 3128880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 10641445287104687973325865097990249207961669732409337890182677504427085891824 78
UVM_INFO @ 1834963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 54800079844158241875459515155136346360992618023185168181078866236261782737198 79
UVM_INFO @ 3656410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 44058090053079813316860910402759916998448642494249688111580142711516078118377 78
UVM_INFO @ 3427179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 52097027944104504161602465535519159239028846841264390809621390520234567593737 78
UVM_INFO @ 6859183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 64060648026111506133621318576197995555183140574415756419601873833439198390264 122
UVM_INFO @ 51912492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.io_meas_ctrl_en
clkmgr_regwen 103261613443609550201433473696248730162606400144623365493415168416254071015218 74
UVM_INFO @ 8941186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 61175241579926433995556685450617586005824043811988941245010635132542948059346 74
UVM_INFO @ 7802635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 1861288563417732363167889948916152976793194233779630256170238979497183382932 74
UVM_INFO @ 2071014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 8787422792358134422829405684418157852885116261266586736652719675470107410802 74
UVM_INFO @ 13936313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 44426826228484233173149832615740839204970282153563306237072765606580624491377 74
UVM_INFO @ 11910095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 37836030547705395290650459387865914452870199741767538248772020282025161133032 74
UVM_INFO @ 5819285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 32658660104681373757061803362920359787989370338386754647652084608678322308234 74
UVM_INFO @ 6855333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 32657532301358868606399716153993457573896551109970558622483096799853089251394 74
UVM_INFO @ 4446179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 25427847140509031307150734531239385705338638634945762631716737963202859971513 74
UVM_INFO @ 2603973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 43968113828915745516097949281484472039795924669562213024963531145004235285124 74
UVM_INFO @ 5595012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 85318592865592182379397224010197701421998988707110028527639241342412826649281 74
UVM_INFO @ 18058800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 75595721488887272789889065571521062123718301094355535783054178880686175614544 74
UVM_INFO @ 3365167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 45465934545771029065188207316349504668980044793411902731323017664135683548791 74
UVM_INFO @ 10174082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 16879241322347930023268357355349938042369637490298431906009900947909673739628 74
UVM_INFO @ 7438852 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 101550857646459647847201335384402999621040175494917415299702835650421883021263 74
UVM_INFO @ 3462470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 21755440583249328374845734393156728317842732760249954306742423905130998879575 74
UVM_INFO @ 2362275 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 54850615464431306963465451897983112438383000390026158940919265648758656675776 74
UVM_INFO @ 20766239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 6155377806164333137396364280551823659553807778807628545517633490667827070721 74
UVM_INFO @ 3394156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 5751881531026858691729824784138958599052366361908228482413945338288641595386 74
UVM_INFO @ 10930289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 29432897727617576097095225916213758665855778233215186589549874512736277908126 74
UVM_INFO @ 8100620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 92488987257941043581292691226354189395724191551030265893033051382377370574813 74
UVM_INFO @ 3771494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 74997760958266461837884688884357256392917715924771810477131454735125731256368 74
UVM_INFO @ 3283701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 14105077615209010183116243166874052798814232828814529853806135362006833212585 74
UVM_INFO @ 7168581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 6292218072091939554138246545173571950508723259872228676614317119219647237847 74
UVM_INFO @ 4394879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 65293147223001865826778047536698079013872032791676055944244474254961764144835 74
UVM_INFO @ 3631813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 85197581053420931791147576410388212777101905731213253793070704306513462733444 74
UVM_INFO @ 6160028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 69915779478974386963576094721922644352064482838210823584027758722530074873361 74
UVM_INFO @ 43383394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 68493223611382062928169031659250551624752167861537092751077938132216532078644 74
UVM_INFO @ 6044615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 108176677002623142563794135760006163532518643274959782671285913597825165224746 74
UVM_INFO @ 10003813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 88571782523789584420865612083312921558116733020604030530701020280320142652129 74
UVM_INFO @ 6272215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 71090612478677164623702397053119223496266003680609195548109772351581987295734 74
UVM_INFO @ 2188825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 23968497404783286302389280276423001745813696087724645166180665114366499981688 74
UVM_INFO @ 8171427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 115216270301800160695363566065115799003278612859820100665879077534943648765548 74
UVM_INFO @ 3932874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: *
clkmgr_shadow_reg_errors_with_csr_rw 93735059965136283771620679565699405434637798890392526810496620773979192562645 75
UVM_INFO @ 7194371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_aliasing 38011304547461820727599799464765104027651948610235739985282796410347591458771 75
UVM_INFO @ 32032412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 101821962362846100784984829380524308314663008631339289732989424118937836989129 75
UVM_INFO @ 11088274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_aliasing 52725961110505181663560803439649979256625957719016757793144914644695110654489 75
UVM_INFO @ 6572511 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 93607511642121221075063639449867511318309034281431782427136990636894176617912 75
UVM_INFO @ 2580621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 31578111164585347012996234664545153648127861375445482341799866700684933691010 83
UVM_INFO @ 13634341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 87067804944532285182375534058792436100117045046023017539390259830225353419039 76
UVM_INFO @ 14065204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 31267840703034482803623179803250866245040436128271203141757435304835771882715 76
UVM_INFO @ 6242463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 24399130223768419025470815993872137187805007142162583475850818398512162143379 76
UVM_INFO @ 7542000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 33332390364059927418021368047686346671979608309017406124745208509533146094656 75
UVM_INFO @ 15320413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 74938355874497646937128444278602299255270010210812234093999700832810614894552 75
UVM_INFO @ 3911294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 60518817442262960093482315739363386494955815288316031580660231781632075947926 76
UVM_INFO @ 3614989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 53525129530536042520846976350644910552226744385759750278471892998349690767897 75
UVM_INFO @ 3201381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 21162638703199918886202676295405260922791202757410422926650004793565303465121 82
UVM_INFO @ 5873112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 2919974010573731363794148682425707092177690479720955186103969539697650521457 76
UVM_INFO @ 13441129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 63994412760728055380975441531657084127941154621023095652519349696327008797807 76
UVM_INFO @ 3388323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 104912648699712663420165994797122091013252729905148894807542404991077069406604 76
UVM_INFO @ 32117647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 106572079551490221876245211388416913085065881868780819715963312765971091163479 75
UVM_INFO @ 15879387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 24912184389117304700746583214846993339900780429738960130890844870666672481286 82
UVM_INFO @ 2311093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 45598933307893215406576446323657521806740082788102463166277279149702248527675 82
UVM_INFO @ 83848492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 70535129044495918023167496691201388287976055385707929974972073199299580585365 76
UVM_INFO @ 6469937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 30330810161429679989927554069463325263140213364228559487480638635891653018135 75
UVM_INFO @ 6428179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 65023403798247835628603855778364323985287885888057758334894445601551444559222 98
UVM_INFO @ 17626468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 178247003120558101209553656593199484080736410852110231353202089103873569301 153
UVM_INFO @ 117029552 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 60000414619367893109776998294265591037948016887584919043668488064152300858266 75
UVM_INFO @ 11738151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 39346012681667686905041677300543862635948084781475142867872769819781738472654 82
UVM_INFO @ 2013268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 80510570827657241068031892699174699086822802162988579258899917687843464151653 75
UVM_INFO @ 4222016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 112614249074418864837512550011966351079802389410117145762072653366130076749919 75
UVM_INFO @ 3191878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 36447557407635407832804284864717922052511554858777212431278458157778403746729 83
UVM_INFO @ 20690588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 113815404844806286959179063111413471428467678984203230039347709453793336835784 82
UVM_INFO @ 20155714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 104701511597066004441666084205605120024886105071059539832754064618222299258437 75
UVM_INFO @ 6051144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 92821804848245124193131573334012311643630764182310758825984827438852197227955 75
UVM_INFO @ 4320147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 36020037199398083174118794224712662024093222557742853645125958303912627209507 75
UVM_INFO @ 5655656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 46846400751175957417985083412917692401146106594811947004216453781171891788731 75
UVM_INFO @ 6460610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 26792598400594339691258963216590109580231142483760354650290448439900699556517 96
UVM_INFO @ 10419705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 112687542281844607382956978826117603437891827893643215766347786395882601154399 75
UVM_INFO @ 3385598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 22654302861846718326745601428519824779384905370195819430228302106434091975838 76
UVM_INFO @ 39884107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 83479480917913984683815604265628658364076509219325091032427529336307323446276 75
UVM_INFO @ 3712047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 54432656885305932409142574503237449959997755602194983146259845639087607199397 76
UVM_INFO @ 7156144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value: *
clkmgr_tl_intg_err 27872117725398420633273893930853382137356290431377077061249679729819915638177 78
UVM_INFO @ 13012211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 106994368300186551121403926578099098372082074215283156348128698563573343612746 85
UVM_INFO @ 20648931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 7403668591750006131562045955501995096489436521024253610385692154058722182601 75
UVM_INFO @ 7687826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 103618027249354078954703738143886361756557531014298387260980408914128640849132 75
UVM_INFO @ 2130407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 41880534910926508459075539809580830719731162655532316457674412574331449843935 90
UVM_INFO @ 11239566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 13920690046031520312219629373718500530150607568698234858489141680898030774814 75
UVM_INFO @ 45578116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 42350791680713536149553070529122492422339872132689855777349702219215212303094 112
UVM_INFO @ 46783643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 97476563466571356100248058694734538521593880204562056610169073407722437172766 75
UVM_INFO @ 3314428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 34243695159335306553789572896178582466999744676427604000290702048794206532723 75
UVM_INFO @ 5654625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 66579929356119525415091371374059301231038791515910853794328730097387216559130 75
UVM_INFO @ 3404228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 110595830466541231405142460046535055858411759011954711343340076697450097263033 75
UVM_INFO @ 1571089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 115452162860001849130105308237894775228493521732274303527524707271548183179753 75
UVM_INFO @ 10415900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 110628530340512622182138982269990908272079182661070865215427269796895787200417 76
UVM_INFO @ 13236148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 59720741467419697721163130749986714983150352850330365545494458131969913616825 75
UVM_INFO @ 8936747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 85284760627487950844701626056042846196851317449812452160150590661416473558682 75
UVM_INFO @ 3123885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 76048567561134817509093337999279951516525074075965826919413829541938936992917 78
UVM_INFO @ 6868426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 74519064751199170613492744812504824639573350071527777510367310237696266728722 76
UVM_INFO @ 12147273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 45362827183586242828707442894840800886104400999501273344833365370834813295246 86
UVM_INFO @ 6198787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 47639875345043378537135276612598424973692383113463123500113074214580135458982 75
UVM_INFO @ 5979542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 82736041444069153354582087694033988155894615648859331067964515630230917740916 82
UVM_INFO @ 72987829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 78877967053596386146106798835784699862315985691963480525879700096821226046814 76
UVM_INFO @ 7532220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 112880535726748305439456410203505220179070419036373616462250992703388073464105 75
UVM_INFO @ 5024581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 16847602437004513804625116784554584818673812651547017214045480577971839110710 83
UVM_INFO @ 17239164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 39942557836218934570216960319245677985787403221301101654509009703460132465857 75
UVM_INFO @ 27686791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 89071584296444418934491258170213559586277425517385562607430994527554498946886 78
UVM_INFO @ 7445936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 15046004315000602480089258861533195340376158570501503288318953034800604615395 75
UVM_INFO @ 5141060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 66384846412901654686693507712379206718733289942538384174187683896423194715606 93
UVM_INFO @ 7715534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 85276455132581606795634675340606789559823838651699541988423202017454023082826 76
UVM_INFO @ 6925912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 104933521066361833093734649775631160379341039809082257285210159532981763165466 76
UVM_INFO @ 11172234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: * Wrote clkmgr_reg_block.measure_ctrl_regwen[*]: *
clkmgr_csr_bit_bash 33547773592282242091496021234647357505267564001678180497826083818459673745846 75
UVM_INFO @ 23898994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 80213093804353559695571275481023843997399397989888885316806278687545804347118 75
UVM_INFO @ 386252037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 77951587232868780551296210261934270672040497996599143990318933065577462779627 75
UVM_INFO @ 21823218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 28417024465566859302949313226112778993328146238223241802670956690608883236132 75
UVM_INFO @ 70510233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 45707576508278157247235914093833361092024970861978434121934115666329661828250 75
UVM_INFO @ 2275315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:649) [clkmgr_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
clkmgr_same_csr_outstanding 79170123826488404912557256700316689637381919454535871120527025482664507580010 75
UVM_INFO @ 9214025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 56482925162018493343171084043621572964770579988653475305602972298071168489607 75
UVM_INFO @ 1488937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 22407290151739798280296188603634144457751705292185955729217711032659734599597 75
UVM_INFO @ 5128734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 32426625513083257337855324216223323121446693956791238966893486225164558455930 75
UVM_INFO @ 13902848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 69116884995943501618118996403129844501412312043684702356222127877273448034977 75
UVM_INFO @ 2773529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 72562614765879144975877624465993028818396392153926955506889400413266493703469 75
UVM_INFO @ 3797531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 27379131611219972748903704686232528537509746361403995619657728473319260773396 75
UVM_INFO @ 9162091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 72495456125180792603269012129054737814852952151643154024935538735769645722660 75
UVM_INFO @ 23126356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 34493308227338237732246198084960929005101865565502797746603610636897449183820 75
UVM_INFO @ 16887162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 8887852938847661528862390621916900802930835007859539584603427224712870919045 76
UVM_INFO @ 9707849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 61297832710144049089460497679940638030123941436672787488755581057469568205933 75
UVM_INFO @ 3371033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 14202458054839805704637366701372988883339053969405430258731931805874867085478 75
UVM_INFO @ 14828377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 105811990572717819083640146557303737267234616515118120161566515549964305960118 75
UVM_INFO @ 40360925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 16780690613774006682059636143163466046716508613808388708821616968147551612656 75
UVM_INFO @ 173975605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 107604552891465826851580878395953184969887576494928412081351228897798922543746 75
UVM_INFO @ 3599135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 28983451625374861793527476443202980093588881685284294303776778033744456341533 75
UVM_INFO @ 5966409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 7622928304478517156510223386918008832323795827996943530698385257062260850629 75
UVM_INFO @ 9732626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [clkmgr_common_vseq] expect alert:fatal_fault to fire
clkmgr_sec_cm 106483506190699116883546949330186557121697369644704021778929854424277805848533 115
UVM_INFO @ 92429398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_sec_cm 102531868916438891342537829633136224040664540980769894557596429469749140226930 81
UVM_INFO @ 9490407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.io_meas_ctrl_shadowed
clkmgr_regwen 63026984187491178277599845705872174506222009873692777996247333857456619557210 74
UVM_INFO @ 4152684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 77778727726157298136873964722727163334459430123553090539232981608321528995917 74
UVM_INFO @ 7100469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 105817041607935442030073323084187231400275394086935412693527144281371712266918 74
UVM_INFO @ 5558802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 45665821182557774690280964670030810218313471008685019972082123488750728385358 74
UVM_INFO @ 5927027 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 49102657086523988040393638024043707823089064675954721194616103322489361972348 74
UVM_INFO @ 3139942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 4597121410306411476078427699285492307739913007379061378763513686213946370441 74
UVM_INFO @ 4425068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 50584722852171705356199969696710391072837152946967914770044974658891621882109 74
UVM_INFO @ 18900296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 85439146898365539723242853393571821521950867546675487130716816381919916607262 74
UVM_INFO @ 4193491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 20021141897825094098294865351095485293704205071535423019046388338023071447348 74
UVM_INFO @ 3708794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 41569256513989624743168631309430627946809489267147463899515732315755882471115 74
UVM_INFO @ 4087724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 69064416299481601528277748029897603020444453987928339577454640952150758503278 74
UVM_INFO @ 3862211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 58822573746872339305950314530402435415136709462830518700760838473747437926795 74
UVM_INFO @ 12163953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.main_meas_ctrl_en
clkmgr_regwen 55448886545278709908035594379484599032615599723193996166065711446267074484037 74
UVM_INFO @ 15832024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 107738103362840512689316195446925062146813398467201151520975608434466427155649 74
UVM_INFO @ 3773581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 29162926681756569753054475435641438115333543594679835340681483304169434174166 74
UVM_INFO @ 4595052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 54930548470160869812101812130514347497411834279705326712419569473253505353038 74
UVM_INFO @ 11607920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---