| V1 |
|
100.00% |
| V2 |
|
98.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 50 | 50 | 100.00 | |||
| xbar_smoke | 21.640s | 525.468us | 50 | 50 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 50 | 50 | 100.00 | |||
| xbar_random | 259.500s | 27577.854us | 50 | 50 | 100.00 | |
| xbar_random_delay | 296 | 300 | 98.67 | |||
| xbar_smoke_zero_delays | 7.720s | 87.255us | 50 | 50 | 100.00 | |
| xbar_smoke_large_delays | 380.050s | 31407.174us | 50 | 50 | 100.00 | |
| xbar_smoke_slow_rsp | 419.790s | 23916.947us | 50 | 50 | 100.00 | |
| xbar_random_zero_delays | 88.250s | 757.067us | 50 | 50 | 100.00 | |
| xbar_random_large_delays | 1641.570s | 132031.275us | 48 | 50 | 96.00 | |
| xbar_random_slow_rsp | 2561.010s | 200977.434us | 48 | 50 | 96.00 | |
| xbar_unmapped_address | 100 | 100 | 100.00 | |||
| xbar_unmapped_addr | 157.490s | 20069.786us | 50 | 50 | 100.00 | |
| xbar_error_and_unmapped_addr | 124.580s | 2619.887us | 50 | 50 | 100.00 | |
| xbar_error_cases | 100 | 100 | 100.00 | |||
| xbar_error_random | 242.660s | 10917.715us | 50 | 50 | 100.00 | |
| xbar_error_and_unmapped_addr | 124.580s | 2619.887us | 50 | 50 | 100.00 | |
| xbar_all_access_same_device | 87 | 100 | 87.00 | |||
| xbar_access_same_device | 355.190s | 15322.150us | 50 | 50 | 100.00 | |
| xbar_access_same_device_slow_rsp | 3558.210s | 600000.000us | 37 | 50 | 74.00 | |
| xbar_all_hosts_use_same_source_id | 50 | 50 | 100.00 | |||
| xbar_same_source | 164.200s | 6572.005us | 50 | 50 | 100.00 | |
| xbar_stress_all | 100 | 100 | 100.00 | |||
| xbar_stress_all | 1706.330s | 60582.594us | 50 | 50 | 100.00 | |
| xbar_stress_all_with_error | 1455.620s | 60313.412us | 50 | 50 | 100.00 | |
| xbar_stress_with_reset | 100 | 100 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 1390.770s | 12500.320us | 50 | 50 | 100.00 | |
| xbar_stress_all_with_reset_error | 1360.630s | 16752.122us | 50 | 50 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | ||||
| xbar_random_large_delays | 43931160360837542931364671101310645779029352840401896793239754461082013165174 | 194 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 30357102076988873494619104148874339949600499625298499261127326339545492243357 | 107 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 67549692512025666399744881212018227969803455050982883755166567948372733624279 | 132 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 35157241016518364016956826846132276939368794307763997425328611479896847403796 | 125 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 107704930871981793878877734542406542939294430884805636217372679951982986993615 | 182 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 103217715745135681276181335314811876071990877172797233775203990566331277517001 | 107 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 81530113538090301072683936383160887598944826480109041414910824001643481597107 | 217 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 111175787507214203425451966794425512354654715155625838951757200650647218716274 | 135 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 58256609772871375613652432137190780599809616853255080798899441758642932568464 | 122 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 28502964837395449273977937819316110925377052470233290775051885929566340312387 | 137 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 101175919257519728063956237631687266856391274667663699873389782716283594321556 | 197 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 107232173951545664008309468091712322825885498498168773449217101339833308254541 | 139 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_large_delays | 63593535133183067513297327863287574224361421806389602346605638585496597821325 | 196 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 48534404388773650279506893172840526136795452082816775220982478059030117678331 | 122 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job killed! | ||||
| xbar_access_same_device_slow_rsp | 91616148484127189374516150958498916538979948523478621892549101237251748955011 | None | ||
| xbar_access_same_device_slow_rsp | 79943165127497668985432657039416498260346650359312165345001157358479228542634 | None | ||
| xbar_access_same_device_slow_rsp | 5987485900188226257991990663084400555179397077733131046242002528551273075340 | None | ||