Simulation Results: gpio

 
17/04/2026 17:04:56 DVSim: v1.17.3 sha: 68d4457 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.48 %
  • code
  • 92.61 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.38 %
  • cond
  • 95.61 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
99.22%
V2
92.54%
V2S
92.00%
V3
34.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.400s 305.242us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.460s 81.426us 50 50 100.00
gpio_smoke_en_cdc_prim 1.370s 310.188us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.300s 302.257us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.950s 28.313us 5 5 100.00
csr_rw 19 20 95.00
gpio_csr_rw 0.910s 52.684us 19 20 95.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 6.880s 4040.281us 5 5 100.00
csr_aliasing 4 5 80.00
gpio_csr_aliasing 1.770s 82.524us 4 5 80.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.470s 32.203us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 23 25 92.00
gpio_csr_rw 0.910s 52.684us 19 20 95.00
gpio_csr_aliasing 1.770s 82.524us 4 5 80.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.340s 77.249us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.270s 487.243us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.100s 32.385us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.430s 196.830us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 2.970s 461.871us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 3.040s 185.206us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 19.900s 2919.142us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 5.110s 2105.025us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.130s 116.007us 50 50 100.00
stress_all 5 50 10.00
gpio_stress_all 77.020s 13064.035us 5 50 10.00
alert_test 50 50 100.00
gpio_alert_test 0.820s 13.015us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.820s 16.572us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.930s 983.289us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.930s 983.289us 20 20 100.00
tl_d_outstanding_access 45 50 90.00
gpio_csr_rw 0.910s 52.684us 19 20 95.00
gpio_same_csr_outstanding 1.390s 85.158us 17 20 85.00
gpio_csr_aliasing 1.770s 82.524us 4 5 80.00
gpio_csr_hw_reset 0.950s 28.313us 5 5 100.00
tl_d_partial_access 45 50 90.00
gpio_csr_rw 0.910s 52.684us 19 20 95.00
gpio_same_csr_outstanding 1.390s 85.158us 17 20 85.00
gpio_csr_aliasing 1.770s 82.524us 4 5 80.00
gpio_csr_hw_reset 0.950s 28.313us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 23 25 92.00
gpio_sec_cm 1.080s 89.496us 5 5 100.00
gpio_tl_intg_err 2.470s 870.424us 18 20 90.00
sec_cm_bus_integrity 18 20 90.00
gpio_tl_intg_err 2.470s 870.424us 18 20 90.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 34 50 68.00
gpio_rand_straps 0.780s 22.710us 34 50 68.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 15.590s 544.593us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.810s 15.307us 50 50 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 99589186628271692362005413724719328097706401451296716088995807355876081013933 1410
UVM_ERROR @ 32103747055 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2485389433 [0x94240879])
UVM_INFO @ 32103747055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 101740739421223666392735150791354393243275431638594507113964467653677352433457 80
UVM_ERROR @ 677815715 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3895988115 [0xe8380f93])
UVM_INFO @ 677815715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 87884157415206582836182854551999057498395838363532828155565553722574569563612 587
UVM_ERROR @ 5315737260 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1440759090 [0x55e03d32])
UVM_INFO @ 5315737260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 30363715308971071382060471715630454301847184851015257052295538989643894325317 75
UVM_ERROR @ 1060433 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 474988905 [0x1c4fc169])
UVM_INFO @ 1060433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 39743950465164862076581619206125184598757395745015343159868102301417121126518 627
UVM_ERROR @ 1407463094 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1466832974 [0x576e184e])
UVM_INFO @ 1407463094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 24973497980993891873948492148957694631358673240594961682626645937851684243439 304
UVM_ERROR @ 2196902713 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3015499405 [0xb3bcde8d] vs 2573054019 [0x995db043])
UVM_INFO @ 2196902713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 43658687417506334925990653478380063494055084055907032842547279486573435671635 75
UVM_ERROR @ 2180899 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1538339083 [0x5bb1310b])
UVM_INFO @ 2180899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 28517824861585599247080507598846674884989018952397943183154102411125000062583 76
UVM_ERROR @ 3539630 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1455527509 [0x56c19655])
UVM_INFO @ 3539630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 55728758878476793049598381936239892296384980911824435911915996739784130563325 256
UVM_ERROR @ 1914261779 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3191675249 [0xbe3d1971] vs 636004987 [0x25e8aa7b])
UVM_INFO @ 1914261779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 56045511914997089010979456169695049015898440611541371808323732972676227691263 75
UVM_ERROR @ 4978681 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 510901099 [0x1e73bb6b])
UVM_INFO @ 4978681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 2066228146396689648394990193595799555993613986120981055455828210514514068575 278
UVM_ERROR @ 163044401 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 401226227 [0x17ea39f3])
UVM_INFO @ 163044401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 88177756091285463653909355305089552152816453294846427557719426576510457693171 279
UVM_ERROR @ 3047035317 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 398115679 [0x17bac35f])
UVM_INFO @ 3047035317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 96838772762363128959066092815440918582818324330136926187395258754991330083354 810
UVM_ERROR @ 26143139968 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 744844777 [0x2c656de9])
UVM_INFO @ 26143139968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 53224054579382406401530145681348571726359473008440720015505298431202185194610 3429
UVM_ERROR @ 13064035155 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (482625260 [0x1cc446ec] vs 1107340757 [0x4200add5])
UVM_INFO @ 13064035155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 89366929094770951450573785250130747172167760685871238770969416848940696785334 388
UVM_ERROR @ 8951433363 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2859651810 [0xaa72d2e2])
UVM_INFO @ 8951433363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 106087882904488184930462931529868579077230000042862780807826858738999127296980 75
UVM_ERROR @ 5592341 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 155554200 [0x9459198])
UVM_INFO @ 5592341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 99141126273698931486610100215491447581534786366618367345833574848427803914263 448
UVM_ERROR @ 3254274155 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3448001778 [0xcd8454f2])
UVM_INFO @ 3254274155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 50168692654442919486755231625713247988697457727019608869170175822006568726852 75
UVM_ERROR @ 1950571 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1356221990 [0x50d64e26])
UVM_INFO @ 1950571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 57426029467646773540836164968349724831925335172001836933246614464347953800304 75
UVM_ERROR @ 1175582 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 880312757 [0x347881b5])
UVM_INFO @ 1175582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 81241534424384641811645779009433885942565720401414442844543432711983320508347 1086
UVM_ERROR @ 9260113032 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4094905178 [0xf4134b5a] vs 3792659288 [0xe20f6358])
UVM_INFO @ 9260113032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 41512298505423581769065466073969213576509957784364489575257678297682055621865 77
UVM_ERROR @ 757678782 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2269336221 [0x8743529d] vs 2492009586 [0x94890c72])
UVM_INFO @ 757678782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 63227351001957044811550840126857611681071277567070992342356632953948502774378 78
UVM_ERROR @ 377476892 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3092911370 [0xb85a150a])
UVM_INFO @ 377476892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 7615856074150986164133884981201835739799627848738910231946261070531516232505 462
UVM_ERROR @ 763600521 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3841537810 [0xe4f93712] vs 4045193377 [0xf11cc0a1])
UVM_INFO @ 763600521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 22776044040596706685847674655151061820819580774597812859855163547397104351497 807
UVM_ERROR @ 2513299965 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 776059239 [0x2e41b967])
UVM_INFO @ 2513299965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 3487103115760632537564221943527497547168933625801521251885707057844901622605 634
UVM_ERROR @ 1670420269 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3223674495 [0xc0255e7f])
UVM_INFO @ 1670420269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 26724661993968604717033896552433561494907732105272774445766582446896525915313 75
UVM_ERROR @ 1558293 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3947042503 [0xeb4316c7])
UVM_INFO @ 1558293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 67246965496130083389088695019635179913665528947871429759368798498714481915979 500
UVM_ERROR @ 9219559202 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1616711142 [0x605d0de6])
UVM_INFO @ 9219559202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 44640125555370941096526187280071841338336823548182073462784714491976655591005 1209
UVM_ERROR @ 5916579110 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2559280265 [0x988b8489] vs 1903079490 [0x716eb042])
UVM_INFO @ 5916579110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 74526232627701091472603102693357683858017507958847030903258987025470020781210 616
UVM_ERROR @ 908097952 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1510232046 [0x5a044fee])
UVM_INFO @ 908097952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 14356117156573069156377636040060590665277651869012786609432489261844556774298 75
UVM_ERROR @ 799000 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 423746253 [0x1941dacd])
UVM_INFO @ 799000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 11600010679449281620807089667068207716826068836032928778100035609498172206506 328
UVM_ERROR @ 2604858194 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1952615567 [0x74628c8f])
UVM_INFO @ 2604858194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 2409953783514387906463037079528320599603320746617964261259614332437291196959 75
UVM_ERROR @ 1210595 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3672931426 [0xdaec7c62])
UVM_INFO @ 1210595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 104420565439863259823026392680594813655281263629768397458606852726970690297188 1022
UVM_ERROR @ 17707705148 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3548311094 [0xd37eee36])
UVM_INFO @ 17707705148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 87428026715675068713605000278649593685616689765836863308853307595280772088354 75
UVM_ERROR @ 6250894 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3544559691 [0xd345b04b])
UVM_INFO @ 6250894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 49187915125353264146492153972790302555310309266215921034971233713101376674890 1141
UVM_ERROR @ 3192231482 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 509487439 [0x1e5e294f])
UVM_INFO @ 3192231482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 43523486775001985222453966222467618068751716064615164885527300890995135580085 75
UVM_ERROR @ 4948066 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3858956074 [0xe602ff2a])
UVM_INFO @ 4948066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 107266620569301889638194101898701604091204987101678419479374264776844726816533 327
UVM_ERROR @ 1541123363 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3600192330 [0xd696934a])
UVM_INFO @ 1541123363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92662695297347388087497203777350311752715094540294528285800440012802453441932 410
UVM_ERROR @ 4246012159 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (121634356 [0x73ffe34] vs 3061392278 [0xb6792396])
UVM_INFO @ 4246012159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 64413559237566713647738757195774782733205385172764061156334396940238796314882 75
UVM_ERROR @ 3093561 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4282087687 [0xff3b7907])
UVM_INFO @ 3093561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 41227003959780024730434482111906923059122887661538042869671001901204038804309 854
UVM_ERROR @ 2084050874 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (116960878 [0x6f8ae6e] vs 2752382504 [0xa40e0628])
UVM_INFO @ 2084050874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 109292087464986882782395144500679574106753888925397441668793923814311991494073 78
UVM_ERROR @ 577643201 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2767135078 [0xa4ef2166])
UVM_INFO @ 577643201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 107881871807904940124187638028230151661641811626493794656389994342530329031892 684
UVM_ERROR @ 5836943989 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1473885779 [0x57d9b653] vs 9245548 [0x8d136c])
UVM_INFO @ 5836943989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 52945421435475625337957781670253376768418857501186370952945652986715395062111 374
UVM_ERROR @ 1732872499 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2624834666 [0x9c73cc6a] vs 2373372436 [0x8d76ca14])
UVM_INFO @ 1732872499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 108350649145500925971385604010886464263355719276631268332774014302770354831600 645
UVM_ERROR @ 7241758943 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3658024139 [0xda0904cb])
UVM_INFO @ 7241758943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 93264322574989453740610022896726857655688029233110398705171926599244472450134 75
UVM_ERROR @ 1808023 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 651500487 [0x26d51bc7])
UVM_INFO @ 1808023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 38784991665303116106352561022341293731365470286885336608959313081424278124047 75
UVM_ERROR @ 4617346 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 896312381 [0x356ca43d])
UVM_INFO @ 4617346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 76082583372731102890369209896580463811345180051699643096199092845218500436722 77
UVM_ERROR @ 432377846 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1855432220 [0x6e97a61c] vs 2496225937 [0x94c96291])
UVM_INFO @ 432377846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 37244812830649218222092646815658349654851454240577184088307159923942081929205 628
UVM_ERROR @ 20506364460 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4160676715 [0xf7fee36b])
UVM_INFO @ 20506364460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 67718477390936303217051441021122482564425993976057283036619345615718168585892 781
UVM_ERROR @ 9698967071 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3735581089 [0xdea871a1] vs 2588165484 [0x9a44456c])
UVM_INFO @ 9698967071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 8431069889769872889173525972724320184788416240679732211787350469286548001640 250
UVM_ERROR @ 464446425 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1581853068 [0x5e49298c])
UVM_INFO @ 464446425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 99598829789891311616868827756091849781406012089122626077799740507027383349081 75
UVM_ERROR @ 1076246 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2482394415 [0x93f6552f])
UVM_INFO @ 1076246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 61620172611307582916249802512620713305281972087949660346980374903820703182360 2098
UVM_ERROR @ 6341343888 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1299502302 [0x4d74d4de] vs 3213154504 [0xbf84d8c8])
UVM_INFO @ 6341343888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 32998717778309377139931064354536691236263630247463657865392942777125819122167 75
UVM_ERROR @ 2732943 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2386980614 [0x8e466f06])
UVM_INFO @ 2732943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 69556396319352560823114136049178370944438023427522238596729068992257496698602 480
UVM_ERROR @ 5951229974 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1214180616 [0x485eed08] vs 12776470 [0xc2f416])
UVM_INFO @ 5951229974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 60787947002226769214163903949063453164879545641769465422212689584449999547244 121
UVM_ERROR @ 1804050155 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1630544250 [0x6130217a] vs 3871408391 [0xe6c10107])
UVM_INFO @ 1804050155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35844981855252889267241785367850338482471948208605327950681298721600020121402 755
UVM_ERROR @ 2067944161 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3458080515 [0xce1e1f03])
UVM_INFO @ 2067944161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 62386267355086600020530825592747329539057475762829998746556694357586719468491 497
UVM_ERROR @ 1236415369 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 151124155 [0x901f8bb])
UVM_INFO @ 1236415369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 102822678116243904637808967230617642947023545003443963521157851413772946309340 330
UVM_ERROR @ 2254097434 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3131147781 [0xbaa18605])
UVM_INFO @ 2254097434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 93385949161153711958002700882121697486746547889439722177943198022318064681378 1748
UVM_ERROR @ 14123378150 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2632613851 [0x9cea7fdb] vs 408682929 [0x185c01b1])
UVM_INFO @ 14123378150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 15307111613477085036528632384654002092663090031551384380511653063517801599403 185
UVM_ERROR @ 3698825209 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (302578850 [0x1208fca2] vs 783330488 [0x2eb0acb8])
UVM_INFO @ 3698825209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35406250489404512147456112962766724900486438998369295468921561134312767779975 77
UVM_ERROR @ 328949771 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4173892984 [0xf8c88d78])
UVM_INFO @ 328949771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 30355694366414517850570080285315841912602401129193988428580957302413312289181 80
UVM_FATAL @ 2600539 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2600539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 111436528161042286278106388728733672672942436155671897276249272637507583356975 503
UVM_FATAL @ 1029452819 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1029452819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 84056630305981004759094264725079369379873228589871282966964638160784055910547 80
UVM_FATAL @ 10263471 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 10263471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 70467580828770933222322174473722371305070547820111855411988673062821003061116 80
UVM_FATAL @ 16559322 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 16559322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 60339017125436065271898153924204039783156961297759814119486802643456249608941 80
UVM_FATAL @ 2500590 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2500590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 81753314842533522955480789364107847244406628324756611955896938985092126464140 80
UVM_FATAL @ 10059173 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 10059173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 93071260871169429663285359765334620798922952518695105617609271031970139866015 84
UVM_FATAL @ 596478718 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 596478718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 96359167372302272085765879173247839213709275600791582197107922940199728982959 88
UVM_FATAL @ 340154846 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 340154846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 15437392324699246058032414047507398069631463425018294764150980836989217775791 94
UVM_FATAL @ 313940931 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 313940931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45783968111624600643226485629157161676612142092547130906513115131708960868442 82
UVM_FATAL @ 1112289851 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1112289851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101973331442176387173643496117153160712410587286542269940658204908416828000291 80
UVM_FATAL @ 4582615 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4582615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 87471131796419900402222819840015328862663757222614595046170895120531161740335 154
UVM_FATAL @ 577736692 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 577736692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16470650984492850933823494057966992822297395363869840964188885265090883068322 80
UVM_FATAL @ 35063256 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 35063256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 103347128441468043737552424248419564622067594131595125492409072636629300267568 80
UVM_FATAL @ 33538087 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 33538087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77046781967108567040305916367451700244644672617727433454283281809989889879050 80
UVM_FATAL @ 7316362 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 7316362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40166245174689281961220248950476280968249448006410371425323736259962915687911 81
UVM_FATAL @ 524813603 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 524813603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 30490003147227826685019213509059136775567862672460159304723331005110314804606 80
UVM_FATAL @ 9914921 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 9914921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 29221883778509217073917719818846046038946803970662219204530491691845334086742 83
UVM_FATAL @ 506354732 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 506354732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 84139870033847635931756501656044684569285105159146014207523770659761880986924 80
UVM_FATAL @ 37998489 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 37998489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 93883265715010510775565985255168098053840955099424736364605946031871998346887 80
UVM_FATAL @ 13089633 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 13089633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 28271297521562075248952598179666253430153620885037880878798270895681385101339 81
UVM_FATAL @ 54869306 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 54869306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 5679668089103302240729070907288218853315679631348249292110470187671269008148 80
UVM_FATAL @ 18008889 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 18008889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 1914039080992520282496488295923642487385987511839714926127601864886867760749 80
UVM_FATAL @ 953965 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 953965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 33385885556177596113271464568983025983934192668105720780450585366919180548980 541
UVM_FATAL @ 544592847 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 544592847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 105352054853400120525277418300978082519345058133556627797288305636332091217490 80
UVM_FATAL @ 3723666 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3723666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 106050644434390171736020300703634042029001023571546892595797330007118647618637 80
UVM_FATAL @ 3534125 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3534125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*
gpio_stress_all_with_rand_reset 109961166819209618682659178407677940185402092705718720923759876496543636324422 78
UVM_FATAL @ 1630014 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1630014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 80111385608376536699470034665560712687388256330568381788489016314278067522105 79
UVM_FATAL @ 610518175 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 610518175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 74464816853852606164278263005572502215173342835129852453283307795718661362662 79
UVM_FATAL @ 327358388 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 327358388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 28889483175669941382894653554595530498007201092466331598314133214544721743010 195
UVM_FATAL @ 270980938 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 270980938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27106449867893879185453740262005636146173938771934923086077571145552874051336 78
UVM_FATAL @ 1487620 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1487620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44952608886065354306585648789856239076259449701489643245884524121047069736760 322
UVM_FATAL @ 209100081 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 209100081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 110017740627492372132984895612826133157197001142748295296558526167609428190179 79
UVM_FATAL @ 1309678198 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1309678198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 110870836824103872042883072494825796503488453058867355021728512219229350692283 162
UVM_FATAL @ 392455902 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 392455902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 74200849547789940780446358069002358484149007225312214397265309038641858856416 78
UVM_FATAL @ 6337234 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 6337234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 90318019326895551181222958147907178012686292378056198056926340467849544312867 313
UVM_FATAL @ 163713617 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 163713617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 85875414431923299645739213206503772250278555329711953826507097988550566842020 82
UVM_FATAL @ 269269203 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 269269203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 110483477796088072164261307188286437392797936412823240692592596379390478858920 198
UVM_FATAL @ 716389387 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 716389387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 96417136044061190759119792860440798507074173579756793117939309573163842486939 80
UVM_FATAL @ 1835046 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1835046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 114398049540206064752892972947157809333239228615882534067572653995567956961602 83
UVM_FATAL @ 1416406461 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1416406461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 63833727781514563534489974709442726148731994568063704906933159055085972763345 79
UVM_FATAL @ 241215490 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 241215490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 93637480453656213946253086585983643289617665886394094222353583958967143493512 78
UVM_FATAL @ 2016749 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 2016749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 5486839242323898599582066285033672346771889659710509302753604203845834896735 80
UVM_FATAL @ 30214394 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 30214394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 84095296855188845072933934073120848779952974858392766529165621595289937231869 78
UVM_FATAL @ 1691328 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1691328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101816043999002729453891905146344123049750366125787485023535703762217171209152 78
UVM_FATAL @ 1573163 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1573163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 98806037891914956808705992970425011517462850872317637456875039688162242422533 78
UVM_FATAL @ 71630463 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 71630463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 106423703249306539679365228504725654510851447106353600985878991253751921305403 78
UVM_FATAL @ 137124068 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 137124068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 42728040993517548260542629118450029460443701950721698499441177903684017608838 80
UVM_FATAL @ 274235809 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 274235809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 31436652892021571640311134631894503915417143637825783560251687681429186020982 80
UVM_FATAL @ 422329486 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 422329486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 102932940781890188006420968457001671981305467669740672312198444988808547666737 78
UVM_FATAL @ 3138646 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 3138646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_*.enable reset value: *
gpio_tl_intg_err 72537721159451657042992182044473631638815649398296034810225202570437277927694 208
UVM_ERROR @ 291595207 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_7.enable reset value: 0x0
UVM_INFO @ 291595207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_tl_intg_err 65531846926892769406631616424960857991505068258774965668021560056843070089135 100
UVM_ERROR @ 18934132 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_6.enable reset value: 0x0
UVM_INFO @ 18934132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_* reset value: *
gpio_csr_aliasing 32845991913767755352913886351032413877147019250671849979434677450174564517028 78
UVM_ERROR @ 82523902 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (87 [0x57] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_0 reset value: 0x0
UVM_INFO @ 82523902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_* reset value: *
gpio_csr_rw 100077669780756873428427970434844623282041332343588443003995737072665123038870 77
UVM_ERROR @ 12289283 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (5315588 [0x511c04] vs 5315589 [0x511c05]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_6 reset value: 0x4
UVM_INFO @ 12289283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:649) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 76794834965784325109773640914461322719521058294588778492037141494690406278036 77
UVM_ERROR @ 21070346 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0xbe0f4c7c read out mismatch
UVM_INFO @ 21070346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 23028560601117785742816274704397143226398892180406016979279840939934899601460 77
UVM_ERROR @ 38996817 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x8f4db674 read out mismatch
UVM_INFO @ 38996817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 29382362899079045740881197692750197608350999375685818613735739547726410623301 78
UVM_ERROR @ 152221753 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (10599680 [0xa1bd00] vs 10599681 [0xa1bd01]) addr 0x26cac85c read out mismatch
UVM_INFO @ 152221753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---