Simulation Results: keymgr_dpe

 
18/04/2026 10:17:21 DVSim: v1.17.3 sha: 75f7d2f json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 66.37 %
  • code
  • 84.22 %
  • assert
  • 97.64 %
  • func
  • 17.25 %
  • line
  • 97.67 %
  • branch
  • 94.50 %
  • cond
  • 90.08 %
  • toggle
  • 63.15 %
  • FSM
  • 75.68 %
Validation stages
V1
98.10%
V2
99.41%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 48 50 96.00
keymgr_dpe_smoke 378.950s 118315.670us 48 50 96.00
csr_hw_reset 5 5 100.00
keymgr_dpe_csr_hw_reset 1.610s 93.818us 5 5 100.00
csr_rw 20 20 100.00
keymgr_dpe_csr_rw 1.670s 44.030us 20 20 100.00
csr_bit_bash 5 5 100.00
keymgr_dpe_csr_bit_bash 18.960s 757.297us 5 5 100.00
csr_aliasing 5 5 100.00
keymgr_dpe_csr_aliasing 4.990s 238.676us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
keymgr_dpe_csr_mem_rw_with_rand_reset 2.120s 32.447us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
keymgr_dpe_csr_rw 1.670s 44.030us 20 20 100.00
keymgr_dpe_csr_aliasing 4.990s 238.676us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
intr_test 50 50 100.00
keymgr_dpe_intr_test 1.290s 15.067us 50 50 100.00
alert_test 50 50 100.00
keymgr_dpe_alert_test 1.410s 123.326us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
keymgr_dpe_tl_errors 3.920s 627.897us 20 20 100.00
tl_d_illegal_access 20 20 100.00
keymgr_dpe_tl_errors 3.920s 627.897us 20 20 100.00
tl_d_outstanding_access 49 50 98.00
keymgr_dpe_csr_hw_reset 1.610s 93.818us 5 5 100.00
keymgr_dpe_csr_rw 1.670s 44.030us 20 20 100.00
keymgr_dpe_csr_aliasing 4.990s 238.676us 5 5 100.00
keymgr_dpe_same_csr_outstanding 3.360s 360.670us 19 20 95.00
tl_d_partial_access 49 50 98.00
keymgr_dpe_csr_hw_reset 1.610s 93.818us 5 5 100.00
keymgr_dpe_csr_rw 1.670s 44.030us 20 20 100.00
keymgr_dpe_csr_aliasing 4.990s 238.676us 5 5 100.00
keymgr_dpe_same_csr_outstanding 3.360s 360.670us 19 20 95.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
keymgr_dpe_tl_intg_err 6.710s 727.392us 20 20 100.00
keymgr_dpe_sec_cm 12.390s 549.064us 5 5 100.00
shadow_reg_update_error 20 20 100.00
keymgr_dpe_shadow_reg_errors 2.970s 113.084us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
keymgr_dpe_shadow_reg_errors 2.970s 113.084us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
keymgr_dpe_shadow_reg_errors 2.970s 113.084us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
keymgr_dpe_shadow_reg_errors 2.970s 113.084us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
keymgr_dpe_shadow_reg_errors_with_csr_rw 7.060s 1117.335us 20 20 100.00
prim_count_check 5 5 100.00
keymgr_dpe_sec_cm 12.390s 549.064us 5 5 100.00
prim_fsm_check 5 5 100.00
keymgr_dpe_sec_cm 12.390s 549.064us 5 5 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:649) [keymgr_dpe_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
keymgr_dpe_same_csr_outstanding 71081487697844716738158478980375079055733034962885232961818259928163997418543 80
UVM_ERROR @ 2962491 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.keymgr_dpe_common_vseq] Check failed masked_data == exp_data (256 [0x100] vs 0 [0x0]) addr 0x3e012ed0 read out mismatch
UVM_INFO @ 2962491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
keymgr_dpe_smoke 101932686168135150365837392354432022553878967056471554431221740815496169118693 2006
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
keymgr_dpe_smoke 58430639783077240011390145594016416989437613103816441385695150127254019881389 2158
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---