| V1 |
|
100.00% |
| V2 |
|
97.76% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 50 | 50 | 100.00 | |||
| xbar_smoke | 25.470s | 2593.458us | 50 | 50 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 50 | 50 | 100.00 | |||
| xbar_random | 255.010s | 9907.569us | 50 | 50 | 100.00 | |
| xbar_random_delay | 297 | 300 | 99.00 | |||
| xbar_smoke_zero_delays | 7.970s | 44.981us | 50 | 50 | 100.00 | |
| xbar_smoke_large_delays | 419.480s | 45033.177us | 50 | 50 | 100.00 | |
| xbar_smoke_slow_rsp | 465.560s | 48903.654us | 50 | 50 | 100.00 | |
| xbar_random_zero_delays | 92.890s | 429.889us | 50 | 50 | 100.00 | |
| xbar_random_large_delays | 1675.980s | 158445.831us | 49 | 50 | 98.00 | |
| xbar_random_slow_rsp | 2725.500s | 192579.344us | 48 | 50 | 96.00 | |
| xbar_unmapped_address | 100 | 100 | 100.00 | |||
| xbar_unmapped_addr | 154.450s | 4312.402us | 50 | 50 | 100.00 | |
| xbar_error_and_unmapped_addr | 130.650s | 18608.386us | 50 | 50 | 100.00 | |
| xbar_error_cases | 100 | 100 | 100.00 | |||
| xbar_error_random | 243.890s | 13248.251us | 50 | 50 | 100.00 | |
| xbar_error_and_unmapped_addr | 130.650s | 18608.386us | 50 | 50 | 100.00 | |
| xbar_all_access_same_device | 84 | 100 | 84.00 | |||
| xbar_access_same_device | 447.880s | 26385.370us | 50 | 50 | 100.00 | |
| xbar_access_same_device_slow_rsp | 3526.990s | 370226.836us | 34 | 50 | 68.00 | |
| xbar_all_hosts_use_same_source_id | 50 | 50 | 100.00 | |||
| xbar_same_source | 177.900s | 12320.601us | 50 | 50 | 100.00 | |
| xbar_stress_all | 100 | 100 | 100.00 | |||
| xbar_stress_all | 1749.020s | 49395.524us | 50 | 50 | 100.00 | |
| xbar_stress_all_with_error | 1359.330s | 77756.380us | 50 | 50 | 100.00 | |
| xbar_stress_with_reset | 100 | 100 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 1976.970s | 7396.558us | 50 | 50 | 100.00 | |
| xbar_stress_all_with_reset_error | 1596.230s | 5167.151us | 50 | 50 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job timed out after * minutes | ||||
| xbar_access_same_device_slow_rsp | 20756187070842707703400082819409574355680264616866945579775995042482322199916 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 71165940914525762350749974614785876490842361570271956554502851936800287307482 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 112448778588346334167637578205442389148026339370901245845895895375079843300477 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 68231910210662924518517810015083182984252613669439339965459261741328481037991 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 63977589317854688172380242458792496048966402573211891152521972767954910369175 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 61633069999360443365756846475743918345506696239934884911604845197826120860096 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 57159852518467534710270872789234269275968690648229041343843735085434107083270 | None |
Job timed out after 60 minutes
|
|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | ||||
| xbar_access_same_device_slow_rsp | 7280851484035782895696925993940540548921343864785429397203014513888648355479 | 182 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 67434276403546073119569111848338739359778888044719719431380474999564142837468 | 117 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 45658276978065187779994187110288384639057846235024627233235343434901742726461 | 149 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 113382720679963652000665395309231435491514099961209321380197687529023953235015 | 150 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 49166497046989439003636482801048490094344509092085434255123697393120582781534 | 149 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 32706543883487723807648648517607048912096020063299918505056620087351342876417 | 197 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_large_delays | 18142114382225405191447290392185754430672004292446823910356490045851283350538 | 167 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 94709498427790386155826771679112408340227160497573374049416028383077783756781 | 167 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 101471243636364381478979493353460556598072911401303740193509982924071833527396 | 122 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 48415811288531265475812841657415385856180501600109336796263608061926927317406 | 197 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 9348833562430816042452722980667625470023155388279490710428109188743618439675 | 134 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 91365721645330355260192123390657361729521609707532865584066033132276506937569 | 166 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|