Simulation Results: csrng

 
19/04/2026 03:35:48 DVSim: v1.17.3 sha: 5b8f674 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 94.36 %
  • code
  • 96.26 %
  • assert
  • 95.85 %
  • func
  • 90.97 %
  • block
  • 98.62 %
  • line
  • 99.61 %
  • branch
  • 96.55 %
  • toggle
  • 93.64 %
  • FSM
  • 95.24 %
Validation stages
V1
100.00%
V2
96.46%
V2S
99.63%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
csrng_smoke 6.000s 237.803us 50 50 100.00
csr_hw_reset 5 5 100.00
csrng_csr_hw_reset 2.000s 32.476us 5 5 100.00
csr_rw 20 20 100.00
csrng_csr_rw 3.000s 61.090us 20 20 100.00
csr_bit_bash 5 5 100.00
csrng_csr_bit_bash 15.000s 1017.999us 5 5 100.00
csr_aliasing 5 5 100.00
csrng_csr_aliasing 6.000s 297.742us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
csrng_csr_mem_rw_with_rand_reset 4.000s 208.249us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
csrng_csr_rw 3.000s 61.090us 20 20 100.00
csrng_csr_aliasing 6.000s 297.742us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
interrupts 200 200 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
alerts 500 500 100.00
csrng_alert 36.000s 2876.822us 500 500 100.00
err 500 500 100.00
csrng_err 4.000s 117.809us 500 500 100.00
cmds 3 50 6.00
csrng_cmds 123.000s 10132.193us 3 50 6.00
life cycle 3 50 6.00
csrng_cmds 123.000s 10132.193us 3 50 6.00
stress_all 45 50 90.00
csrng_stress_all 908.000s 49920.713us 45 50 90.00
intr_test 50 50 100.00
csrng_intr_test 3.000s 54.684us 50 50 100.00
alert_test 50 50 100.00
csrng_alert_test 5.000s 241.752us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
csrng_tl_errors 17.000s 1422.729us 20 20 100.00
tl_d_illegal_access 20 20 100.00
csrng_tl_errors 17.000s 1422.729us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
csrng_csr_hw_reset 2.000s 32.476us 5 5 100.00
csrng_csr_rw 3.000s 61.090us 20 20 100.00
csrng_csr_aliasing 6.000s 297.742us 5 5 100.00
csrng_same_csr_outstanding 6.000s 353.406us 20 20 100.00
tl_d_partial_access 50 50 100.00
csrng_csr_hw_reset 2.000s 32.476us 5 5 100.00
csrng_csr_rw 3.000s 61.090us 20 20 100.00
csrng_csr_aliasing 6.000s 297.742us 5 5 100.00
csrng_same_csr_outstanding 6.000s 353.406us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
csrng_tl_intg_err 8.000s 558.646us 20 20 100.00
csrng_sec_cm 6.000s 446.192us 5 5 100.00
sec_cm_config_regwen 70 70 100.00
csrng_csr_rw 3.000s 61.090us 20 20 100.00
csrng_regwen 3.000s 31.694us 50 50 100.00
sec_cm_config_mubi 500 500 100.00
csrng_alert 36.000s 2876.822us 500 500 100.00
sec_cm_intersig_mubi 45 50 90.00
csrng_stress_all 908.000s 49920.713us 45 50 90.00
sec_cm_main_sm_fsm_sparse 705 705 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
csrng_sec_cm 6.000s 446.192us 5 5 100.00
sec_cm_cmd_stage_fsm_sparse 705 705 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
csrng_sec_cm 6.000s 446.192us 5 5 100.00
sec_cm_ctr_drbg_fsm_sparse 705 705 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
csrng_sec_cm 6.000s 446.192us 5 5 100.00
sec_cm_ctr_drbg_ctr_redun 705 705 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
csrng_sec_cm 6.000s 446.192us 5 5 100.00
sec_cm_gen_cmd_ctr_redun 705 705 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
csrng_sec_cm 6.000s 446.192us 5 5 100.00
sec_cm_ctrl_mubi 500 500 100.00
csrng_alert 36.000s 2876.822us 500 500 100.00
sec_cm_main_sm_ctr_local_esc 700 700 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
sec_cm_constants_lc_gated 45 50 90.00
csrng_stress_all 908.000s 49920.713us 45 50 90.00
sec_cm_sw_genbits_bus_consistency 500 500 100.00
csrng_alert 36.000s 2876.822us 500 500 100.00
sec_cm_tile_link_bus_integrity 20 20 100.00
csrng_tl_intg_err 8.000s 558.646us 20 20 100.00
sec_cm_aes_cipher_fsm_sparse 705 705 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
csrng_sec_cm 6.000s 446.192us 5 5 100.00
sec_cm_aes_cipher_fsm_redun 700 700 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
sec_cm_aes_cipher_ctrl_sparse 700 700 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
sec_cm_aes_cipher_fsm_local_esc 700 700 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
sec_cm_aes_cipher_ctr_redun 705 705 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
csrng_sec_cm 6.000s 446.192us 5 5 100.00
sec_cm_aes_cipher_data_reg_local_esc 700 700 100.00
csrng_intr 17.000s 977.107us 200 200 100.00
csrng_err 4.000s 117.809us 500 500 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
csrng_stress_all_with_rand_reset 0.000s 0.000us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (csrng_scoreboard.sv:418) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: csrng_reg_block.genbits
csrng_cmds 101849492355274381765336074523637167017775218442989932448452345411101579079283 133
UVM_ERROR @ 88181509 ps: (csrng_scoreboard.sv:418) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3031259452 [0xb4ad593c] vs 0 [0x0]) reg name: csrng_reg_block.genbits
UVM_INFO @ 88181509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 110378242912997896392375067837836870026868412453489169429837741663922210991738 133
UVM_ERROR @ 63242459 ps: (csrng_scoreboard.sv:418) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3159798102 [0xbc56b156] vs 1710117738 [0x65ee536a]) reg name: csrng_reg_block.genbits
UVM_INFO @ 63242459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 98674678603403095292584946365596246018208607364162747141373616616943944010315 133
UVM_ERROR @ 202771133 ps: (csrng_scoreboard.sv:418) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2244905301 [0x85ce8955] vs 0 [0x0]) reg name: csrng_reg_block.genbits
UVM_INFO @ 202771133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csrng_scoreboard.sv:166) [scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (* [*] vs * [*]) Interrupt_pin: EntropyReq
csrng_stress_all 65779226630128239591607709201409322731118409907397214111899731439370332531415 137
UVM_ERROR @ 93540808 ps: (csrng_scoreboard.sv:166) [uvm_test_top.env.scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (0x1 [1] vs 0x0 [0]) Interrupt_pin: EntropyReq
UVM_INFO @ 93540808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_stress_all 97619369853954422686151139897995739107626957722418450093182228572073536688930 137
UVM_ERROR @ 1212027553 ps: (csrng_scoreboard.sv:166) [uvm_test_top.env.scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (0x1 [1] vs 0x0 [0]) Interrupt_pin: EntropyReq
UVM_INFO @ 1212027553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_stress_all 107371379414312863724980344925950055896093144681666127033331629379700032659392 149
UVM_ERROR @ 287121072 ps: (csrng_scoreboard.sv:166) [uvm_test_top.env.scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (0x1 [1] vs 0x0 [0]) Interrupt_pin: EntropyReq
UVM_INFO @ 287121072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_stress_all 79047724559727752027476322638165931911304388696740794509225905734608984893476 165
UVM_ERROR @ 7447961699 ps: (csrng_scoreboard.sv:166) [uvm_test_top.env.scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (0x1 [1] vs 0x0 [0]) Interrupt_pin: EntropyReq
UVM_INFO @ 7447961699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_stress_all 37879433496984372238330249071549961245416434200690258737706279930741865725483 142
UVM_ERROR @ 4833202146 ps: (csrng_scoreboard.sv:166) [uvm_test_top.env.scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (0x1 [1] vs 0x0 [0]) Interrupt_pin: EntropyReq
UVM_INFO @ 4833202146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
csrng_stress_all_with_rand_reset 83429595071038731834119180073134530462620844568487696629988767936283913992893 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 15974824446659905317330285778754398777204649973151344933007750103846335033573 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 91650774113127178424739736945445922414839097945818419339475256105475019056191 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 70330537778308182480431414046863604122796001591740503874058260296174257190569 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 38070649286969083553650460201372090855788106272164845643439488636337922552287 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 51379283711556748659536332665788288165942701676005452878194466942077795046662 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 1678790547821799955628888632923855256761239847904530064270509791218416409946 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 9138962544796176828402248651934013406751728182663920117779975652477140340071 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 46243650288869639828978256528434433110024166500182325227894484638474268145137 None
Job timed out after 180 minutes
csrng_stress_all_with_rand_reset 92811323420636226657658126516026076488195432540269571766390835591598434674114 None
Job timed out after 180 minutes
UVM_FATAL (csrng_scoreboard.sv:660) [scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (* [*] vs * [*])
csrng_cmds 40707359469736488691800678777186473997550486390976154819276773130336610386891 130
UVM_FATAL @ 60236051 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 180617429962473700486590730716122411910 [0x87e1a6d4c84091e750023066eabb7386])
UVM_INFO @ 60236051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 33477363185683514115463667316336895407434128035598000689450776433420098397335 130
UVM_FATAL @ 35646716 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 185313021596778944946967519466605145442 [0x8b69fd5f750c0deaff0c5d524fce6d62])
UVM_INFO @ 35646716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 20459508156484731638738615336920821678863960171949562362784954733591703233504 130
UVM_FATAL @ 93679314 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 153221203045580393831108442539805035694 [0x7345548eeffb050cbe933fe1c4daccae])
UVM_INFO @ 93679314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 97992789376740683715722167437781233436683406235749887459644033829076886895670 130
UVM_FATAL @ 294749229 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 152106573219659802703211170149020233002 [0x726ea910a45c268a963c3c22ff606d2a])
UVM_INFO @ 294749229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 44624415527687132866758804664542004178516234406939294279407975323641387910461 130
UVM_FATAL @ 15004937 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 198735575659791926383189815069880762533 [0x95831461d5694345874f5c91099e40a5])
UVM_INFO @ 15004937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 93809602522058962288910882052700931980416248400566360940148077649215995863612 130
UVM_FATAL @ 198762408 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 193369583818176269545495295980332959228 [0x9179a08eeda3131f4c97cd61f070c5fc])
UVM_INFO @ 198762408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 103456977032237972787363851353260446625818828231412968786623752570757171605023 130
UVM_FATAL @ 215819305 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 110110561690199618699514535458346237119 [0x52d685d5e8c1434df62021df265dfcbf])
UVM_INFO @ 215819305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 48523383919005156019828761337627523768780907781694340906531978943637488279677 130
UVM_FATAL @ 97943095 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 138634424995935423964529200894976716126 [0x684c04dff412a29dc8c05ddcedd7ed5e])
UVM_INFO @ 97943095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 34905335310524684192882348539971976784487500306480641183971469476537059936092 130
UVM_FATAL @ 191522879 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 137259519953190118371485084002807356183 [0x674338d2914e539eb7294893b33a9b17])
UVM_INFO @ 191522879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 10377376060610127164917311229006047186539460507962033580628462699187386494235 130
UVM_FATAL @ 177039691 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 23546796453307437230426138205402604724 [0x11b6f2b2a4b44e31afc9a17fac36a4b4])
UVM_INFO @ 177039691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 112159294744639011168918315844773899351470953337114163329263971996058210304260 130
UVM_FATAL @ 30099175 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 95392398971414626749992920800221015606 [0x47c3e86342bd8edd4e9c296dfc192e36])
UVM_INFO @ 30099175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 102918933592495111289527581063764641752609757008933906438593887024762069233160 139
UVM_FATAL @ 13188101 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 265467387730409443624805173589588699872 [0xc7b728bcaaac2fd0bda111ade995eae0])
UVM_INFO @ 13188101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 37170921192261188637537256357248905861584752984776164074589244380172519912588 130
UVM_FATAL @ 31478512 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 278036637328292971295249825344201383910 [0xd12be89684b9614680a9cb1b221f5fe6])
UVM_INFO @ 31478512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 7898574010698221561725881015941246759359012801584460724340852344020067355531 150
UVM_FATAL @ 253201176 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 150779440249494832070172885631135963063 [0x716f105b953bc56993d141fa69f8d7b7])
UVM_INFO @ 253201176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 113915175587492113368651978954485981517248427859906268593214294080889164866573 130
UVM_FATAL @ 88041097 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 200880359842565337044587266310347204155 [0x972026681abdd146362a771b039ca63b])
UVM_INFO @ 88041097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 33704327621688548805930116263131837628436395511632447168563942125990802201547 130
UVM_FATAL @ 638215382 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 118695221233295527116160700033322516346 [0x594bde3aae1a87f7130829944544ff7a])
UVM_INFO @ 638215382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 79908513383899171260975556105776242079170999075374719327069493169291407759334 130
UVM_FATAL @ 89712916 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 320312249145139084540523181554261189952 [0xf0f9e52d063229c463bc374a3d366540])
UVM_INFO @ 89712916 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 8619296472062079950521014275528322916988617629629285534004576406551779203936 130
UVM_FATAL @ 111896143 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 53176522263325229661582117115517959150 [0x28016cf7d39113bc4575d56447737bee])
UVM_INFO @ 111896143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 63152854582581703091645302555661028767534017570452732974437962277019440195521 130
UVM_FATAL @ 91972069 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 309625855699397339732297815473126448331 [0xe8efc54ce8e2d8b8b59c6236a1211ccb])
UVM_INFO @ 91972069 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 109411338129646132068656554938933845837485428235302508199649321212499976964255 140
UVM_FATAL @ 771705640 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 217585806223911560977313169714641396461 [0xa3b18080fa038bea50c0e348954062ed])
UVM_INFO @ 771705640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 34313489448090310954249962580776331982307008246952987782465144493561461039101 140
UVM_FATAL @ 1912131740 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 317703192281329223281094283401493239036 [0xef0368bdacaa3da5f7976805495c54fc])
UVM_INFO @ 1912131740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 67577163294309378935632710646193310057210488492384089918493431288079679718485 130
UVM_FATAL @ 439972711 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 7322897032271609146958608898435720513 [0x58256b2e8512d998032b4db96722541])
UVM_INFO @ 439972711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 87960660842296791181011434591180811684394820140229531538420046548051417666769 130
UVM_FATAL @ 613688038 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 184092288356101743573806033765476720363 [0x8a7ee293c9f0d828f56bc5ea5e69deeb])
UVM_INFO @ 613688038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 61507683691937144161027983102797329807657822506311438019354888332004112965561 140
UVM_FATAL @ 293893060 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 108762578854883005255148996493465001981 [0x51d2e9268ddd197d95219d8f527e9ffd])
UVM_INFO @ 293893060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 48041753451383032760458454188935784646519582082119308601373256976924069440529 130
UVM_FATAL @ 104560713 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 16950077040623435759173910353232886644 [0xcc07751e2a3e776359fe7ca5d917b74])
UVM_INFO @ 104560713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 8582249627072525441024757280493698975482048134671400954887647143373991953146 130
UVM_FATAL @ 74505993 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 168504651247426951441795876417335366047 [0x7ec4d0bb78d0ecb2cd4c29fe6606919f])
UVM_INFO @ 74505993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 94490260671523134070687139408431612282881867575200214478475584559822408163551 130
UVM_FATAL @ 6076056 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 237225559406841409726731422070540100272 [0xb277fb189059bbdbdbf4ac7673a462b0])
UVM_INFO @ 6076056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 9498753497302041287978863708098759372835555203438943313752061204811170532997 130
UVM_FATAL @ 39225171 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 218393407161293640277920080024899825193 [0xa44d0a4de185a77cb20e8ea6054a2e29])
UVM_INFO @ 39225171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 81245063684641833919430363581321163405435316325192788053987234296865390955395 130
UVM_FATAL @ 258893930 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 271250747973466765946345940786332624213 [0xcc10fe69695f2b6fe3d767c46054e555])
UVM_INFO @ 258893930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 2160137692104268003382252241156017258995410540112289529066742089136626673945 130
UVM_FATAL @ 113951912 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 178132563244529352447358008071418226293 [0x86031571725abb90e0244fbea8372675])
UVM_INFO @ 113951912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 96984424856986392337884924706200894542619241886305265180158662692591916285470 130
UVM_FATAL @ 359458013 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 46184377082034299466081074505769531294 [0x22bec9983129250bbdbd3f1107a3b79e])
UVM_INFO @ 359458013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 83187893534426292276708275850350830733599152997993281449603734491881831710711 130
UVM_FATAL @ 72515402 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 125339395759136255290118746847255334845 [0x5e4b7d532cacafd55185538d61820fbd])
UVM_INFO @ 72515402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 108296360367444494517730919478280133611934704454420625246904905608121761189597 130
UVM_FATAL @ 206967381 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 1573840721988892966506225026800792748 [0x12f1c56aa7babfc27ca7e0eefb7b4ac])
UVM_INFO @ 206967381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 93457089076677350089651438902145785085276914158316206457843303133201313869442 130
UVM_FATAL @ 28354405 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 316163110928792923540048404030913956024 [0xeddaccde280dc4df4b21484d0622c8b8])
UVM_INFO @ 28354405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 12662556434968360231277340516985923276636336891268326759421075228062420631727 130
UVM_FATAL @ 188533202 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 279353008390612092477552318601864912628 [0xd2296eb134259725078eb21ccdd39ef4])
UVM_INFO @ 188533202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 25180803803687115215603700186044664932859051977252381404422772772877187064513 130
UVM_FATAL @ 99953455 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 226000178190724669135380916699874857377 [0xaa060d125cc109a06e7f56cc7aea11a1])
UVM_INFO @ 99953455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 4627254181226638955419370085462752506759110409090937266125324092910712073988 130
UVM_FATAL @ 31687403 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 248798225921092897384898736196091914906 [0xbb2ccb9b7adc30e2d164dfadeb782a9a])
UVM_INFO @ 31687403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 76600790476964709178668356875063755728857050123499382414428088059117493402511 130
UVM_FATAL @ 132583042 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 241146792057649314794387274875630402658 [0xb56b2ecac7a3f2ff409e78d19dca3c62])
UVM_INFO @ 132583042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 55890220880037268859917742997538315350786391828965312057166433425226143862420 130
UVM_FATAL @ 20029750 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 202323083635717596465645028503243843945 [0x9836022e76b254bdb19496cf13fde969])
UVM_INFO @ 20029750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 14084978545679777133684566543161768554727477805086906754988576246850545705323 130
UVM_FATAL @ 140808147 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 20795860703299816927269137752752721955 [0xfa52317fcf2fabf02928ba618951023])
UVM_INFO @ 140808147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 109067183305909650997576937481527355641900374331926989297736465712261350943944 130
UVM_FATAL @ 96714207 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 30168643450820630104139884525012750485 [0x16b244f61c47b2093be8a03021559095])
UVM_INFO @ 96714207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csrng_scoreboard.sv:629) [scoreboard] Check failed cs_item[app].status == cmd_sts[app] (* [*] vs * [*])
csrng_cmds 77424144085144415629659826592639675533215487646339060618790972338611683148306 139
UVM_FATAL @ 8558694 ps: (csrng_scoreboard.sv:629) [uvm_test_top.env.scoreboard] Check failed cs_item[app].status == cmd_sts[app] (0 [0x0] vs 3 [0x3])
UVM_INFO @ 8558694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 53830956434396175063998038658232356328845102691614163366769632882273235101417 139
UVM_FATAL @ 22994847 ps: (csrng_scoreboard.sv:629) [uvm_test_top.env.scoreboard] Check failed cs_item[app].status == cmd_sts[app] (0 [0x0] vs 3 [0x3])
UVM_INFO @ 22994847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
csrng_cmds 55864661396775660488147203219789490081531252352574362964957862952206543593850 139
UVM_FATAL @ 136311139 ps: (csrng_scoreboard.sv:629) [uvm_test_top.env.scoreboard] Check failed cs_item[app].status == cmd_sts[app] (0 [0x0] vs 3 [0x3])
UVM_INFO @ 136311139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---