Simulation Results

Simulation Results: keymgr_dpe

19/04/2026 03:35:48 DVSim: v1.17.3 sha: 5b8f674 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
66.37 %

code
84.23 %

assert
97.64 %

func
17.25 %

line
97.67 %

branch
94.50 %

cond
90.16 %

toggle
63.15 %

FSM
75.68 %

Validation stages

V1		100.00%
V2		100.00%
V2S		100.00%

V1

105/105 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				50	50	100.00
	keymgr_dpe_smoke	509.660s	38561.629us	50	50	100.00
csr_hw_reset				5	5	100.00
	keymgr_dpe_csr_hw_reset	1.850s	96.625us	5	5	100.00
csr_rw				20	20	100.00
	keymgr_dpe_csr_rw	1.760s	89.910us	20	20	100.00
csr_bit_bash				5	5	100.00
	keymgr_dpe_csr_bit_bash	17.000s	3555.138us	5	5	100.00
csr_aliasing				5	5	100.00
	keymgr_dpe_csr_aliasing	6.900s	379.031us	5	5	100.00
csr_mem_rw_with_rand_reset				20	20	100.00
	keymgr_dpe_csr_mem_rw_with_rand_reset	2.850s	215.590us	20	20	100.00
regwen_csr_and_corresponding_lockable_csr				25	25	100.00
	keymgr_dpe_csr_rw	1.760s	89.910us	20	20	100.00
	keymgr_dpe_csr_aliasing	6.900s	379.031us	5	5	100.00

V2

170/170 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
intr_test				50	50	100.00
	keymgr_dpe_intr_test	1.210s	17.897us	50	50	100.00
alert_test				50	50	100.00
	keymgr_dpe_alert_test	1.550s	85.050us	50	50	100.00
tl_d_oob_addr_access				20	20	100.00
	keymgr_dpe_tl_errors	4.180s	61.352us	20	20	100.00
tl_d_illegal_access				20	20	100.00
	keymgr_dpe_tl_errors	4.180s	61.352us	20	20	100.00
tl_d_outstanding_access				50	50	100.00
	keymgr_dpe_csr_hw_reset	1.850s	96.625us	5	5	100.00
	keymgr_dpe_csr_rw	1.760s	89.910us	20	20	100.00
	keymgr_dpe_csr_aliasing	6.900s	379.031us	5	5	100.00
	keymgr_dpe_same_csr_outstanding	3.930s	175.422us	20	20	100.00
tl_d_partial_access				50	50	100.00
	keymgr_dpe_csr_hw_reset	1.850s	96.625us	5	5	100.00
	keymgr_dpe_csr_rw	1.760s	89.910us	20	20	100.00
	keymgr_dpe_csr_aliasing	6.900s	379.031us	5	5	100.00
	keymgr_dpe_same_csr_outstanding	3.930s	175.422us	20	20	100.00

V2S

65/65 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				25	25	100.00
	keymgr_dpe_tl_intg_err	7.830s	797.055us	20	20	100.00
	keymgr_dpe_sec_cm	13.890s	939.509us	5	5	100.00
shadow_reg_update_error				20	20	100.00
	keymgr_dpe_shadow_reg_errors	3.340s	288.622us	20	20	100.00
shadow_reg_read_clear_staged_value				20	20	100.00
	keymgr_dpe_shadow_reg_errors	3.340s	288.622us	20	20	100.00
shadow_reg_storage_error				20	20	100.00
	keymgr_dpe_shadow_reg_errors	3.340s	288.622us	20	20	100.00
shadowed_reset_glitch				20	20	100.00
	keymgr_dpe_shadow_reg_errors	3.340s	288.622us	20	20	100.00
shadow_reg_update_error_with_csr_rw				20	20	100.00
	keymgr_dpe_shadow_reg_errors_with_csr_rw	7.030s	500.622us	20	20	100.00
prim_count_check				5	5	100.00
	keymgr_dpe_sec_cm	13.890s	939.509us	5	5	100.00
prim_fsm_check				5	5	100.00
	keymgr_dpe_sec_cm	13.890s	939.509us	5	5	100.00