Simulation Results: kmac/unmasked

 
19/04/2026 03:35:48 DVSim: v1.17.3 sha: 5b8f674 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.61 %
  • code
  • 92.38 %
  • assert
  • 97.90 %
  • func
  • 96.54 %
  • line
  • 97.65 %
  • branch
  • 95.93 %
  • cond
  • 94.75 %
  • toggle
  • 100.00 %
  • FSM
  • 73.55 %
Validation stages
V1
100.00%
V2
98.57%
V2S
99.56%
V3
90.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
kmac_smoke 68.600s 4491.421us 50 50 100.00
csr_hw_reset 5 5 100.00
kmac_csr_hw_reset 1.480s 308.649us 5 5 100.00
csr_rw 20 20 100.00
kmac_csr_rw 1.570s 219.003us 20 20 100.00
csr_bit_bash 5 5 100.00
kmac_csr_bit_bash 15.090s 4404.011us 5 5 100.00
csr_aliasing 5 5 100.00
kmac_csr_aliasing 10.630s 1991.771us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
kmac_csr_mem_rw_with_rand_reset 3.160s 141.003us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
kmac_csr_rw 1.570s 219.003us 20 20 100.00
kmac_csr_aliasing 10.630s 1991.771us 5 5 100.00
mem_walk 5 5 100.00
kmac_mem_walk 1.090s 13.256us 5 5 100.00
mem_partial_access 5 5 100.00
kmac_mem_partial_access 1.810s 104.498us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 50 50 100.00
kmac_long_msg_and_output 2963.370s 767652.926us 50 50 100.00
burst_write 50 50 100.00
kmac_burst_write 957.880s 179092.104us 50 50 100.00
test_vectors 40 40 100.00
kmac_test_vectors_sha3_224 2154.670s 80979.542us 5 5 100.00
kmac_test_vectors_sha3_256 1898.440s 90281.471us 5 5 100.00
kmac_test_vectors_sha3_384 1223.390s 188662.851us 5 5 100.00
kmac_test_vectors_sha3_512 1092.940s 49275.218us 5 5 100.00
kmac_test_vectors_shake_128 2342.580s 185818.491us 5 5 100.00
kmac_test_vectors_shake_256 1983.790s 89571.408us 5 5 100.00
kmac_test_vectors_kmac 2.970s 305.274us 5 5 100.00
kmac_test_vectors_kmac_xof 3.350s 453.472us 5 5 100.00
sideload 50 50 100.00
kmac_sideload 398.450s 35884.531us 50 50 100.00
app 50 50 100.00
kmac_app 307.540s 14822.692us 50 50 100.00
app_with_partial_data 10 10 100.00
kmac_app_with_partial_data 264.780s 83677.940us 10 10 100.00
entropy_refresh 50 50 100.00
kmac_entropy_refresh 332.830s 41974.626us 50 50 100.00
error 50 50 100.00
kmac_error 416.270s 50152.274us 50 50 100.00
key_error 50 50 100.00
kmac_key_error 13.850s 8911.219us 50 50 100.00
sideload_invalid 39 50 78.00
kmac_sideload_invalid 150.130s 10029.531us 39 50 78.00
edn_timeout_error 20 20 100.00
kmac_edn_timeout_error 35.520s 4023.301us 20 20 100.00
entropy_mode_error 20 20 100.00
kmac_entropy_mode_error 40.850s 2011.182us 20 20 100.00
entropy_ready_error 10 10 100.00
kmac_entropy_ready_error 57.270s 15131.767us 10 10 100.00
lc_escalation 50 50 100.00
kmac_lc_escalation 26.930s 622.650us 50 50 100.00
stress_all 50 50 100.00
kmac_stress_all 1625.950s 309658.739us 50 50 100.00
intr_test 50 50 100.00
kmac_intr_test 1.170s 19.867us 50 50 100.00
alert_test 50 50 100.00
kmac_alert_test 1.320s 255.329us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
kmac_tl_errors 4.020s 543.751us 20 20 100.00
tl_d_illegal_access 20 20 100.00
kmac_tl_errors 4.020s 543.751us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
kmac_csr_hw_reset 1.480s 308.649us 5 5 100.00
kmac_csr_rw 1.570s 219.003us 20 20 100.00
kmac_csr_aliasing 10.630s 1991.771us 5 5 100.00
kmac_same_csr_outstanding 2.630s 41.125us 20 20 100.00
tl_d_partial_access 50 50 100.00
kmac_csr_hw_reset 1.480s 308.649us 5 5 100.00
kmac_csr_rw 1.570s 219.003us 20 20 100.00
kmac_csr_aliasing 10.630s 1991.771us 5 5 100.00
kmac_same_csr_outstanding 2.630s 41.125us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 20 20 100.00
kmac_shadow_reg_errors 2.530s 278.642us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
kmac_shadow_reg_errors 2.530s 278.642us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
kmac_shadow_reg_errors 2.530s 278.642us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
kmac_shadow_reg_errors 2.530s 278.642us 20 20 100.00
shadow_reg_update_error_with_csr_rw 19 20 95.00
kmac_shadow_reg_errors_with_csr_rw 5.760s 786.662us 19 20 95.00
tl_intg_err 25 25 100.00
kmac_sec_cm 74.600s 5446.157us 5 5 100.00
kmac_tl_intg_err 5.640s 864.839us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
kmac_tl_intg_err 5.640s 864.839us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
kmac_lc_escalation 26.930s 622.650us 50 50 100.00
sec_cm_sw_key_key_masking 50 50 100.00
kmac_smoke 68.600s 4491.421us 50 50 100.00
sec_cm_key_sideload 50 50 100.00
kmac_sideload 398.450s 35884.531us 50 50 100.00
sec_cm_cfg_shadowed_config_shadow 20 20 100.00
kmac_shadow_reg_errors 2.530s 278.642us 20 20 100.00
sec_cm_fsm_sparse 5 5 100.00
kmac_sec_cm 74.600s 5446.157us 5 5 100.00
sec_cm_ctr_redun 5 5 100.00
kmac_sec_cm 74.600s 5446.157us 5 5 100.00
sec_cm_packer_ctr_redun 5 5 100.00
kmac_sec_cm 74.600s 5446.157us 5 5 100.00
sec_cm_cfg_shadowed_config_regwen 50 50 100.00
kmac_smoke 68.600s 4491.421us 50 50 100.00
sec_cm_fsm_global_esc 50 50 100.00
kmac_lc_escalation 26.930s 622.650us 50 50 100.00
sec_cm_fsm_local_esc 5 5 100.00
kmac_sec_cm 74.600s 5446.157us 5 5 100.00
sec_cm_absorbed_ctrl_mubi 10 10 100.00
kmac_mubi 254.500s 10275.373us 10 10 100.00
sec_cm_sw_cmd_ctrl_sparse 50 50 100.00
kmac_smoke 68.600s 4491.421us 50 50 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 9 10 90.00
kmac_stress_all_with_rand_reset 297.030s 21977.682us 9 10 90.00

Error Messages

   Test seed line log context
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2)
kmac_sideload_invalid 1597853527381872307869804377285011854768328554655168682182403521161932146623 78
UVM_FATAL @ 10035084483 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x83c1a000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10035084483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sideload_invalid 64792318310777892894504042911612121086504462435536942582198104639197570659656 78
UVM_FATAL @ 10035111122 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x63a73000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10035111122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:847) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*])
kmac_stress_all_with_rand_reset 16658926052123514020984637981221921873678912586528983890258889891948675550073 221
UVM_ERROR @ 5657731520 ps: (cip_base_vseq.sv:847) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0])
UVM_INFO @ 5657731520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7)
kmac_sideload_invalid 36897405659615950294514091248888545911169497771490145549721172973663386491501 84
UVM_FATAL @ 10029530883 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa7295000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)
UVM_INFO @ 10029530883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sideload_invalid 8528959936567624470788444898438406003848203208125934604823708419881711229329 84
UVM_FATAL @ 10036458786 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x977ac000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)
UVM_INFO @ 10036458786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4)
kmac_sideload_invalid 22421109386775244455682866231266481261788680772194752492539508318432616145270 81
UVM_FATAL @ 10083468265 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xef657000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10083468265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5)
kmac_sideload_invalid 68151629496606408365532685745702043533240927862150803619602235169134020525920 81
UVM_FATAL @ 10026067280 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb73e7000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10026067280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sideload_invalid 44942946594099047977407554557467314231632853392408425885615341984680201451924 82
UVM_FATAL @ 10111977813 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x24311000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10111977813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=16)
kmac_sideload_invalid 89369911228375904106935273078979688672042194561947135958922568185425552222352 95
UVM_FATAL @ 10178734026 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x59299000, Comparison=CompareOpEq, exp_data=0x1, call_count=16)
UVM_INFO @ 10178734026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8)
kmac_sideload_invalid 48627643067241002361481784439729896066669441520134718266103540454386940141050 86
UVM_FATAL @ 10057856728 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x9e9d9000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)
UVM_INFO @ 10057856728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)
kmac_sideload_invalid 110569446288667028528322937396184253100922972778857124427472654873644275316218 79
UVM_FATAL @ 10079689695 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x73b0c000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10079689695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sideload_invalid 49526647492836939217560792576823148295567727061811430126593650908902052624038 79
UVM_FATAL @ 10030050067 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa54b8000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10030050067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: kmac_reg_block.prefix_* reset value: *
kmac_shadow_reg_errors_with_csr_rw 105118592834101591391494847707097275919537440450599737391650363272855934006018 181
UVM_ERROR @ 147953703 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1473206878 [0x57cf5a5e] vs 48263836 [0x2e0729c]) Regname: kmac_reg_block.prefix_5 reset value: 0x0
UVM_INFO @ 147953703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---