Simulation Results: gpio

 
20/04/2026 00:07:04 DVSim: v1.17.3 sha: 5b8f674 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.49 %
  • code
  • 92.63 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.38 %
  • cond
  • 95.68 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
99.22%
V2
92.24%
V2S
92.00%
V3
38.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.830s 196.398us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.780s 75.989us 50 50 100.00
gpio_smoke_en_cdc_prim 1.310s 98.311us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.200s 75.639us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.910s 14.688us 5 5 100.00
csr_rw 18 20 90.00
gpio_csr_rw 0.940s 29.420us 18 20 90.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 7.090s 680.669us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 2.450s 55.895us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.510s 237.522us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 23 25 92.00
gpio_csr_rw 0.940s 29.420us 18 20 90.00
gpio_csr_aliasing 2.450s 55.895us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.610s 198.229us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.810s 778.695us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.300s 32.318us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.760s 56.180us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 4.230s 156.309us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 4.530s 92.447us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 26.880s 3529.063us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 7.090s 399.121us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.480s 147.713us 50 50 100.00
stress_all 5 50 10.00
gpio_stress_all 82.160s 27840.730us 5 50 10.00
alert_test 50 50 100.00
gpio_alert_test 0.940s 13.139us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.810s 27.716us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.910s 217.470us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.910s 217.470us 20 20 100.00
tl_d_outstanding_access 43 50 86.00
gpio_csr_rw 0.940s 29.420us 18 20 90.00
gpio_same_csr_outstanding 1.310s 112.176us 15 20 75.00
gpio_csr_aliasing 2.450s 55.895us 5 5 100.00
gpio_csr_hw_reset 0.910s 14.688us 5 5 100.00
tl_d_partial_access 43 50 86.00
gpio_csr_rw 0.940s 29.420us 18 20 90.00
gpio_same_csr_outstanding 1.310s 112.176us 15 20 75.00
gpio_csr_aliasing 2.450s 55.895us 5 5 100.00
gpio_csr_hw_reset 0.910s 14.688us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 23 25 92.00
gpio_sec_cm 1.350s 763.246us 5 5 100.00
gpio_tl_intg_err 2.500s 617.562us 18 20 90.00
sec_cm_bus_integrity 18 20 90.00
gpio_tl_intg_err 2.500s 617.562us 18 20 90.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 38 50 76.00
gpio_rand_straps 0.960s 15.691us 38 50 76.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 15.110s 1028.436us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.960s 30.364us 50 50 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 112115652376598825326710753796425940125398417903039210104749177525875147466904 879
UVM_ERROR @ 3132635571 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2082296588 [0x7c1d530c])
UVM_INFO @ 3132635571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 43858277804364956078141563484229228003999537821739772639065478923042289924393 648
UVM_ERROR @ 3120420900 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2148284145 [0x800c36f1])
UVM_INFO @ 3120420900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 22653942572613488597961220705848252954059980169914939008864848400071387797361 448
UVM_ERROR @ 898983771 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2261818967 [0x86d09e57])
UVM_INFO @ 898983771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 32256784673857883930101052165487956196019675422440577989335143339612786033444 438
UVM_ERROR @ 1229149588 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2188082557 [0x826b7d7d] vs 4282170103 [0xff3cbaf7])
UVM_INFO @ 1229149588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92725163352296185207581937192677320006317134394203282709206288256208395074893 77
UVM_ERROR @ 18499192 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2763595793 [0xa4b92011])
UVM_INFO @ 18499192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 11198860533007063241531021891422291827234507201702059668515615733711692672316 1923
UVM_ERROR @ 6880247614 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3668393288 [0xdaa73d48] vs 2646841985 [0x9dc39a81])
UVM_INFO @ 6880247614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 36825091945321430653989100532964246606262084335972846074970758948035594194008 75
UVM_ERROR @ 1409105 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4081713813 [0xf34a0295])
UVM_INFO @ 1409105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 82542219013743366275992263085111890020169546695611232594658800910510478912959 172
UVM_ERROR @ 575408464 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4083504188 [0xf365543c] vs 1185238941 [0x46a54f9d])
UVM_INFO @ 575408464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 58165263210400149225893780652538644691982257770987545609261970371533092303423 445
UVM_ERROR @ 14365197854 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2276131867 [0x87ab041b] vs 2136370502 [0x7f566d46])
UVM_INFO @ 14365197854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 70298894561157384428026653876431705425223619566869499284381155381928402973370 141
UVM_ERROR @ 130455159 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2613628459 [0x9bc8ce2b] vs 2192721511 [0x82b24667])
UVM_INFO @ 130455159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 89406822603307813848999333401395874706482923271068825454197520305507888860365 1984
UVM_ERROR @ 16242363684 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (245590767 [0xea36aef] vs 3380130142 [0xc978b15e])
UVM_INFO @ 16242363684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 33543737910587990518813119149859596089424266189251900005483213134790892316721 509
UVM_ERROR @ 6860203998 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2889262315 [0xac36a4eb] vs 77134699 [0x498fb6b])
UVM_INFO @ 6860203998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 30700986497110848778705999833626688623613275702574700788068408198602896765541 109
UVM_ERROR @ 311347220 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1569599028 [0x5d8e2e34])
UVM_INFO @ 311347220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 36919789996247584214968348298730440008663846641337790912979603695827167436229 285
UVM_ERROR @ 1239638301 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3383035667 [0xc9a50713])
UVM_INFO @ 1239638301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 94468602119377900703404415259861286310869202411892200923367994782673559017198 799
UVM_ERROR @ 5333411217 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (933441688 [0x37a33098] vs 4040433117 [0xf0d41ddd])
UVM_INFO @ 5333411217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 20252727634519883993067220446070380944993132328726070661927116665295416114222 373
UVM_ERROR @ 5548787684 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1943768647 [0x73db8e47])
UVM_INFO @ 5548787684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 110045455411114026338522895412208217614005345539007513544627617779216498078988 75
UVM_ERROR @ 5445269 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2240491541 [0x858b3015])
UVM_INFO @ 5445269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 114316702385312303406201863631005694922011000528661794073762669409111145888125 1471
UVM_ERROR @ 19564820668 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1985877258 [0x765e150a])
UVM_INFO @ 19564820668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 102512272620197876757996740243392512104448440080829771896279443606113028231396 580
UVM_ERROR @ 22298875732 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 697096550 [0x298cd966])
UVM_INFO @ 22298875732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 101855091995325377473201555633683630849235013254515984741828421344427399518724 797
UVM_ERROR @ 2112132347 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3037170609 [0xb5078bb1] vs 3294075820 [0xc4579bac])
UVM_INFO @ 2112132347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 110784424923249270777782100146099220506011529032136372732696006159613111116999 75
UVM_ERROR @ 4841690 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3452989476 [0xcdd07024])
UVM_INFO @ 4841690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 33153815101610086009433595578454033204421710591281432810144052066273707015905 622
UVM_ERROR @ 1721993635 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2946930897 [0xafa698d1])
UVM_INFO @ 1721993635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 67866187512893133030168142460358468031844657393665235924915978790283681015550 739
UVM_ERROR @ 2183853126 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2136221404 [0x7f5426dc])
UVM_INFO @ 2183853126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 21851455968357210881142931423813361082435046472507597136316531240283016503581 80
UVM_ERROR @ 3027952292 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3833874295 [0xe4844777] vs 2910945266 [0xad817ff2])
UVM_INFO @ 3027952292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 71519970092791963681492178688595260849712469770908556466596015585339561698022 413
UVM_ERROR @ 1197260149 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4037299931 [0xf0a44edb] vs 2577067678 [0x999aee9e])
UVM_INFO @ 1197260149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 68698535581640328991532202076448250394475801873264025160746167775683267235854 132
UVM_ERROR @ 1578928982 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2675826186 [0x9f7dde0a])
UVM_INFO @ 1578928982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 91620965891073737696319683962747352482989337718955849691457058715529030368948 2244
UVM_ERROR @ 3001502784 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1727275103 [0x66f4205f] vs 434097029 [0x19dfcb85])
UVM_INFO @ 3001502784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 60902303837266364868852117808635916229870068503420713711841235300338016376305 75
UVM_ERROR @ 1241156 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 38354756 [0x2493f44])
UVM_INFO @ 1241156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 97029442324389016367448300661076091480538075926163495246833646871406010912163 530
UVM_ERROR @ 4258619107 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3249330965 [0xc1acdb15])
UVM_INFO @ 4258619107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 64497651586298600815011231665055498548182248120776552109009516090362720207328 315
UVM_ERROR @ 278436981 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (915983836 [0x3698cddc] vs 1010846310 [0x3c404a66])
UVM_INFO @ 278436981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 36832980627280144162434844430558525034270271525622474152693055107600129155669 75
UVM_ERROR @ 3191255 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3984636090 [0xed80b8ba])
UVM_INFO @ 3191255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 68221309808155917969183233049458702945525321664941225789678643501093293491860 466
UVM_ERROR @ 1891940416 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4217228048 [0xfb5dcb10])
UVM_INFO @ 1891940416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 87097633996654464929283429085176406505854427056570925109069892324588012946467 494
UVM_ERROR @ 3860536330 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (393172114 [0x176f5492] vs 3445623249 [0xcd6009d1])
UVM_INFO @ 3860536330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 74547507633412478409739875206791399849442801579086907249968249413748224917878 451
UVM_ERROR @ 661871572 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2321016341 [0x8a57e615] vs 1024115422 [0x3d0ac2de])
UVM_INFO @ 661871572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 29294306266813205942099187710796166616371185273056348858124542399502106161830 301
UVM_ERROR @ 776479046 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1380573255 [0x5249e047])
UVM_INFO @ 776479046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 113765987601242391702388367096666139960896970296505273188829937617823210977056 610
UVM_ERROR @ 14898223063 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2752852729 [0xa41532f9] vs 2709885524 [0xa1859254])
UVM_INFO @ 14898223063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 88430995924669287481306152362234950006494990690414474139156489040821275581385 411
UVM_ERROR @ 4406505192 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (915973367 [0x3698a4f7] vs 2807478565 [0xa756b925])
UVM_INFO @ 4406505192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 50750502073951159893261129196112938811282262631112961328633350517948801275958 223
UVM_ERROR @ 2005792456 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2166451526 [0x81216d46])
UVM_INFO @ 2005792456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 89515655019017892202941344325654937538792464963758278648922219137036692499834 866
UVM_ERROR @ 870759289 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3362503466 [0xc86bbb2a] vs 3389497698 [0xca07a162])
UVM_INFO @ 870759289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 49148609498781607034102311235224638432355769925414276747123654637193599320492 75
UVM_ERROR @ 4240383 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2156244622 [0x8085ae8e])
UVM_INFO @ 4240383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 85162177918370756282420811942976139435894275977077721158233449392454377319528 75
UVM_ERROR @ 14719282 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 667423764 [0x27c81414])
UVM_INFO @ 14719282 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 20094109324359768534608238613324614615596692284083838460612339242561813330148 542
UVM_ERROR @ 3834413602 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2217559426 [0x842d4582])
UVM_INFO @ 3834413602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 11605114774822414130102455113622850804445356548714974958429701922810095081844 75
UVM_ERROR @ 2936641 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1270644575 [0x4bbc7f5f])
UVM_INFO @ 2936641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 30716475574512877844885802157363703509599700240286057805448704093590119120339 76
UVM_ERROR @ 1695965 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1372415040 [0x51cd6440])
UVM_INFO @ 1695965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 71356404881926539588029138842959895257814327910323061175848197517242163467557 75
UVM_ERROR @ 5891184 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3612522636 [0xd752b88c])
UVM_INFO @ 5891184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 9939156551677939467368470143543733708508388026965018927917458109018878710446 75
UVM_ERROR @ 5278621 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 750318190 [0x2cb8f26e])
UVM_INFO @ 5278621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 30343934876022566487256757689572158686654410684201436061276069731909164383074 370
UVM_ERROR @ 508316869 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1720665485 [0x668f458d])
UVM_INFO @ 508316869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 105174467041146533464027618607400318257713532593811307699051718990489749325877 76
UVM_ERROR @ 202900129 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2552155626 [0x981ecdea] vs 2457560328 [0x927b6508])
UVM_INFO @ 202900129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 9459530468651356882817751941665087451421774237005169252826107515035360442381 809
UVM_ERROR @ 2738784645 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1204537141 [0x47cbc735] vs 1011681003 [0x3c4d06eb])
UVM_INFO @ 2738784645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 82839076118298871851169612454443608966345195668476811147621318388065673214149 2307
UVM_ERROR @ 33792353783 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3782467237 [0xe173dea5])
UVM_INFO @ 33792353783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 63536727234473456248155606618313790018896226345318199977991296761535897714683 675
UVM_ERROR @ 8253856901 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3337267234 [0xc6eaa822] vs 3844486813 [0xe526369d])
UVM_INFO @ 8253856901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 53310630297273346514280968274976542364821891039425098323166736899344041087373 1206
UVM_ERROR @ 2096205381 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3532127665 [0xd287fdb1])
UVM_INFO @ 2096205381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 83932732748963545394789262080140869639179270779085338345171845041808886629745 75
UVM_ERROR @ 4443106 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 194209940 [0xb936894])
UVM_INFO @ 4443106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 70626802154916529643058331146639618981621661211445073908381821514035930775389 243
UVM_ERROR @ 2973840907 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 236586798 [0xe1a072e])
UVM_INFO @ 2973840907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 57117498040039825670248122637279967608725879399048415699619053062048999831731 75
UVM_ERROR @ 5626947 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4107911054 [0xf4d9bf8e])
UVM_INFO @ 5626947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 73040035274945998048880079250644080532504601668233547764275895978499184715533 774
UVM_ERROR @ 1344798850 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3931280261 [0xea529385] vs 956406821 [0x39019c25])
UVM_INFO @ 1344798850 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 7997418695688596319697032778143741587036818580440019852598360165144195718121 75
UVM_ERROR @ 1302750 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1364093815 [0x514e6b77])
UVM_INFO @ 1302750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 4752736898635638668214474022596813618392866699244427536692428666648384463223 80
UVM_FATAL @ 20095017 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 20095017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101003730012281220029128320201344646898249799684377855405067300611373974746726 81
UVM_FATAL @ 239476578 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 239476578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 7844001791482080443412117960728982349154807566440288548967593698033293557634 82
UVM_FATAL @ 720038621 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 720038621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27912377297639686582901122873725032908299417520404535379700974133386378426591 91
UVM_FATAL @ 91069597 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 91069597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 65089429903907387818883109699025382064975183501580621652046978550933303012684 80
UVM_FATAL @ 27543191 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 27543191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44667692423310957264982123187605415142296974787129032640025221035778453882883 80
UVM_FATAL @ 5820031 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5820031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 96613688624983079891231532564414073197799462868034690101378198388724871455122 80
UVM_FATAL @ 3265607 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3265607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 47863281053282184461112046966731841994531571152238199228086884649356719907730 337
UVM_FATAL @ 1028435971 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1028435971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 63670581724018435018341982976256340269966478697104380632525897689837980896805 183
UVM_FATAL @ 776585952 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 776585952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79640067420574283051834565909010155886767539899562947240438189011583107874142 80
UVM_FATAL @ 6550415 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 6550415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101603818729317935551657477591838737244978977417269508983485960962287140522931 82
UVM_FATAL @ 321239302 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 321239302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68706113861309797362887277845036868622386613621429566283264496231236800063240 82
UVM_FATAL @ 319309534 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 319309534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 25943569051487559855816935828842258903076574301184573779503663544730367287011 82
UVM_FATAL @ 248762374 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 248762374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 96013012915800929462590858983998302016137158003510548093713728833673396184437 83
UVM_FATAL @ 25117130 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 25117130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16249069516446364452057986470329740192260377719813326126804308084056448606945 108
UVM_FATAL @ 2544029887 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2544029887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 59168688437185786355130156418007211090135234273072092564791198200045448997892 80
UVM_FATAL @ 8676439 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8676439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 108184637635542161605704454340763926271883282283290056312985015328875717823730 80
UVM_FATAL @ 686573442 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 686573442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 93507234683261469927661835344629123727176083062985188921089409305127361836460 80
UVM_FATAL @ 17563319 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 17563319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 52209171049284037241313285082498181599924084737141756260913074748464872498724 80
UVM_FATAL @ 520033550 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 520033550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 3871621126696204551409203911914789462909239742787479893432123653806879207379 81
UVM_FATAL @ 21724873 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 21724873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 81083403347108293142382417407462963316578635317388299583581777775372753694018 80
UVM_FATAL @ 7717054 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 7717054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 47009921338806122299514738129467110007297756516156973232709814236282487371704 81
UVM_FATAL @ 658650801 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 658650801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 42217838290779940969306659295673882929808568682313165514026669208146835947612 80
UVM_FATAL @ 192098163 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 192098163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 22691730177337914886585867453596686773688834109411576633367327503986026957455 262
UVM_FATAL @ 2047053900 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2047053900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 54397338618967831358469799171196158310199426348753045247186778150615919343874 80
UVM_FATAL @ 19004991 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 19004991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 32457544565643965661780510790401939377642325432086678148382494262681811292182 80
UVM_FATAL @ 1160307 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1160307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 33386520513201240511434880656180915927425626925412011520809844990042529672916 81
UVM_FATAL @ 349986883 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 349986883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 39827267887835165986374017710526491205969579342080599829833934454211411243397 85
UVM_FATAL @ 2739562060 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2739562060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27489435582947130938817306600491767519814958593103403014081327874542191901143 278
UVM_FATAL @ 903508910 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 903508910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*
gpio_stress_all_with_rand_reset 67565774436716404496365125518123861404865259130301616745667447884718404307104 109
UVM_FATAL @ 229518294 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 229518294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 62449031529488503733675655938661563383998111185798679328527791342046823422333 80
UVM_FATAL @ 42100480 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 42100480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 37968724358779948049340395435350957525648454662387195641687979658032034426979 78
UVM_FATAL @ 6436656 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 6436656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 106686206485119905256638947627248121169890595675089257184214041324581959679678 82
UVM_FATAL @ 1284733396 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1284733396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 47171914292938437866809843380275959125658361438050485874301044236929819523739 78
UVM_FATAL @ 7031955 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 7031955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 36976609766997571347716801834085986562843260297446915042362740566618837780885 79
UVM_FATAL @ 458047088 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 458047088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 19215988263264747068959947627969738966354534996194691100913254385591969057949 78
UVM_FATAL @ 1089117 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1089117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 30064891992367233450593418456849265708027272772385404092898560390382703973618 78
UVM_FATAL @ 4666375 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 4666375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77749212106278690175502670232605137708317516618719198198389980381836124749411 80
UVM_FATAL @ 279880435 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 279880435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 78435590156751412048823760453780489982615770440826792874842273749361814677078 238
UVM_FATAL @ 424077639 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 424077639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 106728888862845430285411565353145983123738857889573478726602352410488260390387 327
UVM_FATAL @ 711088668 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 711088668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 35648187829183157252308037909727799838378299435443348737476619429833444876543 78
UVM_FATAL @ 4652054 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 4652054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 18672668547000571706626972921418431252880631583179791686108590263037924824859 78
UVM_FATAL @ 10465729 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 10465729 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 63450736815521726886038740796336635503743373516967531359259838451095188651331 84
UVM_FATAL @ 18250709 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 18250709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 78110920650032211784698911124864733935306158982615585139537252007146688453784 78
UVM_FATAL @ 1946760 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1946760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 92458077174207359014723786731329498894262869209339221313855080244645228369715 389
UVM_FATAL @ 328663603 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 328663603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 20333917405708636390661961113730516459793680059762489689581167951162337247886 79
UVM_FATAL @ 448949569 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 448949569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 32701719093055712019556718913268496845030229000643158621172655131244703308857 79
UVM_FATAL @ 229350900 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 229350900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 32324598166775144593408503244765807079589900025539302499359654259118112958573 138
UVM_FATAL @ 2077083551 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 2077083551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104249855164696434789527056758048107631112479050701841920268690602758128139172 78
UVM_FATAL @ 246243553 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 246243553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 75979555590742684270507373147746066110708505923756111039171759533974703402707 78
UVM_FATAL @ 2754352 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 2754352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:649) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 109239852928414927646265817821911505930438154889130542396215564584364915311329 76
UVM_ERROR @ 17803831 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x18483f68 read out mismatch
UVM_INFO @ 17803831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 4174950760645014513265097813762042534242309869231473996887289919030655916425 79
UVM_ERROR @ 65305925 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x9f1d266c read out mismatch
UVM_INFO @ 65305925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 51747305793977705593129575115337405612031435959308614313782398952131207388513 77
UVM_ERROR @ 49096665 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (11 [0xb] vs 0 [0x0]) addr 0x3ba6d70 read out mismatch
UVM_INFO @ 49096665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 90098053253265097276382741122981361907144105980985138298451059968531559897091 78
UVM_ERROR @ 72079460 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (14642180 [0xdf6c04] vs 14642181 [0xdf6c05]) addr 0x26541e58 read out mismatch
UVM_INFO @ 72079460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 30790367861921985518779229701946696534280848396952392515675143445910425696627 78
UVM_ERROR @ 163123807 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (10 [0xa] vs 0 [0x0]) addr 0xefe18f80 read out mismatch
UVM_INFO @ 163123807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_* reset value: *
gpio_csr_rw 51306428898103885921996967689982105691470152779169980569352897715944370964909 78
UVM_ERROR @ 45129168 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (2 [0x2] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_7 reset value: 0x0
UVM_INFO @ 45129168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_csr_rw 68066341837913626618041769797121112884579715256310669794220291978923444262169 76
UVM_ERROR @ 2876536 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (3 [0x3] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_0 reset value: 0x0
UVM_INFO @ 2876536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_tl_intg_err 96808750126178320760831270891815359769514402771441552457527943483127954125116 138
UVM_ERROR @ 52099010 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_1 reset value: 0x0
UVM_INFO @ 52099010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_tl_intg_err 41589711232671452641658482914324935965952479171505853281383580284656298999629 133
UVM_ERROR @ 244114643 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_0 reset value: 0x0
UVM_INFO @ 244114643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---