| V1 |
|
100.00% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 50 | 50 | 100.00 | |||
| kmac_smoke | 74.870s | 4902.384us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| kmac_csr_hw_reset | 1.490s | 86.842us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| kmac_csr_rw | 1.500s | 26.260us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| kmac_csr_bit_bash | 16.770s | 1928.156us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| kmac_csr_aliasing | 7.910s | 540.656us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 2.690s | 88.629us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| kmac_csr_rw | 1.500s | 26.260us | 20 | 20 | 100.00 | |
| kmac_csr_aliasing | 7.910s | 540.656us | 5 | 5 | 100.00 | |
| mem_walk | 5 | 5 | 100.00 | |||
| kmac_mem_walk | 1.090s | 36.633us | 5 | 5 | 100.00 | |
| mem_partial_access | 5 | 5 | 100.00 | |||
| kmac_mem_partial_access | 1.740s | 78.635us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 50 | 50 | 100.00 | |||
| kmac_long_msg_and_output | 3505.570s | 235827.021us | 50 | 50 | 100.00 | |
| burst_write | 50 | 50 | 100.00 | |||
| kmac_burst_write | 1371.370s | 35986.829us | 50 | 50 | 100.00 | |
| test_vectors | 40 | 40 | 100.00 | |||
| kmac_test_vectors_sha3_224 | 2198.630s | 90943.774us | 5 | 5 | 100.00 | |
| kmac_test_vectors_sha3_256 | 2142.300s | 446197.457us | 5 | 5 | 100.00 | |
| kmac_test_vectors_sha3_384 | 34.300s | 6859.403us | 5 | 5 | 100.00 | |
| kmac_test_vectors_sha3_512 | 1166.660s | 161014.811us | 5 | 5 | 100.00 | |
| kmac_test_vectors_shake_128 | 1968.050s | 85861.236us | 5 | 5 | 100.00 | |
| kmac_test_vectors_shake_256 | 2052.480s | 61977.120us | 5 | 5 | 100.00 | |
| kmac_test_vectors_kmac | 4.080s | 848.115us | 5 | 5 | 100.00 | |
| kmac_test_vectors_kmac_xof | 4.070s | 240.481us | 5 | 5 | 100.00 | |
| sideload | 50 | 50 | 100.00 | |||
| kmac_sideload | 544.390s | 99203.208us | 50 | 50 | 100.00 | |
| app | 50 | 50 | 100.00 | |||
| kmac_app | 363.820s | 53609.874us | 50 | 50 | 100.00 | |
| app_with_partial_data | 10 | 10 | 100.00 | |||
| kmac_app_with_partial_data | 370.840s | 14220.652us | 10 | 10 | 100.00 | |
| entropy_refresh | 50 | 50 | 100.00 | |||
| kmac_entropy_refresh | 416.250s | 78248.226us | 50 | 50 | 100.00 | |
| error | 50 | 50 | 100.00 | |||
| kmac_error | 472.470s | 19458.728us | 50 | 50 | 100.00 | |
| key_error | 50 | 50 | 100.00 | |||
| kmac_key_error | 18.140s | 12733.968us | 50 | 50 | 100.00 | |
| sideload_invalid | 50 | 50 | 100.00 | |||
| kmac_sideload_invalid | 9.550s | 632.822us | 50 | 50 | 100.00 | |
| edn_timeout_error | 20 | 20 | 100.00 | |||
| kmac_edn_timeout_error | 41.110s | 3028.664us | 20 | 20 | 100.00 | |
| entropy_mode_error | 20 | 20 | 100.00 | |||
| kmac_entropy_mode_error | 34.990s | 776.006us | 20 | 20 | 100.00 | |
| entropy_ready_error | 10 | 10 | 100.00 | |||
| kmac_entropy_ready_error | 79.380s | 27312.883us | 10 | 10 | 100.00 | |
| lc_escalation | 50 | 50 | 100.00 | |||
| kmac_lc_escalation | 45.240s | 1729.376us | 50 | 50 | 100.00 | |
| stress_all | 50 | 50 | 100.00 | |||
| kmac_stress_all | 2791.570s | 82491.696us | 50 | 50 | 100.00 | |
| intr_test | 50 | 50 | 100.00 | |||
| kmac_intr_test | 1.170s | 14.858us | 50 | 50 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| kmac_alert_test | 1.330s | 260.799us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| kmac_tl_errors | 3.760s | 639.744us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| kmac_tl_errors | 3.760s | 639.744us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| kmac_csr_hw_reset | 1.490s | 86.842us | 5 | 5 | 100.00 | |
| kmac_csr_rw | 1.500s | 26.260us | 20 | 20 | 100.00 | |
| kmac_csr_aliasing | 7.910s | 540.656us | 5 | 5 | 100.00 | |
| kmac_same_csr_outstanding | 3.300s | 406.135us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| kmac_csr_hw_reset | 1.490s | 86.842us | 5 | 5 | 100.00 | |
| kmac_csr_rw | 1.500s | 26.260us | 20 | 20 | 100.00 | |
| kmac_csr_aliasing | 7.910s | 540.656us | 5 | 5 | 100.00 | |
| kmac_same_csr_outstanding | 3.300s | 406.135us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| kmac_shadow_reg_errors | 2.560s | 905.962us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| kmac_shadow_reg_errors | 2.560s | 905.962us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| kmac_shadow_reg_errors | 2.560s | 905.962us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| kmac_shadow_reg_errors | 2.560s | 905.962us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 4.580s | 458.092us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| kmac_tl_intg_err | 5.960s | 269.148us | 20 | 20 | 100.00 | |
| kmac_sec_cm | 85.060s | 32345.461us | 5 | 5 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| kmac_tl_intg_err | 5.960s | 269.148us | 20 | 20 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 50 | 50 | 100.00 | |||
| kmac_lc_escalation | 45.240s | 1729.376us | 50 | 50 | 100.00 | |
| sec_cm_sw_key_key_masking | 50 | 50 | 100.00 | |||
| kmac_smoke | 74.870s | 4902.384us | 50 | 50 | 100.00 | |
| sec_cm_key_sideload | 50 | 50 | 100.00 | |||
| kmac_sideload | 544.390s | 99203.208us | 50 | 50 | 100.00 | |
| sec_cm_cfg_shadowed_config_shadow | 20 | 20 | 100.00 | |||
| kmac_shadow_reg_errors | 2.560s | 905.962us | 20 | 20 | 100.00 | |
| sec_cm_fsm_sparse | 5 | 5 | 100.00 | |||
| kmac_sec_cm | 85.060s | 32345.461us | 5 | 5 | 100.00 | |
| sec_cm_ctr_redun | 5 | 5 | 100.00 | |||
| kmac_sec_cm | 85.060s | 32345.461us | 5 | 5 | 100.00 | |
| sec_cm_packer_ctr_redun | 5 | 5 | 100.00 | |||
| kmac_sec_cm | 85.060s | 32345.461us | 5 | 5 | 100.00 | |
| sec_cm_cfg_shadowed_config_regwen | 50 | 50 | 100.00 | |||
| kmac_smoke | 74.870s | 4902.384us | 50 | 50 | 100.00 | |
| sec_cm_fsm_global_esc | 50 | 50 | 100.00 | |||
| kmac_lc_escalation | 45.240s | 1729.376us | 50 | 50 | 100.00 | |
| sec_cm_fsm_local_esc | 5 | 5 | 100.00 | |||
| kmac_sec_cm | 85.060s | 32345.461us | 5 | 5 | 100.00 | |
| sec_cm_absorbed_ctrl_mubi | 10 | 10 | 100.00 | |||
| kmac_mubi | 402.490s | 35009.545us | 10 | 10 | 100.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 50 | 50 | 100.00 | |||
| kmac_smoke | 74.870s | 4902.384us | 50 | 50 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 10 | 10 | 100.00 | |||
| kmac_stress_all_with_rand_reset | 331.110s | 10562.436us | 10 | 10 | 100.00 | |