Simulation Results

Simulation Results: csrng

24/04/2026 16:00:28 DVSim: v1.17.3 sha: 8007f61 json Branch: master Tool: xcelium [unknown]

Coverage statistics

Total
94.27 %

code
96.23 %

assert
95.85 %

func
90.74 %

block
98.59 %

line
99.57 %

branch
96.46 %

toggle
93.64 %

FSM
95.24 %

Validation stages

V1		100.00%
V2		96.94%
V2S		99.93%
V3		0.00%

105/105 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				50	50	100.00
	csrng_smoke	5.000s	197.975us	50	50	100.00
csr_hw_reset				5	5	100.00
	csrng_csr_hw_reset	2.000s	95.462us	5	5	100.00
csr_rw				20	20	100.00
	csrng_csr_rw	4.000s	73.768us	20	20	100.00
csr_bit_bash				5	5	100.00
	csrng_csr_bit_bash	20.000s	980.864us	5	5	100.00
csr_aliasing				5	5	100.00
	csrng_csr_aliasing	4.000s	174.045us	5	5	100.00
csr_mem_rw_with_rand_reset				20	20	100.00
	csrng_csr_mem_rw_with_rand_reset	3.000s	43.033us	20	20	100.00
regwen_csr_and_corresponding_lockable_csr				25	25	100.00
	csrng_csr_rw	4.000s	73.768us	20	20	100.00
	csrng_csr_aliasing	4.000s	174.045us	5	5	100.00

1425/1470 passed

96.94 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
interrupts				200	200	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
alerts				500	500	100.00
	csrng_alert	42.000s	3431.640us	500	500	100.00
err				500	500	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
cmds				6	50	12.00
	csrng_cmds	157.000s	10817.968us	6	50	12.00
life cycle				6	50	12.00
	csrng_cmds	157.000s	10817.968us	6	50	12.00
stress_all				49	50	98.00
	csrng_stress_all	633.000s	25143.116us	49	50	98.00
intr_test				50	50	100.00
	csrng_intr_test	4.000s	188.805us	50	50	100.00
alert_test				50	50	100.00
	csrng_alert_test	5.000s	274.462us	50	50	100.00
tl_d_oob_addr_access				20	20	100.00
	csrng_tl_errors	12.000s	813.678us	20	20	100.00
tl_d_illegal_access				20	20	100.00
	csrng_tl_errors	12.000s	813.678us	20	20	100.00
tl_d_outstanding_access				50	50	100.00
	csrng_csr_hw_reset	2.000s	95.462us	5	5	100.00
	csrng_csr_rw	4.000s	73.768us	20	20	100.00
	csrng_csr_aliasing	4.000s	174.045us	5	5	100.00
	csrng_same_csr_outstanding	5.000s	205.665us	20	20	100.00
tl_d_partial_access				50	50	100.00
	csrng_csr_hw_reset	2.000s	95.462us	5	5	100.00
	csrng_csr_rw	4.000s	73.768us	20	20	100.00
	csrng_csr_aliasing	4.000s	174.045us	5	5	100.00
	csrng_same_csr_outstanding	5.000s	205.665us	20	20	100.00

V2S

1344/1345 passed

99.93 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				25	25	100.00
	csrng_tl_intg_err	15.000s	1808.083us	20	20	100.00
	csrng_sec_cm	4.000s	257.083us	5	5	100.00
sec_cm_config_regwen				70	70	100.00
	csrng_csr_rw	4.000s	73.768us	20	20	100.00
	csrng_regwen	4.000s	98.103us	50	50	100.00
sec_cm_config_mubi				500	500	100.00
	csrng_alert	42.000s	3431.640us	500	500	100.00
sec_cm_intersig_mubi				49	50	98.00
	csrng_stress_all	633.000s	25143.116us	49	50	98.00
sec_cm_main_sm_fsm_sparse				705	705	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
	csrng_sec_cm	4.000s	257.083us	5	5	100.00
sec_cm_cmd_stage_fsm_sparse				705	705	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
	csrng_sec_cm	4.000s	257.083us	5	5	100.00
sec_cm_ctr_drbg_fsm_sparse				705	705	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
	csrng_sec_cm	4.000s	257.083us	5	5	100.00
sec_cm_ctr_drbg_ctr_redun				705	705	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
	csrng_sec_cm	4.000s	257.083us	5	5	100.00
sec_cm_gen_cmd_ctr_redun				705	705	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
	csrng_sec_cm	4.000s	257.083us	5	5	100.00
sec_cm_ctrl_mubi				500	500	100.00
	csrng_alert	42.000s	3431.640us	500	500	100.00
sec_cm_main_sm_ctr_local_esc				700	700	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
sec_cm_constants_lc_gated				49	50	98.00
	csrng_stress_all	633.000s	25143.116us	49	50	98.00
sec_cm_sw_genbits_bus_consistency				500	500	100.00
	csrng_alert	42.000s	3431.640us	500	500	100.00
sec_cm_tile_link_bus_integrity				20	20	100.00
	csrng_tl_intg_err	15.000s	1808.083us	20	20	100.00
sec_cm_aes_cipher_fsm_sparse				705	705	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
	csrng_sec_cm	4.000s	257.083us	5	5	100.00
sec_cm_aes_cipher_fsm_redun				700	700	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
sec_cm_aes_cipher_ctrl_sparse				700	700	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
sec_cm_aes_cipher_fsm_local_esc				700	700	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
sec_cm_aes_cipher_ctr_redun				705	705	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00
	csrng_sec_cm	4.000s	257.083us	5	5	100.00
sec_cm_aes_cipher_data_reg_local_esc				700	700	100.00
	csrng_intr	19.000s	1573.700us	200	200	100.00
	csrng_err	7.000s	20.593us	500	500	100.00

0/10 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				0	10	0.00
	csrng_stress_all_with_rand_reset	2.000s	9.929us	0	10	0.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (csrng_scoreboard.sv:660) [scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (* [] vs [*])
	csrng_cmds	1473981110752026315154922436907000238655555953475823940796245188066726635996	130	UVM_FATAL @ 59844524 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 336105510389389061142306444158682013679 [0xfcdb9112cf06d9cf9885cb8b48541fef]) UVM_INFO @ 59844524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	42645177999119772600159905848707764550278991804280627182208351259023207704240	149	UVM_FATAL @ 100795093 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 102814969911169955922827097033371777351 [0x4d597163c016ac6c582ebc0222ef7947]) UVM_INFO @ 100795093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	30044462569291092456411409752530075830278005210147836926917528963145026750700	130	UVM_FATAL @ 48439593 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 63575743238685294573517644267824298728 [0x2fd43e25c829b5a1f03d3fd0a3433ae8]) UVM_INFO @ 48439593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	71098699560983863199237887285939589438665294412646993209024104799629579399641	150	UVM_FATAL @ 363466558 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 232990678485016388686433197520314366941 [0xaf485f589a9d61e5d0bc0ff88c62fbdd]) UVM_INFO @ 363466558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	106052491912482500925260395333195439649736872174939056087181404488369095315412	130	UVM_FATAL @ 46452193 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 81675800120311030593601675268573259519 [0x3d722fd9e185879dbba2148039d666ff]) UVM_INFO @ 46452193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	70692647598342945344725594296833465368449484882100755676198467804200099476297	130	UVM_FATAL @ 93740963 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 116467135775728631428923973244634137022 [0x579ec122812fda77a790fd02cbf201be]) UVM_INFO @ 93740963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	70043344649973047637880884941824692945600474777797741102424259982185045705021	130	UVM_FATAL @ 439496349 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 301308733276231458102524765569104932917 [0xe2adf3815521f883035ff8bddbf2f035]) UVM_INFO @ 439496349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	78643205734718988301186804427391068179608217657266604214779145986572954050799	130	UVM_FATAL @ 100689908 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 150240258625548172081421963391448357011 [0x710738a6b8463c998599c1751da39893]) UVM_INFO @ 100689908 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	105589079941762958768260798087052048101453790886394590123728254194469812455430	130	UVM_FATAL @ 157365590 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 189406997838684700551259354737376475020 [0x8e7e75fc52d133122da683bd51dfb78c]) UVM_INFO @ 157365590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	12595831772534525020645794868406843959564677156451051758976016202142725487334	130	UVM_FATAL @ 201966621 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 109362793015469183190567617211516094091 [0x524681fe54b5c68aefbaca1ee268868b]) UVM_INFO @ 201966621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	88465266546248787606159149368869878188299929389960384106917527445599082880874	150	UVM_FATAL @ 412210902 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 156188928058411423328876905561477234034 [0x7580e4b2c74d8859e685e6a5aaea3d72]) UVM_INFO @ 412210902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	30754808585406502376176817425074919888236979243385873974769611146337456395656	130	UVM_FATAL @ 230031326 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 114711423925523517370682691543730941741 [0x564c9ddb792893dbe04f3a1a05e6ef2d]) UVM_INFO @ 230031326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	19984418744576265671202189633589400855155111023038752540701581841202756498268	130	UVM_FATAL @ 89901245 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 206043807026251148129568739881700378510 [0x9b02980203bc4096879752fef33d478e]) UVM_INFO @ 89901245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	115576195431062577437018360906403493066954130243946560344626326856443228511146	139	UVM_FATAL @ 107424791 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 96251310125369467321021421478288923249 [0x486953fa25b68d0ad76534ac6f3d9a71]) UVM_INFO @ 107424791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	111556664067740140899533820552674405121140234483180308406510032979484545378145	130	UVM_FATAL @ 97662790 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 215683710709963425891523043791794099277 [0xa2432bf45a798fea403bf6b38f88544d]) UVM_INFO @ 97662790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	64301032632520447525080856463825472863801896450768326710135607629781107491762	130	UVM_FATAL @ 38062892 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 130545562683681619731921120604075509453 [0x6236292c050f6f01a33a840a29a2c6cd]) UVM_INFO @ 38062892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	100955288751976000295843261209886250341765680023667639029539380176004541403138	130	UVM_FATAL @ 561409667 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 141285534445764431937191496532194397079 [0x6a4a9aa98f7150710f1c5865998e8b97]) UVM_INFO @ 561409667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	103272657584234362594735345111039749692103895637926296439899530096544236399295	130	UVM_FATAL @ 56022101 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 222208174414344933407151865550666750343 [0xa72bbcd9db2bda87679eb1b46e385987]) UVM_INFO @ 56022101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	20369272304144199176328287179772922548291303696962466821900133302985710287377	130	UVM_FATAL @ 132963174 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 148125720682836623479661460337436790764 [0x6f6ff9e1ab877a9ffe3b1f94ed6a0fec]) UVM_INFO @ 132963174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	35810887837674947009894484691825789544031424755803258482235170181730658814422	130	UVM_FATAL @ 61562738 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 103803691092104457148987963991952510919 [0x4e17dd1b85f03a272b23dfa0e0a4cfc7]) UVM_INFO @ 61562738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	16123140236011996804103440462151064721062018683935981851218089374298482275664	130	UVM_FATAL @ 18463041 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 340115865873736062352335086990339907240 [0xffdfeedd54b865b3c16f4aec00509ea8]) UVM_INFO @ 18463041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	85694971089694423244527176400313348146019280034383408842194512757670710952791	130	UVM_FATAL @ 139197467 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 328119996105274502918319135464880876826 [0xf6d99cd2612a04adcb466718fbcc2d1a]) UVM_INFO @ 139197467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	26041878425256810233330739443906470770432184433058884759275911525085543746217	130	UVM_FATAL @ 387857726 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 308902585044572632170705871853243101466 [0xe864794dd05f50c65647d4b48ce8711a]) UVM_INFO @ 387857726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	61115095294081778684363217633142967792127132237057518155629688901321698387714	130	UVM_FATAL @ 380695940 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 214939502312894555566725182404207062203 [0xa1b3d7a5cbff06f46f2669362a182cbb]) UVM_INFO @ 380695940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	103393478671729319029792803149946201875410197784907239122093277726271013136290	130	UVM_FATAL @ 56962145 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 30502264159093172965256538244470926172 [0x16f285bb740cf3d0ca5b7789b971eb5c]) UVM_INFO @ 56962145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	63336449476957269449189345007912499318296648877628127559668643078723304992305	130	UVM_FATAL @ 101804607 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 255132922520160033769353139592258903852 [0xbff0d0435ffe204141d6a2c076bbdf2c]) UVM_INFO @ 101804607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	49512038502836476046370532576991474182572246306669655909757725632350275817531	140	UVM_FATAL @ 433292536 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 175606288632170695450633592071516647358 [0x841c8a7d018abc7aa45675eb1f68efbe]) UVM_INFO @ 433292536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	44565916725269758519158012808130975093035764109562578130326991747727439318268	130	UVM_FATAL @ 148428978 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 219206269313142875164190112336642102405 [0xa4e99780a5d579ffa7b632b913e8d485]) UVM_INFO @ 148428978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	92492218182171870961803013515951006299733997142554452629860974764936337246867	139	UVM_FATAL @ 62882556 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 324163103983981457617082587416950302531 [0xf3df8afa5e70968619b6ab60dae16743]) UVM_INFO @ 62882556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	102967125862281922899462988027250020718513410181381829030571843844638956912201	130	UVM_FATAL @ 47910859 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 79878366399242060506648762006374488220 [0x3c180386cdf43b2f288cc5c7d8e0989c]) UVM_INFO @ 47910859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	3759567365805930468781390063115041606490081804125526921943078172149024453458	130	UVM_FATAL @ 236277478 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 287153381172887441896779455692621942437 [0xd807bac3595e1426c8b80348f3830ea5]) UVM_INFO @ 236277478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	82169381950364074158039570982902396393696281837439508510376116149520179396459	130	UVM_FATAL @ 44626788 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 124439733674857531828122573163677492379 [0x5d9e388f3c40475d3914df9cce4e249b]) UVM_INFO @ 44626788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	111381994537192916319906600538758081346633699974063792849782612978645806645123	130	UVM_FATAL @ 63074287 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 290742756880482524810925533854981975450 [0xdabb04a61129895b74273d3e21b46d9a]) UVM_INFO @ 63074287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	59715419334108178669466998537204253299572641255776089931479362153966698614726	130	UVM_FATAL @ 43193718 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 218347119514060973533740655322324360534 [0xa4442025a2de1938209d273f61795d56]) UVM_INFO @ 43193718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	24931337325257211429463945003233431310862562409399305928894082829803747453610	130	UVM_FATAL @ 878053053 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 275341528535237568177065669295084321275 [0xcf24d9771fb8c2b230e5bc09d24ab9fb]) UVM_INFO @ 878053053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	103008425937526327643308085306982194850690752774625581249576520054751598051945	130	UVM_FATAL @ 25367440 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 91737495328042706768917808319630960195 [0x4503ffb9b70ae174b4c4a3e55ac06643]) UVM_INFO @ 25367440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	29699794692183885036387734492839385802991717904346365202912685157723707362460	130	UVM_FATAL @ 29027976 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 254434238555627893188045650079600016815 [0xbf6a407bf07b73bc043acc51b716fdaf]) UVM_INFO @ 29027976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	85470932740018806112825124288828380471644070223492005220416518907741257515274	130	UVM_FATAL @ 441568446 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 48433963673717521219678284946481931622 [0x24700ac6d55cbff50c8190b586b8e566]) UVM_INFO @ 441568446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	45950435626048652952515312062068603375342689245192896158609474370273952206078	130	UVM_FATAL @ 65955826 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 1295206869072062511172374176149679480 [0xf972a102cdeaf3d9e91797bd362d78]) UVM_INFO @ 65955826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	75738673470827790176195931671455614502069544907569375682615323796414238685821	130	UVM_FATAL @ 62356580 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 158610512493520353667850661148826265788 [0x77534607694bd0ab6f3cf1e9bc2fe8bc]) UVM_INFO @ 62356580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	78076465659845706264635805921646676481264541883413333656276966654534093799378	130	UVM_FATAL @ 111277713 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 106482958673630901268244667768237543250 [0x501bdf32b7e0bd7f2e72227d59994f52]) UVM_INFO @ 111277713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	csrng_cmds	35094544400012149199399413112052898992554654295807788769575553971458628667467	130	UVM_FATAL @ 10263279 ps: (csrng_scoreboard.sv:660) [uvm_test_top.env.scoreboard] Check failed cs_item[app].genbits_q[i] == prd_genbits_q[app][i] (0 [0x0] vs 30854907962820686009794493419478008733 [0x1736706a04594e6a4270424df3a3439d]) UVM_INFO @ 10263279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Job timed out after * minutes
	csrng_stress_all_with_rand_reset	33224799285996793422733219950302198436530028450811412765333705849342323779056	None	Job timed out after 180 minutes
	csrng_stress_all_with_rand_reset	64785160293351008947536304585908604649175046277819654168992190417039893291226	None	Job timed out after 180 minutes
	csrng_stress_all_with_rand_reset	13786603411802150158188296871058056981880026448822728808655280690143491271971	None	Job timed out after 180 minutes
	csrng_stress_all_with_rand_reset	108744194055580803241018166125303726306922047388906132193671812546148521909482	None	Job timed out after 180 minutes
	csrng_stress_all_with_rand_reset	58826368441746491511419724252653485994296705897771566027799251778014366447828	None	Job timed out after 180 minutes
	csrng_stress_all_with_rand_reset	65227674997016447788460871315968389705257354149939471820033894280452779497567	None	Job timed out after 180 minutes
	csrng_stress_all_with_rand_reset	75947089258035901847426943309179357757303662939770971797801007883249054668107	None	Job timed out after 180 minutes
	csrng_stress_all_with_rand_reset	44388960834753383329690913146850050938644766958938132244761789782720730565119	None	Job timed out after 180 minutes
	csrng_stress_all_with_rand_reset	10741447946113580904495108703808486223764029608799761921686453050590899779044	None	Job timed out after 180 minutes
UVM_FATAL sequencer [SEQ_NOT_DONE] Sequence m_edn_push_seq[*] already started
	csrng_stress_all_with_rand_reset	39034552704166555778809851543439508031042409529934439703308775475548867422907	108	UVM_FATAL @ 9929406 ps: uvm_test_top.env.m_edn_agent[1].m_cmd_push_agent.sequencer [SEQ_NOT_DONE] Sequence uvm_test_top.env.m_edn_agent[1].m_cmd_push_agent.sequencer.m_edn_push_seq[1] already started UVM_INFO @ 9929406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csrng_scoreboard.sv:629) [scoreboard] Check failed cs_item[app].status == cmd_sts[app] (* [] vs [*])
	csrng_cmds	52048425035519066299565620720757004921232452949411936385550947655465169933401	139	UVM_FATAL @ 36394169 ps: (csrng_scoreboard.sv:629) [uvm_test_top.env.scoreboard] Check failed cs_item[app].status == cmd_sts[app] (0 [0x0] vs 3 [0x3]) UVM_INFO @ 36394169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:268) [scoreboard] Check failed expected_alert[alert_name].expected == * (* [] vs [*]) alert recov_alert triggered unexpectedly
	csrng_cmds	8916488586895273806892792714865472174622680702637996520902859481009289025563	139	UVM_ERROR @ 49008696 ps: (cip_base_scoreboard.sv:268) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert recov_alert triggered unexpectedly UVM_INFO @ 49008696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csrng_scoreboard.sv:166) [scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (* [] vs [*]) Interrupt_pin: EntropyReq
	csrng_stress_all	112541671245112281710888208930580841196675641731033722716132675790817174559224	134	UVM_ERROR @ 208753753 ps: (csrng_scoreboard.sv:166) [uvm_test_top.env.scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (0x1 [1] vs 0x0 [0]) Interrupt_pin: EntropyReq UVM_INFO @ 208753753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---