Simulation Results: gpio

 
24/04/2026 16:00:28 DVSim: v1.17.3 sha: 8007f61 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.48 %
  • code
  • 92.60 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.38 %
  • cond
  • 95.54 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
99.22%
V2
92.09%
V2S
100.00%
V3
38.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.710s 114.643us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.550s 49.360us 50 50 100.00
gpio_smoke_en_cdc_prim 1.170s 90.874us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.170s 299.069us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.760s 29.834us 5 5 100.00
csr_rw 18 20 90.00
gpio_csr_rw 0.820s 51.956us 18 20 90.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 6.540s 12685.396us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 1.940s 307.341us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.260s 33.801us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 23 25 92.00
gpio_csr_rw 0.820s 51.956us 18 20 90.00
gpio_csr_aliasing 1.940s 307.341us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.620s 70.019us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.700s 59.138us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.260s 35.902us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.520s 75.422us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 3.090s 101.452us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 2.910s 186.157us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 18.150s 3197.734us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 4.350s 1360.255us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.270s 94.903us 50 50 100.00
stress_all 5 50 10.00
gpio_stress_all 76.850s 8552.660us 5 50 10.00
alert_test 50 50 100.00
gpio_alert_test 0.890s 37.721us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.710s 18.019us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.290s 164.874us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.290s 164.874us 20 20 100.00
tl_d_outstanding_access 42 50 84.00
gpio_csr_rw 0.820s 51.956us 18 20 90.00
gpio_same_csr_outstanding 1.210s 69.958us 14 20 70.00
gpio_csr_aliasing 1.940s 307.341us 5 5 100.00
gpio_csr_hw_reset 0.760s 29.834us 5 5 100.00
tl_d_partial_access 42 50 84.00
gpio_csr_rw 0.820s 51.956us 18 20 90.00
gpio_same_csr_outstanding 1.210s 69.958us 14 20 70.00
gpio_csr_aliasing 1.940s 307.341us 5 5 100.00
gpio_csr_hw_reset 0.760s 29.834us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
gpio_sec_cm 1.320s 178.080us 5 5 100.00
gpio_tl_intg_err 2.140s 426.104us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
gpio_tl_intg_err 2.140s 426.104us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 38 50 76.00
gpio_rand_straps 0.830s 13.559us 38 50 76.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 13.980s 430.026us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.940s 18.437us 50 50 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 3720344020036289188392164341180137014748674404635977227399391175313127179107 79
UVM_ERROR @ 3996298471 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3254242569 [0xc1f7cd09] vs 5599991 [0x5572f7])
UVM_INFO @ 3996298471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 79293268910654919689147346667697412784497405623909954887282606134659513540216 313
UVM_ERROR @ 7435352986 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2031811843 [0x791afd03])
UVM_INFO @ 7435352986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 467437340252492305846486817823961887253459216122408228753521458058185766088 804
UVM_ERROR @ 18711699662 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3849596023 [0xe5742c77])
UVM_INFO @ 18711699662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 7633170973153497266188580992536501865875782383837926955718690440208750491287 1053
UVM_ERROR @ 3799551654 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1623911172 [0x60caeb04])
UVM_INFO @ 3799551654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 63721928262638485670329552777080201191628925159353855584829493864483799298381 223
UVM_ERROR @ 680447842 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3051234128 [0xb5de2350])
UVM_INFO @ 680447842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 38458252285593629378575664579634851407769792141319159218880859915852907083573 233
UVM_ERROR @ 874222743 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4141467048 [0xf6d9c5a8] vs 319918261 [0x131190b5])
UVM_INFO @ 874222743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92832552299740787678071097193206646062985125063407915872185363739303034254506 196
UVM_ERROR @ 915906641 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1607209566 [0x5fcc125e])
UVM_INFO @ 915906641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 70369373295847507119048642240746044799698335744175186918563189031625968677098 431
UVM_ERROR @ 1568282466 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3025092221 [0xb44f3e7d] vs 1140056609 [0x43f3e221])
UVM_INFO @ 1568282466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 50745331531279753604489429853603542869077368164971024691720685375372534403847 344
UVM_ERROR @ 1984124693 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2493344557 [0x949d6b2d] vs 2333881910 [0x8b1c3636])
UVM_INFO @ 1984124693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 89610480736143962145429668990519456145565737628595234541437725901290219333138 689
UVM_ERROR @ 8272216905 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1306024466 [0x4dd85a12] vs 3001485502 [0xb2e708be])
UVM_INFO @ 8272216905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 36600258929284349594075745446541471679072863454206211973100257404349508972564 542
UVM_ERROR @ 13397719454 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4195676503 [0xfa14f157])
UVM_INFO @ 13397719454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 64439099650640777884593834324563150551008232364935990882661505650170551975381 78
UVM_ERROR @ 2814155529 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1316665385 [0x4e7ab829])
UVM_INFO @ 2814155529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 62468031383464147926159706387989438532112183574023460889777260221857133222677 75
UVM_ERROR @ 3825034 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1513333145 [0x5a33a199])
UVM_INFO @ 3825034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 111795560174315244047480994151861699563157523404507989526928622398719120987459 76
UVM_ERROR @ 1833801 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2335830666 [0x8b39f28a])
UVM_INFO @ 1833801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 67643541432001902470740512065458562139120700922645362159979122664300653944581 937
UVM_ERROR @ 7874455127 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3998721506 [0xee57a5e2])
UVM_INFO @ 7874455127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 18178518959620529373566497271438220425724588406899000339620695925011386557717 217
UVM_ERROR @ 1543072112 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (970765369 [0x39dcb439] vs 3165124709 [0xbca7f865])
UVM_INFO @ 1543072112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 45022114544418680132312869932455967236508594502051059324919446843749096126454 233
UVM_ERROR @ 9076486154 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4038399253 [0xf0b51515])
UVM_INFO @ 9076486154 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 15408092242243014029368711175342000143673196558367750341680999278323566233747 75
UVM_ERROR @ 1185780 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 100157640 [0x5f848c8])
UVM_INFO @ 1185780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 56420517507886770208798438606525917136071501754920950796211404032079198931645 468
UVM_ERROR @ 1157427851 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3326330077 [0xc643c4dd] vs 395690803 [0x1795c333])
UVM_INFO @ 1157427851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 66318813058881243641947895390307704005891072952633569210051453703440209016138 75
UVM_ERROR @ 1393847 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 120838315 [0x733d8ab])
UVM_INFO @ 1393847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 110337643289362353067446092358369368929759470325248973565931398379633342167089 77
UVM_ERROR @ 106527463 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3840288591 [0xe4e6274f] vs 1506466361 [0x59cada39])
UVM_INFO @ 106527463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 95628601021521261035171563310261878423906173326647534368354290266744387981528 219
UVM_ERROR @ 1072598773 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3906948318 [0xe8df4cde] vs 775541066 [0x2e39d14a])
UVM_INFO @ 1072598773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 53820561332048847677298745890693988812370036583985046649903954603838788206942 1210
UVM_ERROR @ 6987782314 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3979408239 [0xed30f36f] vs 3345851440 [0xc76da430])
UVM_INFO @ 6987782314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 79377071641227805243581432584694988177720236532261452306387437495701870825060 75
UVM_ERROR @ 5052474 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 940154732 [0x38099f6c])
UVM_INFO @ 5052474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 111031150961808618695205232426013174294865943734354337893909177350049448907548 748
UVM_ERROR @ 4257198622 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2001811649 [0x775138c1] vs 2470228365 [0x933cb18d])
UVM_INFO @ 4257198622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 46027180198474116197446341189059553885319712477968858999650586803998995086470 75
UVM_ERROR @ 3794686 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1345717839 [0x5036064f])
UVM_INFO @ 3794686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 69066053011672201930751766098997341194750869470238092249800507540576190936503 589
UVM_ERROR @ 1757779045 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2702794914 [0xa11960a2])
UVM_INFO @ 1757779045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 72130771828512025457796830415916985672388851084666860262611737146969790496763 1311
UVM_ERROR @ 1538012825 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3268104058 [0xc2cb4f7a])
UVM_INFO @ 1538012825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 87587852951708649308464235436034908141467179486685971841103224744752072728320 1149
UVM_ERROR @ 1726826211 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1728836426 [0x670bf34a] vs 838771182 [0x31fea1ee])
UVM_INFO @ 1726826211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 72143499797347137259160459325717560807915099580747590456341614246757400642141 734
UVM_ERROR @ 3382362030 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3899297903 [0xe86a906f])
UVM_INFO @ 3382362030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92291651997225203569754499520699726182358159598887366872486690709582888081090 563
UVM_ERROR @ 727849155 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2299436825 [0x890e9f19] vs 2505665572 [0x95596c24])
UVM_INFO @ 727849155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 53942932025896750345220359526857892757460480912553146151892719547903942020394 171
UVM_ERROR @ 2022626860 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3460715301 [0xce465325] vs 3714627710 [0xdd68b87e])
UVM_INFO @ 2022626860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 36426558168402288793580905729503890566513088417658982033281560346950037653469 83
UVM_ERROR @ 1017004703 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2878240444 [0xab8e76bc])
UVM_INFO @ 1017004703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 5272755667903777609493626060459567685804376232916788711301634553279208618810 239
UVM_ERROR @ 530332006 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2190552864 [0x82912f20] vs 1290417526 [0x4cea3576])
UVM_INFO @ 530332006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 33679385336214360242742853866532305162985217982748947002918832104507195581541 75
UVM_ERROR @ 814532 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2248478099 [0x86050d93])
UVM_INFO @ 814532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 25112242747633943209450929488952856212545451200993116511435227859410060327463 2480
UVM_ERROR @ 48713437439 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3285703672 [0xc3d7dbf8])
UVM_INFO @ 48713437439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 106123898195485561534703703383294852944441768464157611632730198787247973397268 2056
UVM_ERROR @ 24475612326 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3793509257 [0xe21c5b89])
UVM_INFO @ 24475612326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 7339891931765588999723603350241926797238510077293984560194706721220046289903 387
UVM_ERROR @ 1109445940 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2262446890 [0x86da332a])
UVM_INFO @ 1109445940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 11901523962074067340748729494277379069195373812190885074622440528682717223051 78
UVM_ERROR @ 212461870 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3331059335 [0xc68bee87])
UVM_INFO @ 212461870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 39664793876076565746786384548577283841761792334606695896046695245665858199545 626
UVM_ERROR @ 1724000483 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1160091504 [0x45259770] vs 2954731857 [0xb01da151])
UVM_INFO @ 1724000483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 105048663283412436063176325022506544882298986145800798873069543324766192956329 76
UVM_ERROR @ 35574539 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3834894075 [0xe493d6fb] vs 1608895782 [0x5fe5cd26])
UVM_INFO @ 35574539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 50243840821720909708459762017804416799936271181558626467608272422158082263719 1799
UVM_ERROR @ 3379491716 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4014340719 [0xef45fa6f])
UVM_INFO @ 3379491716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 67397659869037628322022033507058667241304781385164524298934105698724313179050 75
UVM_ERROR @ 18587920 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3784564408 [0xe193deb8])
UVM_INFO @ 18587920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 111928352774736127546764745231145281335512068197535485796869342762038470860927 1430
UVM_ERROR @ 1473331598 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2801592413 [0xa6fce85d])
UVM_INFO @ 1473331598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 23852533074685279558456888513591724117128509452171310091832969373935595676741 613
UVM_ERROR @ 8793669164 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3261082172 [0xc2602a3c] vs 2349179134 [0x8c05a0fe])
UVM_INFO @ 8793669164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 108642636108119932809704509481785470485335653321340430427885407177660768900407 75
UVM_ERROR @ 4974140 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1590115670 [0x5ec73d56])
UVM_INFO @ 4974140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 18079596195508236973604573924708317062889763988373285605323432103733479097874 458
UVM_ERROR @ 1811454621 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2758886034 [0xa4714292] vs 3070099199 [0xb6fdfeff])
UVM_INFO @ 1811454621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 112783997825687677126575910071103103328150409109125097017456653056342681542928 445
UVM_ERROR @ 4393658911 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3841228036 [0xe4f47d04] vs 529087619 [0x1f893c83])
UVM_INFO @ 4393658911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 90414879355419600131150860152827530421079496758306639965196010382053087668561 80
UVM_ERROR @ 256802368 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1449167315 [0x566089d3])
UVM_INFO @ 256802368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 10544021529947471380252144212926383545830183486128229763291913239234745250349 75
UVM_ERROR @ 4755573 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4204025516 [0xfa9456ac])
UVM_INFO @ 4755573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 40830593769414453459775737126553195830089873296655364481853589417661637262807 2196
UVM_ERROR @ 27609335789 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1546805266 [0x5c326012] vs 2524139475 [0x96734fd3])
UVM_INFO @ 27609335789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 42984946395734568223923215435654489257154370364585285896724503429005131903401 75
UVM_ERROR @ 7465106 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4240311447 [0xfcbe0497])
UVM_INFO @ 7465106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 11568848888666502520903849440772675087783887680253054048204374074474357606340 894
UVM_ERROR @ 17571446271 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1506015696 [0x59c3f9d0] vs 679720754 [0x2883b732])
UVM_INFO @ 17571446271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 105911907759820335679305834406609733478688023138819114085165985243648325497217 1594
UVM_ERROR @ 3694691420 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1113979791 [0x4265fb8f] vs 1457701766 [0x56e2c386])
UVM_INFO @ 3694691420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 27220302281579900627122264731605886911818475857354940723307265944535576972193 75
UVM_ERROR @ 2189938 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3823030902 [0xe3ded276])
UVM_INFO @ 2189938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 27211296516367603649196364816486095688734177706227477699550249378882832766110 75
UVM_ERROR @ 24560643 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1582117282 [0x5e4d31a2])
UVM_INFO @ 24560643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 16357057928970634159027270827406055644511869631082091050750962731310996652826 75
UVM_ERROR @ 963835 ps: (gpio_scoreboard.sv:248) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1877904697 [0x6fee8d39])
UVM_INFO @ 963835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 112760409606276455192033470099243955092758512611040006219072908490250523617469 157
UVM_FATAL @ 51370402 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 51370402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101967063302167696211570444687977718376926224248492331073448178499760932517269 80
UVM_FATAL @ 12728621 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 12728621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40591617906282107523673658876218271411584709111433094040537397543887181836237 268
UVM_FATAL @ 10493159403 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 10493159403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 19774042853907328389479784359637704021650449598441448519510875276743200511635 108
UVM_FATAL @ 390091248 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 390091248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 22027913999216307108383751717609885908849029827743563505907412437886586925400 200
UVM_FATAL @ 2112478394 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2112478394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 56698238150457213298503742539482043427732552925183761293651389478913252819635 80
UVM_FATAL @ 6444799 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 6444799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 100641634614668780070668133475686498556519137142596764719538037963651350981827 80
UVM_FATAL @ 7497489 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 7497489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 86243619236398868819786654558305903987037120777875036238146656848316853151937 80
UVM_FATAL @ 10324112 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 10324112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23427771686175302805540484645420685474988025031943117850311290336780325796025 154
UVM_FATAL @ 2053556462 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2053556462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 12561989861872330407574306046470403982123307435935638284148061423977255167307 200
UVM_FATAL @ 339268641 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 339268641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69617863903248738456494501674868117756876805154988436706150257680646350532030 80
UVM_FATAL @ 24292328 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 24292328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21762350061757659896527723857246298968043978253148801509024903737662161018364 80
UVM_FATAL @ 2013511 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2013511 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 52771983078517270793387313568615599235561095936405168057745778977990622704560 80
UVM_FATAL @ 34049103 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 34049103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 89357977445163539793285309958956146256586572814659830833049072276687147408021 247
UVM_FATAL @ 1042010664 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1042010664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 65527989369132295883077580989656115869840089985704443286861197965209978283241 81
UVM_FATAL @ 305605448 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 305605448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104318786041924824698495231858088390218525448934769225033410230894602617461785 81
UVM_FATAL @ 13963644 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 13963644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 74366520129665962305245386424691791743781772917932631865425247463294353611306 80
UVM_FATAL @ 13210020 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 13210020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 2352112477906141169548732742925804452318632674589112609051984803117126930908 81
UVM_FATAL @ 215933985 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 215933985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 113032074894909683093949361161534331043454886347329310790340386309964557064915 82
UVM_FATAL @ 6677688702 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 6677688702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 72696039169756281412089457843524817759979194832138726022644027460254237572777 363
UVM_FATAL @ 6636492144 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 6636492144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45495916085011226520733137785547705976937423559864364354291794390673146170290 730
UVM_FATAL @ 430025734 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 430025734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 100788141172248049019791602251497289588727676838310332131373941294723148114707 308
UVM_FATAL @ 984182046 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 984182046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 3237374176366521331074642682200383602887417102226105694568945370671944120690 193
UVM_FATAL @ 5785469824 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5785469824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 74813063082831077119513038126733105170910308171184439182717220041762516974085 80
UVM_FATAL @ 28585131 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 28585131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21873594776356342755778510794206321206868612425615713061730217944987634622527 333
UVM_FATAL @ 4087602262 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4087602262 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*
gpio_stress_all_with_rand_reset 13442561289761412700557417039406068685877259248634119408369631203131127721482 78
UVM_FATAL @ 256856406 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 256856406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 55381242845118051668970324606474251289877286201186007978545791088324605446088 84
UVM_FATAL @ 601781675 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 601781675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68334669885888167497912218540125953851342561245948307897988793234198805417499 78
UVM_FATAL @ 2905583 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 2905583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 8540459467211703932012107570485386593141652193398017480635969579527951346416 78
UVM_FATAL @ 4541707 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 4541707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 65767937084600794443038768979787928937193928814869183527841022697556044054534 78
UVM_FATAL @ 1534072 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1534072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 38803131288523401246010915466192490699859360446127214385933661705075710084466 79
UVM_FATAL @ 107458104 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 107458104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 15327256432290536429175869929153509301348481717359786217597152591908270071783 78
UVM_FATAL @ 251543225 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 251543225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 65882473347084778936459611977924563197337677551313931536039902450810472633515 79
UVM_FATAL @ 203411895 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 203411895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 8450956720481361547973256975040354926193387124224691744109373586872724298362 80
UVM_FATAL @ 7008901 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 7008901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104857771947084558990608289735840273383918120880501773050265256324428433342057 80
UVM_FATAL @ 156202664 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 156202664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 88385391409199630640848885106432307035357365015010872943228414263697194279109 78
UVM_FATAL @ 3923942 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 3923942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40400384866505046661853555871867283975225673842598660342785771552728811686394 80
UVM_FATAL @ 3817162 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 3817162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16834184543863202192362652673752415475380316939764203435848432034013846544313 78
UVM_FATAL @ 38708809 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 38708809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 18872263377445049364862110308736246182802988656825644171622350361314466443800 78
UVM_FATAL @ 6338061 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 6338061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 3782547641314028175950937235361262586386707977164453187656226124700446628358 80
UVM_FATAL @ 4285032 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 4285032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 14472307741853738668868024652037434328413054326798799836660937337502618292970 78
UVM_FATAL @ 8506858 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 8506858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 46450647312423946208264246366732074787189662164099661741411841831504705614239 78
UVM_FATAL @ 5508482 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 5508482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 24611505954805436560355989555989791546530692130243336466786868359855543763314 78
UVM_FATAL @ 472559795 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 472559795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 25874879262776203795977962924422504829206728414676076800336005404102847377443 333
UVM_FATAL @ 1396082166 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1396082166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 53195396272465658092906233385557490177650088917180067418676505427543710158858 78
UVM_FATAL @ 14245771 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 14245771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 24826529708304741872777012055732647684348172962704495008216735771624931418537 115
UVM_FATAL @ 1634533568 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1634533568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16384681760136513664544666408671783733475498057135468478777017425309520793991 80
UVM_FATAL @ 634296190 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 634296190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 31618278136186201284545065728997949920784078494695517477741107566060326584850 78
UVM_FATAL @ 141227048 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 141227048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76615041332198092552141017610937297882726471071053340073361882018280154191484 81
UVM_FATAL @ 959325077 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 959325077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 8202295663203565440787596104606992164508513897374295534001120643221020707412 78
UVM_FATAL @ 26255865 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 26255865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_*.value_* reset value: *
gpio_csr_rw 103432345385418418785059631174684868568966608606361388530459854852797183778962 77
UVM_ERROR @ 8740526 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (3 [0x3] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_6.value_0 reset value: 0x0
UVM_INFO @ 8740526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:649) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 7722955746713375280635876960566989012255766207840159639840809644325333173601 79
UVM_ERROR @ 54430642 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (5 [0x5] vs 0 [0x0]) addr 0x82279470 read out mismatch
UVM_INFO @ 54430642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 85100391641900728817163231099071325727253425992340219080986148665477982588599 77
UVM_ERROR @ 35260950 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (9 [0x9] vs 0 [0x0]) addr 0xbca84680 read out mismatch
UVM_INFO @ 35260950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 43539556409390075062749014645629942969084294346027698486169943032544872409530 78
UVM_ERROR @ 48544749 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0xf0bf8b78 read out mismatch
UVM_INFO @ 48544749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 92358538547585702404084665394681816774925939226126494712556693936933406348124 77
UVM_ERROR @ 7174138 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (628480 [0x99700] vs 628481 [0x99701]) addr 0x57d62f60 read out mismatch
UVM_INFO @ 7174138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 111539948326998038070045945294465243387746854159158866922816177267246400199187 77
UVM_ERROR @ 178033822 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0xf7683584 read out mismatch
UVM_INFO @ 178033822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 93806173650274192547604905458768966948289703033866580334972473716625690400017 77
UVM_ERROR @ 40263542 ps: (cip_base_vseq.sv:649) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (10101508 [0x9a2304] vs 10101509 [0x9a2305]) addr 0xc55fbf4c read out mismatch
UVM_INFO @ 40263542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_* reset value: *
gpio_csr_rw 27723205677699670446009088800935279843639554980539471085571873450240648682870 78
UVM_ERROR @ 17084511 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (4 [0x4] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_4 reset value: 0x0
UVM_INFO @ 17084511 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---