Simulation Results

50/50 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
xbar_smoke				50	50	100.00
	xbar_smoke	22.770s	1750.200us	50	50	100.00

835/850 passed

98.24 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
xbar_base_random_sequence				50	50	100.00
	xbar_random	223.360s	6035.462us	50	50	100.00
xbar_random_delay				292	300	97.33
	xbar_smoke_zero_delays	8.090s	125.126us	50	50	100.00
	xbar_smoke_large_delays	399.290s	44213.692us	50	50	100.00
	xbar_smoke_slow_rsp	491.180s	158567.286us	50	50	100.00
	xbar_random_zero_delays	87.680s	565.544us	50	50	100.00
	xbar_random_large_delays	1738.240s	181306.176us	48	50	96.00
	xbar_random_slow_rsp	2640.850s	129780.929us	44	50	88.00
xbar_unmapped_address				100	100	100.00
	xbar_unmapped_addr	132.080s	4150.292us	50	50	100.00
	xbar_error_and_unmapped_addr	137.760s	9257.986us	50	50	100.00
xbar_error_cases				100	100	100.00
	xbar_error_random	219.860s	8685.838us	50	50	100.00
	xbar_error_and_unmapped_addr	137.760s	9257.986us	50	50	100.00
xbar_all_access_same_device				93	100	93.00
	xbar_access_same_device	396.460s	20105.780us	50	50	100.00
	xbar_access_same_device_slow_rsp	3452.700s	346330.864us	43	50	86.00
xbar_all_hosts_use_same_source_id				50	50	100.00
	xbar_same_source	211.420s	28032.477us	50	50	100.00
xbar_stress_all				100	100	100.00
	xbar_stress_all	1510.540s	294044.560us	50	50	100.00
	xbar_stress_all_with_error	1565.470s	129261.382us	50	50	100.00
xbar_stress_with_reset				100	100	100.00
	xbar_stress_all_with_rand_reset	1600.770s	25599.450us	50	50	100.00
	xbar_stress_all_with_reset_error	2208.840s	7052.418us	50	50	100.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
	xbar_random_large_delays	14074603152453734336908450391608900862625966552640322638881161149679231241849	167	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_random_large_delays	38882914426806456605018324463950574040386726038393918417687062860153852345918	182	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_random_slow_rsp	64782225461861772328594973584029948188958556884573810355333848259082673623128	198	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_random_slow_rsp	84087222436123328213784082181026128447641362372957767362402147137378050585566	212	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_access_same_device_slow_rsp	86805536599461105889144835261739900381317928737389683707934640033740752672819	152	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_random_slow_rsp	64660540898238507844105419567596539179832190040477364705600343272361193960903	181	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_access_same_device_slow_rsp	42228598336168089295991723855951727052508768650432489588952699062982979473260	152	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_access_same_device_slow_rsp	82589703095111635914733311330628827478775075726998090936081986070284425031200	167	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_random_slow_rsp	47880005873500956633247524939163683099020550221178912687863276839310241217759	181	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_random_slow_rsp	40848107461765745232064747821256311199448223500852380523591694345479181888840	143	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_random_slow_rsp	78400182190753480688772846765991730190683153936363031639997472801738520933829	167	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_access_same_device_slow_rsp	6739428590476063256093226559384831372428537453033646149235663129154483688106	152	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	xbar_access_same_device_slow_rsp	91644804734298981664258728221176436488328378979933851185387625462506266417599	138	UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Job timed out after * minutes
	xbar_access_same_device_slow_rsp	5900640018070227949523249564791852909992873226455144998458421948601999400270	None	Job timed out after 60 minutes
	xbar_access_same_device_slow_rsp	9992991010788676924700301259942759039603568342819227934295372079789515074275	None	Job timed out after 60 minutes

V1		100.00%
V2		98.24%

Simulation Results: xbar_main

Error Messages