Simulation Results: otp_ctrl

 
01/05/2026 16:00:28 DVSim: v1.17.3 sha: 1521b5f json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 87.64 %
  • code
  • 81.73 %
  • assert
  • 94.74 %
  • func
  • 86.46 %
  • line
  • 88.82 %
  • branch
  • 86.87 %
  • cond
  • 88.58 %
  • toggle
  • 90.04 %
  • FSM
  • 54.33 %
Validation stages
V1
86.21%
V2
63.57%
V2S
65.81%
V3
9.90%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.540s 808.782us 1 1 100.00
smoke 39 50 78.00
otp_ctrl_smoke 17.480s 1210.749us 39 50 78.00
csr_hw_reset 5 5 100.00
otp_ctrl_csr_hw_reset 3.730s 297.016us 5 5 100.00
csr_rw 20 20 100.00
otp_ctrl_csr_rw 3.510s 599.640us 20 20 100.00
csr_bit_bash 5 5 100.00
otp_ctrl_csr_bit_bash 9.660s 428.908us 5 5 100.00
csr_aliasing 5 5 100.00
otp_ctrl_csr_aliasing 12.530s 329.069us 5 5 100.00
csr_mem_rw_with_rand_reset 15 20 75.00
otp_ctrl_csr_mem_rw_with_rand_reset 8.720s 1872.496us 15 20 75.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
otp_ctrl_csr_rw 3.510s 599.640us 20 20 100.00
otp_ctrl_csr_aliasing 12.530s 329.069us 5 5 100.00
mem_walk 5 5 100.00
otp_ctrl_mem_walk 2.810s 635.418us 5 5 100.00
mem_partial_access 5 5 100.00
otp_ctrl_mem_partial_access 2.610s 83.690us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 0 1 0.00
otp_ctrl_partition_walk 154.940s 9226.205us 0 1 0.00
init_fail 201 300 67.00
otp_ctrl_init_fail 9.850s 2490.580us 201 300 67.00
partition_check 18 60 30.00
otp_ctrl_background_chks 35.200s 15257.582us 3 10 30.00
otp_ctrl_check_fail 23.790s 1544.105us 15 50 30.00
regwen_during_otp_init 18 50 36.00
otp_ctrl_regwen 14.650s 4443.311us 18 50 36.00
partition_lock 21 50 42.00
otp_ctrl_dai_lock 57.290s 9661.237us 21 50 42.00
interface_key_check 14 50 28.00
otp_ctrl_parallel_key_req 27.930s 13730.467us 14 50 28.00
lc_interactions 197 250 78.80
otp_ctrl_parallel_lc_req 27.700s 2935.611us 25 50 50.00
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
otp_dai_errors 41 50 82.00
otp_ctrl_dai_errs 73.160s 28338.031us 41 50 82.00
otp_macro_errors 20 50 40.00
otp_ctrl_macro_errs 47.000s 18567.877us 20 50 40.00
test_access 17 50 34.00
otp_ctrl_test_access 28.910s 4739.718us 17 50 34.00
stress_all 2 50 4.00
otp_ctrl_stress_all 220.040s 63067.365us 2 50 4.00
intr_test 50 50 100.00
otp_ctrl_intr_test 3.500s 639.107us 50 50 100.00
alert_test 50 50 100.00
otp_ctrl_alert_test 6.260s 521.111us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
otp_ctrl_tl_errors 9.760s 2913.085us 20 20 100.00
tl_d_illegal_access 20 20 100.00
otp_ctrl_tl_errors 9.760s 2913.085us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
otp_ctrl_csr_hw_reset 3.730s 297.016us 5 5 100.00
otp_ctrl_csr_rw 3.510s 599.640us 20 20 100.00
otp_ctrl_csr_aliasing 12.530s 329.069us 5 5 100.00
otp_ctrl_same_csr_outstanding 7.480s 2373.268us 20 20 100.00
tl_d_partial_access 50 50 100.00
otp_ctrl_csr_hw_reset 3.730s 297.016us 5 5 100.00
otp_ctrl_csr_rw 3.510s 599.640us 20 20 100.00
otp_ctrl_csr_aliasing 12.530s 329.069us 5 5 100.00
otp_ctrl_same_csr_outstanding 7.480s 2373.268us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
tl_intg_err 24 25 96.00
otp_ctrl_tl_intg_err 46.550s 6062.309us 20 20 100.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
prim_count_check 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
prim_fsm_check 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_bus_integrity 20 20 100.00
otp_ctrl_tl_intg_err 46.550s 6062.309us 20 20 100.00
sec_cm_secret_mem_scramble 39 50 78.00
otp_ctrl_smoke 17.480s 1210.749us 39 50 78.00
sec_cm_part_mem_digest 39 50 78.00
otp_ctrl_smoke 17.480s 1210.749us 39 50 78.00
sec_cm_dai_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_kdi_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_lci_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_part_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_scrmbl_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_timer_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_dai_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_kdi_seed_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_kdi_entropy_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_lci_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_part_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_scrmbl_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_timer_integ_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_timer_cnsty_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_timer_lfsr_redun 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_dai_fsm_local_esc 176 205 85.85
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_lci_fsm_local_esc 172 200 86.00
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
sec_cm_kdi_fsm_local_esc 172 200 86.00
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
sec_cm_part_fsm_local_esc 192 250 76.80
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
otp_ctrl_macro_errs 47.000s 18567.877us 20 50 40.00
sec_cm_scrmbl_fsm_local_esc 172 200 86.00
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
sec_cm_timer_fsm_local_esc 176 205 85.85
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_dai_fsm_global_esc 176 205 85.85
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_lci_fsm_global_esc 172 200 86.00
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
sec_cm_kdi_fsm_global_esc 172 200 86.00
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
sec_cm_part_fsm_global_esc 192 250 76.80
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
otp_ctrl_macro_errs 47.000s 18567.877us 20 50 40.00
sec_cm_scrmbl_fsm_global_esc 172 200 86.00
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
sec_cm_timer_fsm_global_esc 176 205 85.85
otp_ctrl_parallel_lc_esc 47.720s 6626.552us 172 200 86.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_part_data_reg_integrity 201 300 67.00
otp_ctrl_init_fail 9.850s 2490.580us 201 300 67.00
sec_cm_part_data_reg_bkgn_chk 15 50 30.00
otp_ctrl_check_fail 23.790s 1544.105us 15 50 30.00
sec_cm_part_mem_regren 21 50 42.00
otp_ctrl_dai_lock 57.290s 9661.237us 21 50 42.00
sec_cm_part_mem_sw_unreadable 21 50 42.00
otp_ctrl_dai_lock 57.290s 9661.237us 21 50 42.00
sec_cm_part_mem_sw_unwritable 21 50 42.00
otp_ctrl_dai_lock 57.290s 9661.237us 21 50 42.00
sec_cm_lc_part_mem_sw_noaccess 21 50 42.00
otp_ctrl_dai_lock 57.290s 9661.237us 21 50 42.00
sec_cm_access_ctrl_mubi 21 50 42.00
otp_ctrl_dai_lock 57.290s 9661.237us 21 50 42.00
sec_cm_token_valid_ctrl_mubi 39 50 78.00
otp_ctrl_smoke 17.480s 1210.749us 39 50 78.00
sec_cm_lc_ctrl_intersig_mubi 21 50 42.00
otp_ctrl_dai_lock 57.290s 9661.237us 21 50 42.00
sec_cm_test_bus_lc_gated 39 50 78.00
otp_ctrl_smoke 17.480s 1210.749us 39 50 78.00
sec_cm_test_tl_lc_gate_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 362.680s 30418.794us 4 5 80.00
sec_cm_direct_access_config_regwen 18 50 36.00
otp_ctrl_regwen 14.650s 4443.311us 18 50 36.00
sec_cm_check_trigger_config_regwen 39 50 78.00
otp_ctrl_smoke 17.480s 1210.749us 39 50 78.00
sec_cm_check_config_regwen 39 50 78.00
otp_ctrl_smoke 17.480s 1210.749us 39 50 78.00
sec_cm_macro_mem_integrity 20 50 40.00
otp_ctrl_macro_errs 47.000s 18567.877us 20 50 40.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 0 1 0.00
otp_ctrl_low_freq_read 99.730s 58841.812us 0 1 0.00
stress_all_with_rand_reset 10 100 10.00
otp_ctrl_stress_all_with_rand_reset 184.930s 72245.668us 10 100 10.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *
otp_ctrl_csr_mem_rw_with_rand_reset 91566847498330621339506052558860861916600893042469183250673170432802619815831 91
UVM_ERROR @ 122620335 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 122620335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 59998806922121603730756582088204978714398266615635025323226713094162855378448 91
UVM_ERROR @ 45817839 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 45817839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 39922422273470135606241123137735126160923970529902511264308667603434370495844 91
UVM_ERROR @ 500287215 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 500287215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 85219441917195198026866231514603499315464639417964466912803180049588574524113 97
UVM_ERROR @ 71308391 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 71308391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 88973293838202814546400011207775273815253198902850731842678892005167940278112 2297
UVM_ERROR @ 478841521 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 478841521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 81397936258805787535909762446969351112256962413974349259118936115573229503050 1949
UVM_ERROR @ 829941392 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 829941392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 66501789907505889428700197352175323889848769894709180475663054850609168560695 91
UVM_ERROR @ 62043005 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62043005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12192237907095072608313781929350942283999260917306082780612553985934148401134 12160
UVM_ERROR @ 1265111219 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1265111219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 75363769649240602131734095588370910030554136718436621042635842875565855759351 14892
UVM_ERROR @ 1954172937 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1954172937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 112213247746541619041278305900573418719751093106233415453226146187242532967739 91
UVM_ERROR @ 61061816 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61061816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 67059965865870654173398945805494871124588354662982865096387333069816062982401 485
UVM_ERROR @ 90792360 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 90792360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 80781627560297499483483829923416344307276694466510928219031033581759586546943 168
UVM_ERROR @ 1115428771 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1115428771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63014312809552398971029932017957282855926309575088081097851859711327302469973 91
UVM_ERROR @ 31254328 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31254328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 56143284083999861229820157654780057290564247424013935784212220870401318910649 91
UVM_ERROR @ 498086543 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 498086543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *
otp_ctrl_csr_mem_rw_with_rand_reset 97620834749524028818070271237882291151633624725519081008449430278016771520724 97
UVM_ERROR @ 130390611 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 130390611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 104556187029017302450904871573685017129128248535799101444963519863316834961981 91
UVM_ERROR @ 106859121 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 106859121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 82179257784205088573254876438633262451522585394224517627757817164583743869843 16609
UVM_ERROR @ 697532966 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 697532966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 64149607564513654272147986074666815482569546700118802815229047469865926716669 6992
UVM_ERROR @ 3498804614 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 3498804614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49625089251356679821817996417638672883643380459820284756085925231450280385220 50340
UVM_ERROR @ 2860970983 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 2860970983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 6099395421805962201147927347406884614244689266022805190615907864524079450714 459
UVM_ERROR @ 142027360 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 142027360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 9362576177615920865073651814747376089766272265193189714672432709327721972175 2323
UVM_ERROR @ 334576190 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 334576190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 72504138500117431576787575218289431959752909321862792990672075235038718586936 5843
UVM_ERROR @ 755737779 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 755737779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 89961937674687165356888142967876113560813700439740606776629720184172588126666 14115
UVM_ERROR @ 12960266817 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 12960266817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 22194118176149620185897400922361111190327214321364139367518057139528996031924 4913
UVM_ERROR @ 2196908920 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 2196908920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7292181509885391549528189527085922746856780391624327444505936845544612145193 25181
UVM_ERROR @ 6153550572 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 6153550572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 39028996119391543420535257829392168435895623128890283567043386296969055531995 91
UVM_ERROR @ 30968010 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 30968010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73909468539170574920484842406257878024388022145023692120067899737171810181474 93845
UVM_ERROR @ 72245668380 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 72245668380 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 48710575522439726149751016031484701182710606171190705675753495372737171942661 35176
UVM_ERROR @ 41987205700 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 41987205700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49968772073217787206133582285760671593187682967084338718797921446393346916509 35971
UVM_ERROR @ 12346512220 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 12346512220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12701286361265080962755343092788844942778259939431028605657317090139201435628 249
UVM_ERROR @ 11855591316 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 11855591316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 45957458775028311392726942400934770839651763360406656670695682507930583315641 55271
UVM_ERROR @ 6912918319 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 6912918319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 44628637605920935840920434801181597014388422470532838217254793485891331181216 2517
UVM_ERROR @ 638428002 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 638428002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 9670178160267441463119854726911888967031260006658544773415616843492690683861 28498
UVM_ERROR @ 1764753089 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 1764753089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 67867451424923681027303859084176097378181763037167819038480410944154495483724 91
UVM_ERROR @ 60046341 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 60046341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73365492808752306104355889631823582688142597569751346090345073061582909019060 156
UVM_ERROR @ 4732779065 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 4732779065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 31407134010362548166567336936483091660411947012361460523310949773588106732362 91
UVM_ERROR @ 54591860 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 54591860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12883417053756082139936110742932145299601558024626824484176912309236179139368 91
UVM_ERROR @ 44991892 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 44991892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57262962436620637720102092933344320908875557429145633452748986276965913173023 20421
UVM_ERROR @ 7127407248 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 7127407248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 10627081484851212529854795988528652610316155190973622235443024159745818581103 257
UVM_ERROR @ 15288258585 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 15288258585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 23572438794278324018883159705613174352883937214378399194598073013589362966158 91
UVM_ERROR @ 43935466 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 43935466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 59058779437769915280233586742039686612382620063267912478723041646987965177050 165
UVM_ERROR @ 13631128801 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 13631128801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 72431898873018571515607863676455623924173589961516209901026989464993497935799 11158
UVM_ERROR @ 2687862664 ps: (otp_ctrl_scoreboard.sv:2213) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (4294967295 [0xffffffff] vs 0 [0x0]) d_data mismatch when d_error = 1
UVM_INFO @ 2687862664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: *
otp_ctrl_partition_walk 89324219704256587618283064198899035399484228429374276600271379856790735547184 165375
UVM_ERROR @ 9226205418 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 9226205418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 21070886453668922412786142121186353726305813397022799495902144507706093116812 3806
UVM_ERROR @ 1420315478 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1420315478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 111500628420470599896627685595489207234533131140244242485095072282483795064187 2176
UVM_ERROR @ 1168445528 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1168445528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 16550055192353261462825914636145477160210780517362216185591688313744265227757 1366
UVM_ERROR @ 75119284 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 75119284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 46347430612814574592432561000871420957241394288066020883149109578881584450602 456
UVM_ERROR @ 70890220 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 70890220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 7785575734484876694645435979421561892989728011649906280128099448954239020279 99
UVM_ERROR @ 70900669 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 70900669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 14765852208634730797152044027190055087733212549516326217691352995870034063127 3770
UVM_ERROR @ 189279049 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 189279049 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 69320093146138031688075276694467302863294290415553158807065273644809468259683 3088
UVM_ERROR @ 259473558 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 259473558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35735467238469398970840271256508505985617077719197482958558142856404396663851 1773
UVM_ERROR @ 220533597 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 220533597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 114875524119203589898193125988471232787397682752527824618785487139091950004684 1154
UVM_ERROR @ 132299998 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 132299998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 52370659889164363129593341462900425946807040062468792591263776422817824328037 720
UVM_ERROR @ 110706616 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 110706616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 68844853868444155517256318659631172286726835451137138384263511006444954575139 870
UVM_ERROR @ 67939118 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 67939118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 114182129824694465395526498116786268675130215921088605101523540859633557469473 5306
UVM_ERROR @ 222879300 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 222879300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 103219260275993241870869537406635688495646089969106291884560109980089301258799 2378
UVM_ERROR @ 160720670 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 160720670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 49956338793465079537943517054899459198707988357636707534105642857548740981533 11274
UVM_ERROR @ 377556835 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 377556835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 46932424250324402611268270614327469178641295090777403266809361108783494548981 99
UVM_ERROR @ 162709342 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 162709342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 5367469284134766082639797863383216707060947568234907135571141693623884867472 4382
UVM_ERROR @ 364473908 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 364473908 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 86052431242739174800110594386297503270501674337182429008417152534071474456714 697
UVM_ERROR @ 203082391 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 203082391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 79947030843066306363117860829671386745512622715501301043139877395476529676835 3262
UVM_ERROR @ 1061012160 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1061012160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61249406910983711390039798063300052372468970599563396151556973038036711248758 705
UVM_ERROR @ 83045050 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 83045050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 40849516081745054451168148741689702791858639194875798039281991404776478657787 1578
UVM_ERROR @ 1015857510 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1015857510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 114454650369124035784912425198038229317809318616821783299671066985502661336366 276
UVM_ERROR @ 317011290 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 317011290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 87632172875424877311899403980084398262041098896337957165828546348767145193091 2174
UVM_ERROR @ 99443185 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 99443185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 67481128162828447086378733677340964693637662406231131971924362074109173299513 4388
UVM_ERROR @ 160455029 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 160455029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 53907014816038875533475790163940125004908099975796827896394121771048521539901 1832
UVM_ERROR @ 1326006122 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1326006122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 14682751517349390876870759855794424252881444086949911514133686532428451703167 6950
UVM_ERROR @ 956917100 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 956917100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 56229715418308135234896349947503025120542977450469101130532672839897666294970 1066
UVM_ERROR @ 110464407 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 110464407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 75122917753622436596430266715654463254853425853938732003012330095982953580011 636
UVM_ERROR @ 286984108 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 286984108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 14024430040614796730853166071646309026689922032568765306533673681041302242128 319
UVM_ERROR @ 121947435 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 121947435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 71549044724519188399288194029817803329700836614587442228976643240115044728519 5888
UVM_ERROR @ 1825211487 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1825211487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114551455644331082135212938591048469718091032710754741741103274833014039879761 99
UVM_ERROR @ 64870276 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 64870276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 100418470340618954158878714240766869446256413983247670486087930452937871395613 3486
UVM_ERROR @ 260296740 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 260296740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 50599247188680144864830446627441264374362792483258375158251774048089154775928 8670
UVM_ERROR @ 496489722 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 496489722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 55854373926836802878391570888624747897659314201610660709652282129456857625279 191
UVM_ERROR @ 37256287 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 37256287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 23216718910342461892614902660016583300517058871962283169138188068104857479816 1056
UVM_ERROR @ 113916630 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 113916630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 43706968389881746474509267935204867120581882680949938417472740010396496793075 7496
UVM_ERROR @ 758403963 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 758403963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 107266682465733426847617365394526380909080825428188346590203666592379598676903 10224
UVM_ERROR @ 4007220093 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 4007220093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 87930303137520298768946892183020040206299948230207525275427817080282532392255 7134
UVM_ERROR @ 712394843 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 712394843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 7625058583855222181932374802745618563554602087645785577600425099353985325850 2067
UVM_ERROR @ 58418855 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 58418855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 90798561457275294392754728891351365921963701234237927974355620177430551050813 901
UVM_ERROR @ 206431563 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 206431563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 10673603999908697319974358869492344459066330125931375666061682466036068031738 2360
UVM_ERROR @ 1375399146 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1375399146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38209027707766823651709121985860824721754086070824935889173843740442409106911 99
UVM_ERROR @ 95505313 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 95505313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 96613107601902194857395457546905889089141076415596151150310398267438039627783 1759
UVM_ERROR @ 74925989 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 74925989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 64398747541154475210224012335096913221743832932469858754585582397504129122421 2446
UVM_ERROR @ 73642308 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 73642308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 71766622948212375011406661905212747112120184494892992978586104992514438915479 6204
UVM_ERROR @ 3638075514 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 3638075514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 15152519052825265818413150416953815313230153027874837394801452523897942487418 6066
UVM_ERROR @ 239422730 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 239422730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35453102136450283376780358550350068779882370589610954034182934393258371494381 455
UVM_ERROR @ 78547903 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 78547903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 70057373133784116025636478365046410335483623437338145611467891858895540360970 3470
UVM_ERROR @ 91883757 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 91883757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 50197073225230048146258509105202939682933296134180710014951638827368879250534 2059
UVM_ERROR @ 78118914 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 78118914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 14159607507164199736077032665711616687678611422223330319849282116038840586196 2294
UVM_ERROR @ 124990560 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 124990560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 44080445816858386756897258712258863126017797870337815225593605941085118473222 1425
UVM_ERROR @ 808687652 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 808687652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 74481839454330335146791059189407231720519505495318243134738877003117495551206 3566
UVM_ERROR @ 132649928 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 132649928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 5360425360836032909818407976867403991522128825662918900682001726792764387283 7720
UVM_ERROR @ 206957307 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 206957307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 8758874934950803974161251852456137983231970092664111165463807716673386562311 1845
UVM_ERROR @ 58469413 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 58469413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 4447940112379611809689691616683127452699054571949612374898401174246317693792 1724
UVM_ERROR @ 68803011 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 68803011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 48440638793155775966186910492214642572714385256759300576397917244731307966872 273
UVM_ERROR @ 58604110 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 58604110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 101251706982674461630463823469292023356271551011261001906615788243064954684561 4972
UVM_ERROR @ 126064650 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 126064650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 97637040875536820269907372390424377594677405648524291699052589493201651551746 5718
UVM_ERROR @ 2851536784 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 2851536784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 103279661474217892530868745474169224524537387998730028976094662569182728228491 8314
UVM_ERROR @ 260693046 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 260693046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 51858710500646254221134476007405007409454100076910506104358201424925289327623 4434
UVM_ERROR @ 165447659 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 165447659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 784186333296049793395492735244317646546617767287319572329283348237201314966 5826
UVM_ERROR @ 944544181 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 944544181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72172811772687122838947416388564723106946791139188700437828472252562138949108 1925
UVM_ERROR @ 93287170 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 93287170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 29331725091689140681967712835743229538300538237082834674040738233308673457076 611
UVM_ERROR @ 44851156 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 44851156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94451323424070213634516398225712130350464233437453974581430789448638344034467 1951
UVM_ERROR @ 64173087 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 64173087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 78407137710000807871980992233170976345015646474886953179562816962008443779217 607
UVM_ERROR @ 38827525 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38827525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 71505353508118673742202443354391079513092460682541285511157450045701496038669 657
UVM_ERROR @ 203216510 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 203216510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 86067859123319400302484880633558147241393019361077066996196006302962452954269 887
UVM_ERROR @ 51698768 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 51698768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 88300730183150784713888642108392683840083663653252045929907127897976388826480 759
UVM_ERROR @ 80904309 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 80904309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 83975101269267296605668248152836463957381421108013883284551124926579449660280 897
UVM_ERROR @ 1001767310 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1001767310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 60017043363923770826019648907227130368856611989493186611654852526012195532445 867
UVM_ERROR @ 41420228 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 41420228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 101300499369800590966793276715974564243827597942562679798109168107773609791162 1319
UVM_ERROR @ 49734689 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 49734689 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72997341295179570716870198667413054375010646042879318655902292131875369912512 141
UVM_ERROR @ 51195084 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 51195084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24942404513109129824427157908239704363635954073075175006743842096619087565948 1347
UVM_ERROR @ 148617961 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 148617961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 88636991319567021961597897796132528219179450149875270090290271085151300873996 1189
UVM_ERROR @ 52525441 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 52525441 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 79920440792934412425967416819036985944532265455272573205808975966149929515551 141
UVM_ERROR @ 67620155 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 67620155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 62617313129884128676327253616351334505802169585052216202179527753901202368095 1517
UVM_ERROR @ 59453170 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 59453170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 21015299555451041854571677929925492642989628086204885256032882875692217346413 1937
UVM_ERROR @ 900264725 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 900264725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 12245079956132844553739758783608701026388301940929361762538547499935839294784 891
UVM_ERROR @ 693303792 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 693303792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 64000543206656019680119927223794320805275382919818803606747305743758781518469 223
UVM_ERROR @ 133298387 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 133298387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104950802138244940762274856735086135817198180588134354181083092261429270399473 2589
UVM_ERROR @ 1073941540 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1073941540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 90134398292354960969133703314007160307189352339391500415342283560884094214913 267
UVM_ERROR @ 61480503 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 61480503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 32112239402287996247061648042897371548132990209977693203913200575609087902198 1341
UVM_ERROR @ 55855960 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 55855960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 73366119878024055722835086328431437528810903597222191138285558797039838259841 1999
UVM_ERROR @ 87122967 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 87122967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63737001452068610292179409423211754271706523209821024621584871224570632027226 139
UVM_ERROR @ 32073274 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 32073274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103664777524962235879339999538399553694969276784416555972385564722627898148662 747
UVM_ERROR @ 159307210 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 159307210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 106121865627467377840465501411776908513532234263487902525439583828277052252573 1697
UVM_ERROR @ 119030221 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 119030221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104709635583611376530665281271992908553592610407807981826132770286612567711026 851
UVM_ERROR @ 86805754 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 86805754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61262368378145203941256459483126456823880437783579479656654377345424140411642 1093
UVM_ERROR @ 114237196 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 114237196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100098154372843303515816623602891341626464468763866904034940690132068389140171 431
UVM_ERROR @ 595421929 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 595421929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42057145124980537566605782471532975573338504995493111729392377896920252784594 373
UVM_ERROR @ 184793096 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 184793096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 74772697996958840852767178920595465106938220278621153377810383721916644767922 145
UVM_ERROR @ 177918108 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 177918108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72670837654578211985246968967807955932910064986171781192315079602772060387609 145
UVM_ERROR @ 43643612 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 43643612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 60634988367334547092323790878401321330192259592941511394112263191859617516800 689
UVM_ERROR @ 49833929 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 49833929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 60644242327946851466735770172291251888993502996079060731541973515421847567846 2405
UVM_ERROR @ 247895432 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 247895432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114149651697002253103850172117781277083571760723682533679863785919178172502907 581
UVM_ERROR @ 51521976 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 51521976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 68856357541141200455806282956137011864431726215749144114356655674012647486654 285
UVM_ERROR @ 103427295 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 103427295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 15635251949654763301970493911493193406485401195727291308744966957605626814451 1615
UVM_ERROR @ 84172071 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 84172071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63770346305315689642690323934802289053994062496056443866907508998470476448933 1343
UVM_ERROR @ 70518072 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 70518072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 82145786367825957404284212186396225947788592481206140479016041351413089932209 329
UVM_ERROR @ 40345927 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 40345927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 34088933810451617051208168202735646072413913434832054745292729137761353150379 845
UVM_ERROR @ 87929778 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 87929778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 54429072408812413741528215760707879924321780753866285175922588730017714248925 1615
UVM_ERROR @ 848957872 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 848957872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 15178029438697357113248197326732187036769164908554697028698430840244522349803 187
UVM_ERROR @ 135922136 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 135922136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 73093543740082562207183865974931468814812710319542951419903914343148202884017 2043
UVM_ERROR @ 238338809 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 238338809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 101301047637633018978490614371071546109702173130887974490902380223169046060137 187
UVM_ERROR @ 851630441 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 851630441 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 76883866740351474272407937372706913951426587585316101037371910456267986714174 1295
UVM_ERROR @ 72913832 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 72913832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94400904729094447311226453313199757391357322704191281162518479893823275905629 1381
UVM_ERROR @ 198831603 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 198831603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22402342852164563522915688570399982270808672807535477080868590814523304770558 1817
UVM_ERROR @ 112216130 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 112216130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 27821661501367571792920628923638535068157753405641779141099883008638926143061 897
UVM_ERROR @ 59984972 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 59984972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94853062732235917166757876856953536229509976176863390648483315233828565489372 99
UVM_ERROR @ 33007955 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 33007955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41266385291548319927869033535739599501553432129616128024654929863516429518883 2223
UVM_ERROR @ 1443063573 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1443063573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 92184463397864379224321628022448306508729586722079700866835268937794096770197 745
UVM_ERROR @ 133229871 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 133229871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 34618707649570151797958856927183353114642565402831191742025694971649967302864 1857
UVM_ERROR @ 120977453 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 120977453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 31506817580239150501555865817031765023374116558986283637926972483138785463196 345
UVM_ERROR @ 35554474 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 35554474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 86509965942698251780163707989561579478832285218483443962893118406656204576746 645
UVM_ERROR @ 48294753 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 48294753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 11066926174415668527459326279833946353819906462736580257138812244773741561455 403
UVM_ERROR @ 37543437 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 37543437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 28968995424514713817209136564736470470394478415711329931436702088334239634581 199
UVM_ERROR @ 84704435 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 84704435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72157911374601558081970425706075907986774659377648468446475981027918430226179 229
UVM_ERROR @ 201040708 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 201040708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 1143441513708769617348480636278726666476174527586645527886306504668431645160 1275
UVM_ERROR @ 761265183 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 761265183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 19547569083214667067380887289079046293770128463890741292798970891953130668216 913
UVM_ERROR @ 45290114 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 45290114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 93282256695469063826621396985680058626054068904488838860650530057452030412131 801
UVM_ERROR @ 169233406 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 169233406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 93417589780041344175609238817605174298957011670815047131667569633921450681527 403
UVM_ERROR @ 54659024 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 54659024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 20829265576182101778216996156765482816499834570865757471206829552624923415235 1925
UVM_ERROR @ 155497787 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 155497787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52499567872428866067282167310417419860895078282516463717682833567935839265848 1805
UVM_ERROR @ 95785034 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 95785034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 37144691617411144578952208861858334063207344955477498663856062446805851679047 141
UVM_ERROR @ 47381276 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 47381276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104080584356144673603434302582195138729857926986097824014626265291560331047722 1919
UVM_ERROR @ 89911652 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 89911652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 81068856229545198704451857537131014996740228538133210161310568089364964603940 2265
UVM_ERROR @ 261402736 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 261402736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 31571669054574403598570252279225376957743712370934830140581740191230049238468 1055
UVM_ERROR @ 1140187222 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1140187222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41674723548431712807308044525452489033788342887728635708856751117341656661244 417
UVM_ERROR @ 195996922 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 195996922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104370114041676015252212830034153068391150559527713201289773119303299469751484 1289
UVM_ERROR @ 751943692 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 751943692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 1653776256089198465661072291729291399203346345308363901416602356121830527463 2025
UVM_ERROR @ 100250125 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 100250125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 99534381082897076279340531977298984300156898189240831643803501344319064206397 507
UVM_ERROR @ 83346972 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 83346972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 36207926767617000482194504437045677857612244024499262307032017232513590963499 477
UVM_ERROR @ 149211919 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 149211919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 91286584252559090847225811360053311253714237006802576102162376366955708968566 617
UVM_ERROR @ 84754659 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 84754659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch
otp_ctrl_low_freq_read 68542222961353699557878210129197763602586095539781681951121742015295878108459 89
UVM_ERROR @ 58841812008 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 58841812008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 43126046723075459579291025266002255096254493693338457238539230012736837394902 1212
UVM_ERROR @ 48443061402 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 48443061402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 79449318228817780401127880919982290026764743661053881193039237018824025390741 90
UVM_ERROR @ 46331804733 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46331804733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 37170503254630668618940850870445397459363105473278326955975370998754291492344 90
UVM_ERROR @ 46070351105 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46070351105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 72451686169521415913184010346026693453301539936352045652797469008525265287415 64590
UVM_ERROR @ 63067365327 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 63067365327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 16997514730026293104048595751496359404067556558027031492522107196205345412074 2569
UVM_ERROR @ 47765985058 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 47765985058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 86971509545980633403369255617095411997028727879929982795032288014321050545469 39637
UVM_ERROR @ 26775139494 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 26775139494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 60159456851285642355427160222433984464626471516455046115795438080794783337458 90
UVM_ERROR @ 22187850454 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22187850454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 114982434922463457554022174639218197236449562989453509386307789259761286821375 43160
UVM_ERROR @ 24024486096 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 24024486096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 52484575340705402980685438776903443516055066326968900267995091894429458685460 90
UVM_ERROR @ 22257287633 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22257287633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 16666279926741665165286458686624646611388556957065886340069161167094260301783 43057
UVM_ERROR @ 23360302900 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 23360302900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 744282008912426679731592033016276577845823586298180656644972522593842251966 4266
UVM_ERROR @ 59525275388 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 59525275388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 77599897905174315971433958948135194360646718804546574437300516320030276058000 90
UVM_ERROR @ 22248102939 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22248102939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 73616278016763044228302198137620542250215799505939400503380122537572231972263 5136
UVM_ERROR @ 55522866297 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 55522866297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 28992831872681685205534858380077992090037493958262094678934363547022990546922 1880
UVM_ERROR @ 59293656584 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 59293656584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 105870906938918533656566399087365550325538473101491442670841526453000190900226 16571
UVM_ERROR @ 49152591577 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 49152591577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_*
otp_ctrl_parallel_lc_req 80747659733128654502656656297165493442748818897286371765528148428335796095685 2208
UVM_ERROR @ 78597914 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 78597914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 71046970006948384548816575986377409071579660741721554777302183909469463770746 1486
UVM_ERROR @ 241777982 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 241777982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 107749826336392215998511091774435440613604351842616039845905635985572523988355 930
UVM_ERROR @ 2069878024 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2069878024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 57740132639636522152914040723819463564685774362011861116538162532901382019149 2472
UVM_ERROR @ 131705842 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 131705842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 58068337951926983304812732709692915598220766063120831769196279314062714475007 4586
UVM_ERROR @ 425379468 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 425379468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 78019275933599042127861323473700617934261497047210361581708594961631186989068 2578
UVM_ERROR @ 79737437 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 79737437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 71441405119920163634807433594656703466955972154123620367675158602575443745917 2946
UVM_ERROR @ 1262196073 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1262196073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 12126183130465285249398558872425766287739507488121844241247220230763033453545 1768
UVM_ERROR @ 615850291 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 615850291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 109517186245562951720629145174147034229394929077994718639806314111095778101107 13470
UVM_ERROR @ 15257582100 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 15257582100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 83656468530602123587982985077630085268546766927050852689359603229970181875380 1776
UVM_ERROR @ 123055195 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 123055195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 17930534932160244384955414199050142103382071338288576404292677873775564809824 1354
UVM_ERROR @ 265528307 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 265528307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 69919962293890699275296302835451565836326822189269686671970241072922696210857 1804
UVM_ERROR @ 256756858 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 256756858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 40250249347560543813192896192984044964441840425199922945108049417429129487627 4299
UVM_ERROR @ 123395343 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 123395343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 74136542405463323218035148108056233042964617689321479908198145406559622934200 1439
UVM_ERROR @ 199568096 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 199568096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 18954051079754598134449153525588263881571747248599356437800765617391333546336 3186
UVM_ERROR @ 102106422 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 102106422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 53843405743361914723719491217633334286731983230385273430892789558678616888302 3279
UVM_ERROR @ 666695544 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 666695544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 27304368919443993877368115593819623289846028336131214913950227031095595564209 3116
UVM_ERROR @ 146002238 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 146002238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 29890382495625733574286039455315096231529546697312075329617807570836233817166 7308
UVM_ERROR @ 16757947411 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 16757947411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 100464832071565506105990726132895805362656768598629468908445806591432647119519 482
UVM_ERROR @ 287905989 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 287905989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 101939874872417104938661217797624455837127611856004856124868846331869459541788 1250
UVM_ERROR @ 96767992 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 96767992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 35482425347636474095983155894059180029634735385688980198448284236337682184258 2502
UVM_ERROR @ 288472052 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 288472052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 27128854219839212237985720037071853999419137184561391802285252883412708042892 3106
UVM_ERROR @ 2327079383 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2327079383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 76351556831563815203384925994120660518129316143988082354256461359142435877936 3566
UVM_ERROR @ 1482399886 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1482399886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 7105542874900496782734219544221552067775254031374215210576466636083821276292 2150
UVM_ERROR @ 330094012 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 330094012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 53080477094296311786911885216458762419829897229433979202507577611211944676791 5151
UVM_ERROR @ 6408212998 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6408212998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 111004387850778405682638811984536073921003435689304998143283964858177586662351 4757
UVM_ERROR @ 901203301 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 901203301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 59591565924398180255290814384963344881056533989561697751389636712899835558581 1664
UVM_ERROR @ 496577200 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 496577200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 15548833675518897102095693929828613895234891740858669629252221500907948452463 7377
UVM_ERROR @ 215364343 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 215364343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 3473447027603070973318702597048440401924176164775582015489141553558997880732 2024
UVM_ERROR @ 104154833 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 104154833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 8415440683812184196388103616791258293037917545618687686723110892081182795903 6716
UVM_ERROR @ 3312254941 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3312254941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 13225235559727180994553352111343241590096071719331869750642292898355692225625 9339
UVM_ERROR @ 169280693 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 169280693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 111122379146663976156199244898162311224183533798519219908978361379974739897993 1431
UVM_ERROR @ 82391736 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 82391736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 51217477792633444807261003817904852466483592208398246288793034134410747759647 9241
UVM_ERROR @ 1244447285 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1244447285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 89854031673858019121638197924225040497766062647551929132965745302913905081886 2426
UVM_ERROR @ 76804882 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 76804882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 111038595340064920103191173556420506306388893260178755317836065831193352550826 476
UVM_ERROR @ 268465387 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 268465387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 52591322253530921653465215743273479118593948238515393864150873096746345646690 2688
UVM_ERROR @ 17808808793 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 17808808793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 49671963515166915318590574473977337305650852449950267647775234197740717713392 8524
UVM_ERROR @ 2352918630 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2352918630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 86939395096378527395147535376035326330040208121136499457928482625041853779650 29296
UVM_ERROR @ 2945958430 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2945958430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 92551670073303112479907372376613548475176774985283147878579222340138603999559 1200
UVM_ERROR @ 67964225 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 67964225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 38037719099703873886393583916964340690290355238149667102457282681971129696247 2514
UVM_ERROR @ 643672515 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 643672515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 42706544973384954195203959381903727782143434788487703800972907940298549361972 325
UVM_ERROR @ 95082705 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 95082705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 8342754564856071350175277995220582194733110310508992558578803038512984858676 4810
UVM_ERROR @ 219111843 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 219111843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 6826830296977528452062600245759915970373629989378668147400654875898910300996 2345
UVM_ERROR @ 106497534 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 106497534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 15470359785862487363417684802866676481960330608180536866785714696359001541080 1786
UVM_ERROR @ 51280277 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 51280277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 90097473518905429955152731492717031139180835451838192003690129937706201717420 480
UVM_ERROR @ 52899727 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 52899727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 60043582295072363153030806846048731988662667624177193427920814806495988318557 1695
UVM_ERROR @ 941923610 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 941923610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 100082357177808426500920406192830861298393036730496813286023055020487589737855 5851
UVM_ERROR @ 158810521 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 158810521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 111009463374529478908424788228525334814531308404880641143175929971315934785638 23973
UVM_ERROR @ 3472037405 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3472037405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 109207704222009274427322170608806392749046142884979295278788995392669265608878 6318
UVM_ERROR @ 517008423 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 517008423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 14298319452715045636621310537009400586007123103787398779519400204709619960974 753
UVM_ERROR @ 3228181650 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3228181650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 48312573317799249995590580818393921947387020853780499713077091151984542883438 6284
UVM_ERROR @ 193024437 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 193024437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 62650223910110367625039554581762729503258325258640947000749995231022327121312 3576
UVM_ERROR @ 188374906 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 188374906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 56106528104325879826866412776104709660977988602200997286850275094416027274970 8009
UVM_ERROR @ 402779271 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 402779271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 79768292598364559257748552019167813292061785024939678343779684752688170403460 1164
UVM_ERROR @ 132888593 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 132888593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 72158840774497381918498026912111931684346050356841262029269936388958805830808 1663
UVM_ERROR @ 247586116 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 247586116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 37870811541428485872213301314088669857905991504707620782766435655677958435658 1318
UVM_ERROR @ 171944649 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 171944649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12328200656142033511766260810221005761944298421645203978125907293711397940744 7080
UVM_ERROR @ 525621197 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 525621197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 38659499340032063140848951309752386493721985063453690856783224027944869122179 1561
UVM_ERROR @ 565410866 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 565410866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 98634992105633789949480347822846088611816635812028432194599192271337236085218 6021
UVM_ERROR @ 820055728 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 820055728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 11216664854305158640846559997368301680058626549268553969641233985268141168684 2434
UVM_ERROR @ 674578145 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 674578145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 102794312247267368595870049682980062453017138866768783198037994662623324186198 10478
UVM_ERROR @ 813812628 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 813812628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 106598072986366242572218600955243083631036736547374816056777941826571096446239 1014
UVM_ERROR @ 1250767818 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1250767818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 107379662475601606176297040908422178809537261522290501025863317458366978823381 40111
UVM_ERROR @ 9272224943 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 9272224943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 43955997086590033745406861849505490087875519461515896111928142467877980512992 1320
UVM_ERROR @ 126217185 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 126217185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 42536440973310499370551290298182586537320106908794336173517837791796094655666 1026
UVM_ERROR @ 188416876 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 188416876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 66358676713418486107003482918100433607446217833730184162717068437954201584895 8277
UVM_ERROR @ 4744311222 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4744311222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 35456936099516877734080097072492985916874703145970061814563750910694549904161 2086
UVM_ERROR @ 2654433398 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2654433398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 64793627717899409657461487952311233160548881924174996730214649205249165405084 8369
UVM_ERROR @ 789844933 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 789844933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 54078615235627498114295887944575210105000345580165348603871846672625620524768 8570
UVM_ERROR @ 692311597 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 692311597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 57095746970615036483731355130522271725607603361299682799154873973441010882108 15909
UVM_ERROR @ 2418810955 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2418810955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7851694539889220256641069906682412289009715492482228001270900648511056580066 18319
UVM_ERROR @ 4176139449 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4176139449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 43349712285657984843579316064792669568564367424413708978874015872698785265548 1185
UVM_ERROR @ 1504080101 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1504080101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 44248564495998899195904607213207371174886147952773478460281134502369232258885 2290
UVM_ERROR @ 180433831 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 180433831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 14417726938927109780746036171426740477700894190952407201861981786001206621357 1778
UVM_ERROR @ 130917984 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 130917984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 73886368794237946917771447859921006941939141209011964035453702890021369809194 4200
UVM_ERROR @ 239475321 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 239475321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 101938961844802664290462530761958146759222945245258553231306574391562618611876 2332
UVM_ERROR @ 132827607 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 132827607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 47479127401894485071631183065536381189514680623886635892129372940728553970811 2124
UVM_ERROR @ 139932315 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 139932315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 15892071344916468065531687173134690659708518123831588310023492414621441154720 6921
UVM_ERROR @ 2378531176 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2378531176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 110143279281880560929411663220757581094161556958112704550545898757535009403510 2100
UVM_ERROR @ 112176993 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 112176993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 69667955927370391142164026526323049028283749048814676118346180296037367010421 10296
UVM_ERROR @ 558416748 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 558416748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 77393650300279984384489448408171303378645802346965854133331811125093580546082 1974
UVM_ERROR @ 1189194455 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1189194455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 24775154873724913087367011880776810171361651427357755282766763384147472728826 24614
UVM_ERROR @ 2706058471 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2706058471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 74784997794287752474585637430274787337324615924377732640494087752045240227129 752
UVM_ERROR @ 166489195 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 166489195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 4510822980343440871053134017239670761001971170314750999627141170060205621663 8759
UVM_ERROR @ 1559376280 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1559376280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 21597820904919323465495636678269243340922769233581739081430788634532563635940 62872
UVM_ERROR @ 8583907367 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 8583907367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 108099335619870498037471671295831565736227502425852039805964016687035248572192 1824
UVM_ERROR @ 383530010 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 383530010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 36778182727666667253637445959769837840970799329510611395257190199732518468281 10819
UVM_ERROR @ 1096374784 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1096374784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 32007654873434442592268300344000878624066819779578009160768869039338827109243 4259
UVM_ERROR @ 7834574088 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 7834574088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 28407024168721037650305543197449919710521324267962831414850449583648348213234 12327
UVM_ERROR @ 1320964430 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1320964430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 23756565256327149729083682266873543632133120066746785448755529471398531761806 9585
UVM_ERROR @ 199510338 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 199510338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 47649802368123371787245519264836084543212720416386816033550533004513822809007 1363
UVM_ERROR @ 454961866 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 454961866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 81031381626829863748607248340330306923031629291641491807129294688748456858350 2706
UVM_ERROR @ 542167493 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 542167493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 93690180090069095168439692767610920542074415545654106624654433605507690206841 1056
UVM_ERROR @ 1320647217 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1320647217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 95870799179451365992012961983561165334058127511085297333273032369317101366855 8230
UVM_ERROR @ 227276430 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 227276430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 22440136596339409727208542164310729625540873104578483394007433945722294974012 2790
UVM_ERROR @ 141804185 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 141804185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 51950493563330929918992349975883531829677142042429556642536275496789481134371 1605
UVM_ERROR @ 131126069 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 131126069 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 29144764226750591320263278210001868619995338594205327217834469925062073363603 1078
UVM_ERROR @ 1059575097 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1059575097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 39674588022539682740281173144572821503047391744043716990739931908308100121446 3936
UVM_ERROR @ 253317032 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 253317032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 4995787400972912703365893006757227895551363792753129594230514870936435055943 3322
UVM_ERROR @ 159153417 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 159153417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 73965944127437239556213722670727512220642508974533051436453781899685784388930 5532
UVM_ERROR @ 823844638 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 823844638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 87516047811329490847535595051645235399299410964613158428818035717538356886408 4386
UVM_ERROR @ 1343948090 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1343948090 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 98986109953559434115450966513805479611022655008564767311995963563740624882080 16209
UVM_ERROR @ 7501281708 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 7501281708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 55361433665974270093575226119230436810875874734493134245094079393795540167810 1088
UVM_ERROR @ 758350892 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 758350892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 54947077162080929979309193715557089148122673969698853990706439112786593296289 2024
UVM_ERROR @ 67932815 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 67932815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 28202262612031466750529137929090090223919893395143761129562799454845843468415 312
UVM_ERROR @ 1184973740 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1184973740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 108097390653845201562788267219503754192893747791125781986533952412565714075719 2130
UVM_ERROR @ 142599640 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 142599640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 102955468332588530744718506255957933603428181956991115389281368893212247150929 2953
UVM_ERROR @ 6234805592 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6234805592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 27328820381416740913208361652169359284779986469320746664986595019758987902188 2498
UVM_ERROR @ 2554105537 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2554105537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 27341843685943685654954771557343644668055105097615659246889201531865349022999 1298
UVM_ERROR @ 67414819 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 67414819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 3902412769202929010174730706089767096251696547744071565773546458328565780930 440
UVM_ERROR @ 108090088 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 108090088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 97051220250768649818559242094228725924045169670870018545773263847601040082920 13303
UVM_ERROR @ 3153311152 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3153311152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 65332419712554656768722224701651822765776645287153751413726689746046770391661 1748
UVM_ERROR @ 1647614611 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1647614611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 93582579073023580704821404400865868397531399479662376137664588913262956611997 2354
UVM_ERROR @ 224008106 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 224008106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 48204906990349160900564306564056269960516437470357331443537173289754366989555 4211
UVM_ERROR @ 125690973 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 125690973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 21305734630887672836912051116012633725125340305444955812952262938942941651130 1230
UVM_ERROR @ 202134587 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 202134587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 79699231577877625090394775994250824951294537449592480553746949178502283945226 6126
UVM_ERROR @ 4591429261 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4591429261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 75520123205296223012734215508187325995802927037124251997203341171648142961512 2650
UVM_ERROR @ 151649589 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 151649589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 108561807317310261005725215164629219432694282789169581711510184889403277198639 5297
UVM_ERROR @ 326369169 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 326369169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 46432467853508852537330503861285478296149829739575156812099105296178145851296 12854
UVM_ERROR @ 4513510641 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4513510641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 61540814425436261543806333667158804656455548234952300420962756259519377953752 6494
UVM_ERROR @ 3139851687 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3139851687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 49495536966176977422846287802906172130153960175635019890751034096367147776555 1566
UVM_ERROR @ 56229685 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 56229685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 43621473958890726779690242220519781023900903825128713425325966124367860549133 1632
UVM_ERROR @ 154909723 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 154909723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 5668427397072386774696056132855816106345865232837452398673842862367936559040 9512
UVM_ERROR @ 5016590872 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 5016590872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 25788492809812613443232844458912643106824673364998808169561265208911983637846 3580
UVM_ERROR @ 189026975 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 189026975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 99187517467719402280132882842336319561936706645157948112074879478954505426632 5936
UVM_ERROR @ 1606567266 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1606567266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 45576294091369025204184745513824697880362051829572382801399613740811760858330 4352
UVM_ERROR @ 154052617 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 154052617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 44596355881299559922262898897142348274026130873211893133809968599846654630040 2379
UVM_ERROR @ 175960207 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 175960207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 62348265309262519372327713819801001122003435263059725456651712718718715545192 388
UVM_ERROR @ 849920020 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 849920020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 8177082609817712126338998005221593543918203738741680078525945939267445074426 912
UVM_ERROR @ 1040353202 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1040353202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 55358806035206838199965756660688938468904164355610449845316886931561095181474 2494
UVM_ERROR @ 76343814 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 76343814 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2371920260151718363556150563659019932572948663365382394747828504955323058646 1601
UVM_ERROR @ 836238004 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 836238004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 115474648817593680927149799820134593335217269515310914425248716882499408424188 15363
UVM_ERROR @ 18024419779 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 18024419779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73045858844034133788912549668467119983775067087315851218916464483320012807560 1880
UVM_ERROR @ 414014717 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 414014717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 69841582899840981963605385398674113021670289313811700902271427328598876094331 595
UVM_ERROR @ 259214750 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 259214750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 17108756496529271796139729997508379324091953966260395201235641017148514587410 4702
UVM_ERROR @ 82398467 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 82398467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 84940388803521598386233469085584556926324581188153751881614998487380068341132 632
UVM_ERROR @ 246470447 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 246470447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 25161612187333246378949939879123799343402063776337317308649584588744287684494 2206
UVM_ERROR @ 905808579 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 905808579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 75081325014662226064279746309193188311730588122729150654164574701999166752380 3153
UVM_ERROR @ 257834811 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 257834811 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 85218055476464030495653745974558893616496292608738541615870942478456551068695 1488
UVM_ERROR @ 76068095 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 76068095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 19450829753313801550004079004282542727309736910014994253306160480601135211519 1902
UVM_ERROR @ 892949853 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 892949853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 25047310536490920935301920146711942054214359955150946572414882365766156743278 2466
UVM_ERROR @ 618220272 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 618220272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 78315547068007178089589110676903376663555957580918453530799154182136725343361 4936
UVM_ERROR @ 86876955 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 86876955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 47765182947606640723027389280072824919652024049898961260634533006718011827812 5834
UVM_ERROR @ 1162844693 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1162844693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 36920697412629634682258640765582466017167793640411322118632076354164613883970 7081
UVM_ERROR @ 399315498 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 399315498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 67918969668649077500303265692961327712770223039925262711059659097045405042020 12616
UVM_ERROR @ 4448476161 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4448476161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 35148189030155191978949850137839690107251486870036305924712447332020110235672 466
UVM_ERROR @ 176368574 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 176368574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 52987799749510486640856230399370830276770342161048659744571331395830270562184 6228
UVM_ERROR @ 304933550 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 304933550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 33642042359215271965351845867157272879798541501289668295861837436862463739081 2376
UVM_ERROR @ 121660715 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 121660715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 3276435010061392484262150551818263016790574247569322985529432588509988324047 944
UVM_ERROR @ 64506943 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 64506943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 1626047220155968489624172739566562519583004154983527293997980945739309550785 2026
UVM_ERROR @ 193103071 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 193103071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 57129982856725239978955638480040184383781448934721955628065470181950648310240 2556
UVM_ERROR @ 177764669 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 177764669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 61658583963211636283234567369030216663702191069623605010036960606908304032492 1758
UVM_ERROR @ 56079931 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 56079931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 93726890424549131266536209170139056482742436080881261898055309497447034243762 720
UVM_ERROR @ 74596837 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 74596837 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 89498202105552451048545440222764072922455456894395922389866074797527907244580 4618
UVM_ERROR @ 80809251 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 80809251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 60732990725817803241813342327190511799148487033214178247120766843770280265192 5134
UVM_ERROR @ 1628949654 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1628949654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 6724005106072105753754080112667905047366943960077080800561980715211756404492 1022
UVM_ERROR @ 47138045 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 47138045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_*
otp_ctrl_check_fail 51646497884205866657992481408918188931051360975796026337678379135868691180565 10972
UVM_ERROR @ 9366603605 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 512 [0x200]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 9366603605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 28419249779668930499115022387499667551626364081292126372933544914359362240394 7691
UVM_ERROR @ 904148693 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2049 [0x801]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 904148693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 37496123117076890430325020026593061250626342134579495142023200971060059190463 8366
UVM_ERROR @ 1891343380 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1891343380 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 106900846600402954827824794069836545515457205111756890712838873348006691465520 13100
UVM_ERROR @ 3834824200 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3834824200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 114910104784898856294186457618977376866940783065986382800741647317511274382113 2970
UVM_ERROR @ 642596653 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 642596653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 114580875121025821042789151822680446433678076281047425082285324097159853023327 21713
UVM_ERROR @ 3432813530 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 33 [0x21]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3432813530 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 70696129802708801371679697840479169145838316256153921201995274047539841465862 21721
UVM_ERROR @ 1117830337 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1117830337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 62321800490604297800768646282807173148373625654609136678813262725620588091375 8407
UVM_ERROR @ 215359526 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 215359526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 11931384317770269145256880520143947864866095127111499521425219146301739800373 12895
UVM_ERROR @ 1555547596 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1555547596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 88637094688707223812166442497103823290048410043315589742175305922949412118141 1047
UVM_ERROR @ 155163108 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 155163108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 101907443007496679488268817256423586665420125797439329831627063735930799786607 524
UVM_ERROR @ 62576274 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 62576274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 44428604945537453335672719056296036130942656338612516359485185183191415050609 2908
UVM_ERROR @ 6104816249 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 512 [0x200]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 6104816249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 88270433576019903804387764563148101826505387968293273844809943759914342764114 6766
UVM_ERROR @ 882151157 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (905409636 [0x35f77464] vs 905409892 [0x35f77564]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 882151157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 1708406131676048412100020223126372807615817403094260539610910957250877804681 5611
UVM_ERROR @ 1010039539 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1010039539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 81335764511853928551125888318956227052213765292571493861067914591396547896620 21587
UVM_ERROR @ 1544105363 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8192 [0x2000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1544105363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 58931557130390511765146104716006098550985914257583689777476878970977099052109 15941
UVM_ERROR @ 974290286 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4352 [0x1100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 974290286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 23265812638561695826817918501718617052652777011738445453460665321531770939248 7359
UVM_ERROR @ 546145333 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32 [0x20]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 546145333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 80250486672094979650006613987983160715403246109365604913068698228437727612353 25617
UVM_ERROR @ 1741816616 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3766386844 [0xe07e809c] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1741816616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 98780678164239206331484378203713234686847179358148746349996175925850020058198 14195
UVM_ERROR @ 3576627540 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 12288 [0x3000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3576627540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 12127749627640093116175089247436692463267593232350235019648889634475966024988 224
UVM_ERROR @ 131383042 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4128260925 [0xf610433d] vs 4128260924 [0xf610433c]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 131383042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 48985869539880078315452637011279998649380148652741741260026655686259309111006 2070
UVM_ERROR @ 583727469 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 583727469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 89315843442300075059105501632143564767719138989743066683442071240951617849124 5095
UVM_ERROR @ 1109805662 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1109805662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 109329218152344424564447591606277835584067548817690104026465187967382589662717 1810
UVM_ERROR @ 254984619 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1929704243 [0x7304f333]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 254984619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 9959386167683694853531243994886180375317516976017798095075684555253482962448 2312
UVM_ERROR @ 551247197 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (343026496 [0x14722b40] vs 343026514 [0x14722b52]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 551247197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 89087617759856419239936428494767723435343226108852973885317032249579338424467 1300
UVM_ERROR @ 84413140 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2687601634 [0xa0318be2] vs 2687601378 [0xa0318ae2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 84413140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 88117374081850694508097014392404031096255275333456222598159799956499181345794 31398
UVM_ERROR @ 3864156833 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2603616611 [0x9b300963] vs 2603616579 [0x9b300943]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3864156833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 59018773649080982207787872703399726398401093312883581031005833663970711636870 2756
UVM_ERROR @ 279343713 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 279343713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 87458728625473987879872069521451725581559031540734254367460420396488050876625 636
UVM_ERROR @ 103965907 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 103965907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 81407158513170487502645535932961320755126158025911197024834951189164424440793 1872
UVM_ERROR @ 65267616 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1859063052 [0x6ecf0d0c] vs 1859063172 [0x6ecf0d84]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 65267616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 78552566891128102997008498385267383392708483287999222650923725155045453399100 3669
UVM_ERROR @ 746070355 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 746070355 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 63221156772526052297824088923653348312356930005387341127392318182617047857241 3707
UVM_ERROR @ 1071894850 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3465589994 [0xce90b4ea]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1071894850 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 109129565412633735890559582403035269289987620429789269768985887017396876446918 10743
UVM_ERROR @ 4357919951 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2970787784 [0xb1129fc8] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 4357919951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 64108713227844629663956466360770953710040128189258026538534208499836554006112 5591
UVM_ERROR @ 320489964 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 320489964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 99747504014418601689683021684624671792992891396111458616924050809174816074172 9536
UVM_ERROR @ 506572212 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8192 [0x2000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 506572212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 57936427009211491630396889845243584501352712109777056146998838752174133800152 1844
UVM_ERROR @ 340678993 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 340678993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 44404931864345464571607635011067097664572547570246462091821752182225144832071 4071
UVM_ERROR @ 560701226 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16 [0x10]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 560701226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 10031011536765035481050056111661049315091254802445443738685362628490523559100 10728
UVM_ERROR @ 1368188643 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (846236714 [0x32708c2a] vs 846253096 [0x3270cc28]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1368188643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 38716984916037333456805020651864976372526374584632986981499259793444557964466 4020
UVM_ERROR @ 6917211457 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 6917211457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 31250483597824345886741599105219106139016548765500688987117817327334776338185 4451
UVM_ERROR @ 347042359 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8194 [0x2002]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 347042359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 87143896830599912124249317823717312484367063483592718249052487103820809435403 10542
UVM_ERROR @ 2506087925 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2506087925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 78625774952259888272963660322759946108982935129252433040426411558113407158230 5685
UVM_ERROR @ 5030220399 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 5030220399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 59622752818331339243780393873697076396188006725882694358310788532293293656065 19305
UVM_ERROR @ 18567876966 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1025 [0x401]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 18567876966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 86231125875481342233647967657715797435040087269007680587064861114847421263748 2828
UVM_ERROR @ 5277891856 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (910644087 [0x36475377] vs 910639735 [0x36474277]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 5277891856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 99032051527352717685915767207383382043429449942848489100426797026153336871617 2583
UVM_ERROR @ 215346092 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 128 [0x80]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 215346092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49942903528724426419724200108193114892792317828080087269835132371859771461208 172
UVM_ERROR @ 156673233 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3071818954 [0xb7183cca] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 156673233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask *
otp_ctrl_macro_errs 8702505467821322595298690307233016338810760432617618665219085038045145245980 694
UVM_ERROR @ 880554272 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 880554272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 60522285197843039851720445974143050948605978476864920446707333811090236637657 8928
UVM_ERROR @ 459341794 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 459341794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 47550107094445845331204897568655458930186561794586744569121018250975106452053 11406
UVM_ERROR @ 464677802 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 464677802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 27232315232982799182758117382559086785621991168471981217125865366604323494602 6483
UVM_ERROR @ 250216685 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 250216685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 88248069243476393568433716879802680961703274900155948051247553190383557091976 11748
UVM_ERROR @ 1338134742 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 1338134742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 83026922828339906899941028154090856598227034482259506365448006002135508393576 34131
UVM_ERROR @ 905165679 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 905165679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 82047016444548841594138309480681982397638106712576067675088629275976554485177 8985
UVM_ERROR @ 457766284 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 457766284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 83159560859611326132420004742112109226935224777750974816799584899331475730613 5442
UVM_ERROR @ 264538786 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 264538786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 89240256284317089536635786884423373935993643081691627619541637684546780924970 55834
UVM_ERROR @ 4027114076 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 4027114076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 79718361549321893741797186367039974542025571563119795504590385681798585049765 3441
UVM_ERROR @ 6746665654 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 6746665654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 45328191219111410986906504526327304820334927642901035491163290440565657396030 13517
UVM_ERROR @ 7623149422 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 7623149422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 29728446146885522430078475957845669742203104327103233186662198859871473921997 9149
UVM_ERROR @ 1499883058 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 1499883058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 34410994868057637923900842607768131956843557203810250572841046650779667918548 8320
UVM_ERROR @ 945544720 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 945544720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 62549731777490950700444484236783762198447709869727552438429340358844455372726 8452
UVM_ERROR @ 261552883 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 261552883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 80795921626299260535525928836681068122968029603528763069285247357673178103797 12072
UVM_ERROR @ 1937466458 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1937466458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 3833401741524204408725336391331188439649031064629884842649847180836395584760 1928
UVM_ERROR @ 724484499 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 724484499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 39522077271561280465357599161469919678234588106353658374018704214981822753040 5027
UVM_ERROR @ 279511354 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 279511354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 36723999960319371979103042530429939109885196937534540781356178181151187189738 4877
UVM_ERROR @ 2408889122 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 2408889122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 28735465367396293534419196419334797538443370549494732752949892607221136821022 22806
UVM_ERROR @ 1730730389 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 1730730389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 93495878083453025423340587096940772579457368363457072949862623384196705009309 5500
UVM_ERROR @ 683472692 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 683472692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 53959813019734222512375545837840657845611867894670875510850825485071137157515 6860
UVM_ERROR @ 1261918350 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 1261918350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 1364935179988474240921362053682559173554749560639837142175368122019724518532 10805
UVM_ERROR @ 434733807 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 434733807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 99051144425043758966061137081522643100865920906808349496311938332117356375001 18322
UVM_ERROR @ 801917399 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 801917399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr
otp_ctrl_background_chks 104513609022011925080006336758885360392693699537867880097755994686468045332651 5735
UVM_ERROR @ 421352188 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 421352188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 14413239811067698727958428608469043779928885143659252198506008121465856961242 4649
UVM_ERROR @ 390269176 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 390269176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 105326875906102772349488532640356972235028365441644408107099316550769459867916 12588
UVM_ERROR @ 7049994537 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 7049994537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 14299120236165113568756093411973973464813584107914077474026892401690968376078 10033
UVM_ERROR @ 439147180 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 439147180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 65737192039290523207581701226376179083125465009713860011045593456277495056863 4097
UVM_ERROR @ 164789683 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 164789683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 108696240877520323144391008103799871902558264292263306861724945960564235688210 16912
UVM_ERROR @ 1239132679 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1239132679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 12446959162616791978042864230902815240373221243454601721061349566073420007728 8443
UVM_ERROR @ 736220400 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 736220400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 66262115303488784303260819406863091155515292563861945001157151162453133539577 8293
UVM_ERROR @ 482065332 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 482065332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 82030166313744404015075615403129808541378766042381123496030152492576190212188 5015
UVM_ERROR @ 766683680 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 766683680 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 77606131062848702324352396721930452155615236226701962095982560957841470932189 12574
UVM_ERROR @ 864387955 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 864387955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 53304743908584162633781655005406756767182628115557843466915518717204900606967 3161
UVM_ERROR @ 132206058 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 132206058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 77970178288598027433738564517582289741618351654154699888348900193111250570921 8427
UVM_ERROR @ 2605809387 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2605809387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 27533314117987665213550997670769277781516123771249510325011662669669662084011 16460
UVM_ERROR @ 1115867568 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1115867568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 26597129747796541533830048819578797909767582513521511196161447216855862457759 5402
UVM_ERROR @ 1759108562 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1759108562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 4105592576762833784306754301943574140939456997442745577285555288953187636431 12790
UVM_ERROR @ 17631197026 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 17631197026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 110617205927333330798044976555320088655738297224213257630214232763981914818275 18110
UVM_ERROR @ 2029980844 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2029980844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 78645662224767941467942502842750873927481467927014624419619674772101681762313 8924
UVM_ERROR @ 10802202940 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 10802202940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 8263219996737572932858927679919679196892319459552457393674981025527946900042 50874
UVM_ERROR @ 4623375428 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4623375428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 16210563263886202261933372624319149842787830804880592216911170553386453586598 7508
UVM_ERROR @ 359612076 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 359612076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 94245293034691428625187905878117640761640995019627740793872645318688545415545 1988
UVM_ERROR @ 300299880 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 300299880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 104588508105460776205152173310543060346247741050117217137454842966611127728873 10565
UVM_ERROR @ 1002468784 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1002468784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 33685326837952711163272997135716420946011493914441123048472181518395075627035 12998
UVM_ERROR @ 4629570313 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4629570313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 33045335557273895932381703023852020984134350794292332012903458424872862972177 364
UVM_ERROR @ 162978388 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 162978388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 73455903475865216411069554257557017643059923189509274201310091326001232061635 12598
UVM_ERROR @ 554178161 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 554178161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 99287790665833266094449525264659950056544555448902048427865751859216313709618 11571
UVM_ERROR @ 692722359 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 692722359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 58838351716108986639199705654520987173270332999004663682695202244825621013371 18874
UVM_ERROR @ 1972875584 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1972875584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 31533098037431114080889112451770527379388395892326909182922045346072271963350 3612
UVM_ERROR @ 1146409577 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1146409577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 100167154349793430244362542658121458468017383841928357626700072406600465611514 1994
UVM_ERROR @ 105806138 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 105806138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 103918915518588096741678745078121173168212434246755595314227550141480076403624 13844
UVM_ERROR @ 558295750 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 558295750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 98354392201745813533521932436387291785875897825926898512304274540500333454705 1778
UVM_ERROR @ 231000076 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 231000076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 84334447367320320254289401460697765237277953040165231644491562707956424939254 10268
UVM_ERROR @ 651489738 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 651489738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 2475759912509989310592247651958615570836431721645794516069289916124696821215 15520
UVM_ERROR @ 788248297 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 788248297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 101885845573485432127957447022183785586155663215420350531502659481789965706392 15462
UVM_ERROR @ 890116909 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 890116909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 12761250409249113352065859025678617953971539968108494537085670284091619650953 7668
UVM_ERROR @ 1536727429 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1536727429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [otp_ctrl_common_vseq] expect alert:fatal_check_error to fire
otp_ctrl_sec_cm 32731759081160126085900599951200205417885662155179765574187584885183762131505 2361
UVM_ERROR @ 12693890464 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] expect alert:fatal_check_error to fire
UVM_INFO @ 12693890464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1315) [otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger!
otp_ctrl_background_chks 25601920642247036196433541050504652957793280541813576235903386511323229801646 5613
UVM_ERROR @ 1102423537 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1102423537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 22717195053632392509042480784506398933139085644371254820317984733636502328521 778
UVM_ERROR @ 1789217721 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1789217721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 13960214645684719486752913896752766192996161775933501480832411269848611201285 8096
UVM_ERROR @ 1101643379 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1101643379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2184187988062450308682702129534596798726761280601681862192477621224707976823 11276
UVM_ERROR @ 6332048652 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 6332048652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 115065128221492138022378737103933156366382865672413891627966463057843310586079 8027
UVM_ERROR @ 996299774 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 996299774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state
otp_ctrl_dai_lock 33287543820771152172371824170683729050025759064457137332528580298808128886809 15054
UVM_ERROR @ 9661237253 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 9661237253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 10855392405616136928373138896734704128290894604251603523591029999085861561024 1995
UVM_ERROR @ 3988802470 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3988802470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 74061060212613612164038901157488108040808835485626911377670802727893555812012 5319
UVM_ERROR @ 1570579822 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1570579822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 36917566255364318298568221057217306652390969648197061126831336575721912784192 262
UVM_ERROR @ 322507580 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 322507580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 88274265492864236715535369104966451514117500581822392413503793092970848547256 7664
UVM_ERROR @ 6422897638 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 6422897638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 109638713824437123555502036744380039005438579903483695725381147982481341676401 11112
UVM_ERROR @ 852369692 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 852369692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 77210668351775595016703728999384775745836124145069962630628633633156228615369 15919
UVM_ERROR @ 1469739568 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1469739568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 77883724099211656003647209396786632300299718064762772990962676946953271631846 10945
UVM_ERROR @ 339483938 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 339483938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 62336203640423060779668352951505012875315015129073308742200061334568756879329 6701
UVM_ERROR @ 4470823388 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4470823388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 114660569282321662683906685929242727298125951677312251246853860315026476703116 12590
UVM_ERROR @ 315873305 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 315873305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 110314447629375901081147251134919097687920041369447985195718535400792085072854 21654
UVM_ERROR @ 445135780 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 445135780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 100483915220615860012278674099723102476160304543008941109265231236633234196975 12193
UVM_ERROR @ 3396438766 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3396438766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 30121190229657913527387571255180496676520048262298457976292178752263806812523 68902
UVM_ERROR @ 9913013023 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 9913013023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 70068255214477110718765412608781137436687680907502418390859161391931498672953 6022
UVM_ERROR @ 5758206549 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5758206549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 22468502520176077105470976243024634256326411000765025278563722824815334124128 13682
UVM_ERROR @ 4460374846 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4460374846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 66211027573760244564787699424381979328118465073398337435302551082080221584097 11746
UVM_ERROR @ 13730467381 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 13730467381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 40416590239202697100313949900574313192297284064697603972438639032112758479572 7416
UVM_ERROR @ 2305101975 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2305101975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 98075608907431153489858159137762738545188494748271724838361256263255685270550 18052
UVM_ERROR @ 1355747787 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1355747787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 42079241432980076754365485954373404691948286262589853094241835601269751192231 8578
UVM_ERROR @ 622991476 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 622991476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 76137518518103491286029046038987193741129576730385913177227389921152273003211 9329
UVM_ERROR @ 1614716174 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1614716174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 44403832898928482901256573122019899229163174809240550112957446859261061283967 384
UVM_ERROR @ 229857002 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 229857002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 32798337506985286795619838104768093290311032177406766904163460131205107592600 5163
UVM_ERROR @ 461443691 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 461443691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 65378578700155728784289941343763243820183901588115394920049739206155520942800 1320
UVM_ERROR @ 141521086 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 141521086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 42357745450047214808546266455035542988011723160887216204091988176667130399198 7398
UVM_ERROR @ 3527460276 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3527460276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 107922489089312246582996096369208615813142632388538135949135683586522307830466 3972
UVM_ERROR @ 6678775106 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 6678775106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 66601714634647126254462213185357592414392374527661045177668642165605745943584 7624
UVM_ERROR @ 3565429869 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3565429869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 105954389395859978133250331781741119177742231271358048703279733635578145339780 22248
UVM_ERROR @ 2935611224 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2935611224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 41868093498364960814467740549199713041835959792023646178408926641959596843341 20363
UVM_ERROR @ 803182823 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 803182823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 82295566045558836450442587986113200738326922552539100332446865784159114524856 11855
UVM_ERROR @ 822424287 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 822424287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 45940455968947408999887184098716935648143792736296279695954124827344035808798 5305
UVM_ERROR @ 435539392 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 435539392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 31521188412385847002115937889345529538885113234067225686580903817717078531781 12117
UVM_ERROR @ 984152608 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 984152608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 80195136928524575512052667680085659410356628685869157464020132562621364495581 8242
UVM_ERROR @ 9537680419 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 9537680419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 12532678166100420900037994120334404519088297575560592145717240483924985399740 13764
UVM_ERROR @ 1203464629 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1203464629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 54018719480540551752281660102921769448345988756567360279636148101051720491535 18788
UVM_ERROR @ 953159547 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 953159547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 76612831425848456229470955296571356462749967428007157668086594562335550889652 14856
UVM_ERROR @ 5503361827 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5503361827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 30253907523410670188992361518648268754219385580748956194006382515253399961508 355
UVM_ERROR @ 351793660 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 351793660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68226135004565393606710984405621249106853802494699808290711647415135979899850 6260
UVM_ERROR @ 8979705431 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 8979705431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55257903335173540079884371222635033147617522143649006157590169416169640260727 38263
UVM_ERROR @ 14403033602 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 14403033602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 75802941808413476131141127859789556100933259889131748692882902788441809180 14164
UVM_ERROR @ 13019602554 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 13019602554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55902810311401613876637657548438381804898688383847480403193770304009811941027 7099
UVM_ERROR @ 971944919 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 971944919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 71647269332922286570383117655839794087062224760794681485560764424381471201635 10018
UVM_ERROR @ 2800923065 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2800923065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 103535119824952713278760301756428558305729002643626585974449757822202810407294 2099
UVM_ERROR @ 6187077770 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 6187077770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 98328767214353233407217588383093464046457449662628360518164225628489255906827 3962
UVM_ERROR @ 6405711676 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 6405711676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 51872169296284532997423076052415771680029962352966535582954096233837125787962 35821
UVM_ERROR @ 2583549790 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2583549790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 111121014606506850292765128150664964587713321778727492064065545386986375940303 112
UVM_ERROR @ 148068952 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 148068952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 26682386273452765092917725487853263703893069510715175533555895081413725996400 50508
UVM_ERROR @ 1734827005 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1734827005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 14123634111907406292220909572933875001436820860091740856445698828555791410877 317
UVM_ERROR @ 336392358 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 336392358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 56426671822280400139185768248660470813929291310171522534554830459142135105645 1347
UVM_ERROR @ 11131488340 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 11131488340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 91804329665880945674452813613318656322224173941683273820860389991633376382672 12088
UVM_ERROR @ 32948385691 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 32948385691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 89344978965443398649445629706995606687892567019419730758502774150269640383886 8672
UVM_ERROR @ 9049060579 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 9049060579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57803806007700991473421724609023762452012740509963230413196441602765487058765 23624
UVM_ERROR @ 1656977409 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1656977409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1315) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger!
otp_ctrl_init_fail 97670957360405352627995398283328846159302515292349357272145782828490658593172 1946
UVM_ERROR @ 1906741526 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1906741526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 50225805536185947242396873881982290871684829051184401186722127924168476444547 1590
UVM_ERROR @ 1725996886 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1725996886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 110318893749623550868693407667091287827713112696097408473694459818910719061147 1566
UVM_ERROR @ 155736772 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 155736772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51057061305816330200495837909210657089021164243262274613342457525565415318746 1870
UVM_ERROR @ 2374361017 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 2374361017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 60447393253357202329611289570721871127669594689930710017620797472664400464982 1274
UVM_ERROR @ 1830351753 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1830351753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 47841304671382080856199766616276673599322893260408799810991568570146276618853 1598
UVM_ERROR @ 1636915269 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1636915269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 84623907817044543037083998302082916574165197825418889272757230116810768765016 1672
UVM_ERROR @ 421623164 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 421623164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 43990894379728430919209218051445111115865831031226153802530501845348042607727 2036
UVM_ERROR @ 1862283314 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1862283314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 96461546500146091387294852994837290126995969617252812432260566689788968514026 2250
UVM_ERROR @ 1873452532 ps: (cip_base_vseq.sv:1315) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1873452532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *b3c rdata* readout mismatch
otp_ctrl_stress_all_with_rand_reset 25911936912925118158204323975846353450309289330687645070318034007776740198925 29981
UVM_ERROR @ 14034642470 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (0 [0x0] vs 6972 [0x1b3c]) dai addr 1b3c rdata0 readout mismatch
UVM_INFO @ 14034642470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1236) [otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
otp_ctrl_stress_all_with_rand_reset 99938524103926546315996019376761267080563839124978791640878689490931521550828 7091
UVM_ERROR @ 36609442171 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 36609442171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 78467845719474118420867343821338078137578584669262724776550654197251680105327 28054
UVM_ERROR @ 50359963983 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 50359963983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed
otp_ctrl_stress_all 64945198309147041846806035992471739188652258465446422245300258090480434636647 3460
UVM_WARNING @ 1467456948 ps: (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_23' is being accessed
UVM_INFO @ 1467576948 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1467616948 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1467656948 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1467776948 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_FATAL (alert_receiver_driver.sv:218) [driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
otp_ctrl_init_fail 57506607385171182268394131668605079694234258058488324265254566396614309526958 1354
UVM_FATAL @ 526787547 ps: (alert_receiver_driver.sv:218) [uvm_test_top.env.m_alert_agent_fatal_check_error.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 526787547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---