Simulation Results: xbar_main

 
01/05/2026 16:00:28 DVSim: v1.17.3 sha: 1521b5f json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 99.35 %
  • code
  • 99.17 %
  • assert
  • 98.89 %
  • func
  • 100.00 %
  • line
  • 100.00 %
  • branch
  • 100.00 %
  • cond
  • 96.68 %
  • toggle
  • 100.00 %
Validation stages
V1
100.00%
V2
97.76%
Testpoint Test Max Runtime Sim Time Pass Total %
xbar_smoke 50 50 100.00
xbar_smoke 23.120s 555.717us 50 50 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
xbar_base_random_sequence 50 50 100.00
xbar_random 261.250s 20261.950us 50 50 100.00
xbar_random_delay 295 300 98.33
xbar_smoke_zero_delays 7.710s 95.200us 50 50 100.00
xbar_smoke_large_delays 397.760s 43169.885us 50 50 100.00
xbar_smoke_slow_rsp 417.630s 21143.698us 50 50 100.00
xbar_random_zero_delays 87.150s 1494.329us 50 50 100.00
xbar_random_large_delays 1708.280s 165151.424us 46 50 92.00
xbar_random_slow_rsp 2537.750s 208143.991us 49 50 98.00
xbar_unmapped_address 100 100 100.00
xbar_unmapped_addr 145.740s 16882.189us 50 50 100.00
xbar_error_and_unmapped_addr 141.320s 5836.908us 50 50 100.00
xbar_error_cases 100 100 100.00
xbar_error_random 248.400s 29254.969us 50 50 100.00
xbar_error_and_unmapped_addr 141.320s 5836.908us 50 50 100.00
xbar_all_access_same_device 86 100 86.00
xbar_access_same_device 366.230s 43815.599us 50 50 100.00
xbar_access_same_device_slow_rsp 3509.230s 338046.460us 36 50 72.00
xbar_all_hosts_use_same_source_id 50 50 100.00
xbar_same_source 175.660s 39169.509us 50 50 100.00
xbar_stress_all 100 100 100.00
xbar_stress_all 1741.670s 61520.700us 50 50 100.00
xbar_stress_all_with_error 1508.400s 46206.501us 50 50 100.00
xbar_stress_with_reset 100 100 100.00
xbar_stress_all_with_rand_reset 1550.650s 4175.919us 50 50 100.00
xbar_stress_all_with_reset_error 1409.500s 30508.271us 50 50 100.00

Error Messages

   Test seed line log context
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
xbar_access_same_device_slow_rsp 70781395731174170974039893008062051019355058136011323252259898872708902446057 134
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 84274615414450449286543581918059252559860190154822780004517649728459516539983 108
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 74339034659199652229035034611136852765538399534560187967395642592144966598037 153
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 89330880266457350694637326471794023887672921993743392884793824984183713341872 152
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 82195230518963691419804280418166216751622499059597436943960880899047783228098 212
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 71422471843463760607140803682738855306646457068582795436743109442986537713830 197
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 11930391305091831674715668685985248761842609874840768718145051078137796215578 107
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_random_large_delays 62449032317487087254872516329069920238421635972821832129794420186463346725858 169
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_random_large_delays 1062331356313352541522789163798434093327355708336302499189695609129324244559 136
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 52983756856177678245633826196572159932914050958654061954182786299627727846767 182
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_random_slow_rsp 63147961566162395489612411736279613913016434865352479532468447400506703034112 165
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 5968388059325751144151259268985955626916542814533948349173340117667691657758 108
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_access_same_device_slow_rsp 62336469016424624962572996810332938886619131852494802576949929860072593096409 153
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_random_large_delays 4306422129705475338658741272615061249935063357167118427005454029854449749345 164
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xbar_random_large_delays 72399951543259972455442719645647041775649546276925910079100558991266757470392 181
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
xbar_access_same_device_slow_rsp 81730342725092584269357367057732698234069915922149869584771031981745694855464 None
Job timed out after 60 minutes
xbar_access_same_device_slow_rsp 108308728568884236064623706608278343515167493514411522748651352626178018084824 None
Job timed out after 60 minutes
xbar_access_same_device_slow_rsp 36579613143529870912464503491768153111093976018590558594374799170655866377365 None
Job timed out after 60 minutes
xbar_access_same_device_slow_rsp 60642565684426090840167996847719349750567703037341013858184563012845493232888 None
Job timed out after 60 minutes