| V1 |
|
100.00% |
| V2 |
|
93.10% |
| V2S |
|
99.62% |
| V3 |
|
58.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 85.930s | 1469.579us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| alert_handler_csr_hw_reset | 12.800s | 427.068us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_csr_rw | 13.370s | 147.191us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| alert_handler_csr_bit_bash | 425.690s | 17465.917us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| alert_handler_csr_aliasing | 399.100s | 5179.881us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| alert_handler_csr_mem_rw_with_rand_reset | 12.760s | 67.158us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| alert_handler_csr_rw | 13.370s | 147.191us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 399.100s | 5179.881us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| esc_accum | 50 | 50 | 100.00 | |||
| alert_handler_esc_alert_accum | 415.610s | 25193.039us | 50 | 50 | 100.00 | |
| esc_timeout | 50 | 50 | 100.00 | |||
| alert_handler_esc_intr_timeout | 86.730s | 1390.062us | 50 | 50 | 100.00 | |
| entropy | 50 | 50 | 100.00 | |||
| alert_handler_entropy | 2588.730s | 47196.420us | 50 | 50 | 100.00 | |
| sig_int_fail | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 84.470s | 1231.877us | 50 | 50 | 100.00 | |
| clk_skew | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 85.930s | 1469.579us | 50 | 50 | 100.00 | |
| random_alerts | 50 | 50 | 100.00 | |||
| alert_handler_random_alerts | 76.190s | 5522.145us | 50 | 50 | 100.00 | |
| random_classes | 50 | 50 | 100.00 | |||
| alert_handler_random_classes | 88.070s | 2812.659us | 50 | 50 | 100.00 | |
| ping_timeout | 21 | 50 | 42.00 | |||
| alert_handler_ping_timeout | 658.140s | 73606.324us | 21 | 50 | 42.00 | |
| lpg | 99 | 100 | 99.00 | |||
| alert_handler_lpg | 3334.340s | 385700.835us | 49 | 50 | 98.00 | |
| alert_handler_lpg_stub_clk | 3244.110s | 60226.925us | 50 | 50 | 100.00 | |
| stress_all | 50 | 50 | 100.00 | |||
| alert_handler_stress_all | 4519.490s | 80633.133us | 50 | 50 | 100.00 | |
| alert_handler_entropy_stress_test | 1 | 20 | 5.00 | |||
| alert_handler_entropy_stress | 32.700s | 3132.101us | 1 | 20 | 5.00 | |
| alert_handler_alert_accum_saturation | 20 | 20 | 100.00 | |||
| alert_handler_alert_accum_saturation | 6.000s | 57.115us | 20 | 20 | 100.00 | |
| intr_test | 50 | 50 | 100.00 | |||
| alert_handler_intr_test | 2.890s | 35.961us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| alert_handler_tl_errors | 27.310s | 1900.434us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| alert_handler_tl_errors | 27.310s | 1900.434us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| alert_handler_csr_hw_reset | 12.800s | 427.068us | 5 | 5 | 100.00 | |
| alert_handler_csr_rw | 13.370s | 147.191us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 399.100s | 5179.881us | 5 | 5 | 100.00 | |
| alert_handler_same_csr_outstanding | 75.810s | 3189.252us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| alert_handler_csr_hw_reset | 12.800s | 427.068us | 5 | 5 | 100.00 | |
| alert_handler_csr_rw | 13.370s | 147.191us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 399.100s | 5179.881us | 5 | 5 | 100.00 | |
| alert_handler_same_csr_outstanding | 75.810s | 3189.252us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 404.250s | 33756.068us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 404.250s | 33756.068us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 404.250s | 33756.068us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 404.250s | 33756.068us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors_with_csr_rw | 1344.230s | 79151.728us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| alert_handler_tl_intg_err | 96.140s | 1233.239us | 20 | 20 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| alert_handler_tl_intg_err | 96.140s | 1233.239us | 20 | 20 | 100.00 | |
| sec_cm_config_shadow | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 404.250s | 33756.068us | 20 | 20 | 100.00 | |
| sec_cm_ping_timer_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 85.930s | 1469.579us | 50 | 50 | 100.00 | |
| sec_cm_alert_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 85.930s | 1469.579us | 50 | 50 | 100.00 | |
| sec_cm_alert_loc_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 85.930s | 1469.579us | 50 | 50 | 100.00 | |
| sec_cm_class_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 85.930s | 1469.579us | 50 | 50 | 100.00 | |
| sec_cm_alert_intersig_diff | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 84.470s | 1231.877us | 50 | 50 | 100.00 | |
| sec_cm_lpg_intersig_mubi | 49 | 50 | 98.00 | |||
| alert_handler_lpg | 3334.340s | 385700.835us | 49 | 50 | 98.00 | |
| sec_cm_esc_intersig_diff | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 84.470s | 1231.877us | 50 | 50 | 100.00 | |
| sec_cm_alert_rx_intersig_bkgn_chk | 50 | 50 | 100.00 | |||
| alert_handler_entropy | 2588.730s | 47196.420us | 50 | 50 | 100.00 | |
| sec_cm_esc_tx_intersig_bkgn_chk | 50 | 50 | 100.00 | |||
| alert_handler_entropy | 2588.730s | 47196.420us | 50 | 50 | 100.00 | |
| sec_cm_esc_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_global_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| sec_cm_accu_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 25.020s | 5226.407us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 29 | 50 | 58.00 | |||
| alert_handler_stress_all_with_rand_reset | 600.890s | 7431.841us | 29 | 50 | 58.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state | 25 test runs | |||
| alert_handler_ping_timeout | 22886786969565093996997096762897478918587926097796803784137719778998838685381 | 105 |
UVM_INFO @ 18996353344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 16732688897641028785596928322077454032275695601658986185235822646696875847236 | 84 |
UVM_INFO @ 2390975850 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 111529238830526018099308102357017626430106704549184510587735771826729497574762 | 96 |
UVM_INFO @ 9085632478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 92163319531840429664700225745339293523484890580127009537285331514974892045138 | 87 |
UVM_INFO @ 2162565197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 104916116086083029171163722828331991229098073557741836249679162117330822850732 | 140 |
UVM_INFO @ 88151384196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 66739159166365452552243964972348175821393330754164684376683414500290517296811 | 129 |
UVM_INFO @ 8253920247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 101537148591273022929816355280758722888264273991498799721262004848565836475089 | 93 |
UVM_INFO @ 5449206307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 95644877608672210428476218647740544946063109817022725239501091153776190639034 | 123 |
UVM_INFO @ 7191528325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 102950315804064423117904310453257078858190904438932147599239222384395341454730 | 84 |
UVM_INFO @ 7277604202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 49697990477727575193547909305437965605353420994952991540920386794053889689343 | 90 |
UVM_INFO @ 1969272347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 51393782466383578822947434532370884953021828366093177449273806651628934966318 | 114 |
UVM_INFO @ 7540832653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 60176026889281089254648983516500970740578245529103848962968396828109992628696 | 114 |
UVM_INFO @ 4832532213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 59492356294291182567152464281195963417908917143294193891838526844255678446385 | 129 |
UVM_INFO @ 34069212272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 28719771531125959772060915450130990772986074643477918357776280266760611880814 | 126 |
UVM_INFO @ 8431522489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 4619051199466526547419583785571640108432683475631000062033863518690149124757 | 84 |
UVM_INFO @ 5536277871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 96748201649112161932507969246298805650541329998628643800368085534050151732719 | 87 |
UVM_INFO @ 5272082682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 106246582230334275164903613874747686087146487865987604011710540933255244740094 | 87 |
UVM_INFO @ 931170560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 113548539291297809399146501348180061202107793053951306950982668127330808546497 | 84 |
UVM_INFO @ 959896000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 89155331452670561173150794373022668653365661167615214829968000339528376331279 | 129 |
UVM_INFO @ 36356769216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 115010187203983601185557561908864617333397542659217077568402840966225173978240 | 87 |
UVM_INFO @ 1901689427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 99101716165608562950005205461969921867277280528030322974512266608495147483165 | 135 |
UVM_INFO @ 33004153488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 29617329121817590044649010863135823583356095206578788282436997351353956743850 | 109 |
UVM_INFO @ 5477916627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 52799424923689438912176024909832452628656460729821316624803214896422424336607 | 150 |
UVM_INFO @ 11773266748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 111691034734436727009456121438438739255108790045971524675862448380392339058629 | 119 |
UVM_INFO @ 10026894347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 50331893930265699692152930103404504683305096434949002357568045911251829895132 | 87 |
UVM_INFO @ 2837785082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1236) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 21 test runs | |||
| alert_handler_stress_all_with_rand_reset | 4697903964271927376214814106790624229881292830080770710297475941352863057436 | 118 |
UVM_INFO @ 1786494810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 12335914984355198721710065597259666573014979988771637774800021999344236625946 | 99 |
UVM_INFO @ 3768797797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 2613828436381787664988988698906983803405858404412441382056201680232237620054 | 148 |
UVM_INFO @ 28972189971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 102157754477451001305669615578143364324955128126885365877395860821388905240409 | 186 |
UVM_INFO @ 24914812225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 98203699492957577871272647845450591858705934882351979516729693453975151853652 | 181 |
UVM_INFO @ 3322591213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 47283297581665752725932501979978123196216398439165706532645438982206754928509 | 112 |
UVM_INFO @ 1182055712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 78811940743945927685943436932617808218379920855142120912121183101403603542769 | 83 |
UVM_INFO @ 1747661726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 44298693141676241394562437245721476292614685978448491018755913310649867806045 | 93 |
UVM_INFO @ 828398003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 36703647287690352274523835462780765975007945751580443695783147427942196181724 | 129 |
UVM_INFO @ 1851785758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 20631139695839910835871593678306068000632063936098544668704932415587066344156 | 108 |
UVM_INFO @ 1434425345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 94074742675366274567615910141260374860552415194377740750580342956876503459134 | 104 |
UVM_INFO @ 248316551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 12861075176318445545353671885962956128965683287077085334280446750325380802122 | 323 |
UVM_INFO @ 4101152132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 29517480932216413570349436150952516945580165235167361718616118548078349256465 | 111 |
UVM_INFO @ 791679918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 102744424660867573598145478270071640759626285628109334545690714304874177445208 | 103 |
UVM_INFO @ 1357136676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 90295668414318577266247789149818575955364625925961735438246552324939635618508 | 113 |
UVM_INFO @ 2126652549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 47319441545817753790884760067207342418418165254736568303684122620120392464096 | 140 |
UVM_INFO @ 9094065668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 34139218872200143962059544330081546566767292330707603232984650614642060703694 | 93 |
UVM_INFO @ 3444147122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 91063816768809543216334199436762689047120009702576341690737938840189590515079 | 85 |
UVM_INFO @ 1096981565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 100855446833127652677354465904638342981420215811704516166002767301339311396334 | 83 |
UVM_INFO @ 315679882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 72384479824688931656898818971393825495789446685763453946182635114210329919215 | 109 |
UVM_INFO @ 962028028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 46061381948213922631214888634455827928253680455337985713825343108165899974755 | 113 |
UVM_INFO @ 2639312640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped | 19 test runs | |||
| alert_handler_entropy_stress | 21697152674700882373618908088432386611897485999813493089561003425138190552747 | 190 |
UVM_INFO @ 948361911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 66241693518178678363472502103423622724777924093265037117074480471827116050910 | 218 |
UVM_INFO @ 1506196738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 54350862019771808914354535670645635296775389170604999516445294374670823335153 | 204 |
UVM_INFO @ 120282765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 64792149418156802739998242620054454703742523141086081178473312946310338749983 | 188 |
UVM_INFO @ 395705073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 20614481688078953596689066353661314272935440764600060345196978852466706621089 | 216 |
UVM_INFO @ 509982551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 60900436148500633581703673019595977928894067832704332707228751098356683006451 | 214 |
UVM_INFO @ 73481525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 55003321301634609121120177559512766529846007791962093024811994911386090081131 | 218 |
UVM_INFO @ 463381312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 23758423404283414399531708949976630255887175586442477661953257447312409972241 | 212 |
UVM_INFO @ 358845287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 44020270101625447952225038698115447812441186227346742027512005367352564150941 | 216 |
UVM_INFO @ 457969288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 75819841605504171899293841290317972552080035087944474699005482560542438043816 | 188 |
UVM_INFO @ 505878996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 71719204438034854934210362616007096515668744007668445747956604304028615975051 | 224 |
UVM_INFO @ 93382920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 113846660457228167468002695449158183143064812863580598784986110336710797904177 | 224 |
UVM_INFO @ 3132100998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 15205031341747903980923760286976353437322738207617978860931145242862227409961 | 222 |
UVM_INFO @ 647891606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 38041644673350114762461365685654439982954976560752099087557406565480844312313 | 188 |
UVM_INFO @ 1179286405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 14252111908289413772336575160437367137542250040500434957738044489808718142963 | 194 |
UVM_INFO @ 694300437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 95495039223478151024622669278456861411126547118340650397019639534458954940807 | 134 |
UVM_INFO @ 90368642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 93114378492400965821280206738214337868263752563849113153053696160611983109582 | 162 |
UVM_INFO @ 85019733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 55152222599349894205948454548544563494254939787484563058484022840302172624265 | 170 |
UVM_INFO @ 171587676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 5632484850388326145213766800383693750348454561922459144205398192779030696079 | 216 |
UVM_INFO @ 70048835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. | 5 test runs | |||
| alert_handler_ping_timeout | 31975929487930157252198883777051920437069314761292575547550653959487503148355 | 80 |
UVM_INFO @ 1487703203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 106524030112368886109230775436665691674510634533619825778894999899972942260700 | 80 |
UVM_INFO @ 1364586269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 10380577311820306586163641778866625812486297155838288113059713115235455381 | 80 |
UVM_INFO @ 218226970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 18710682985467401814109238235476812813791382794359398280195690928377701110681 | 80 |
UVM_INFO @ 9119313982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 34433259170449848735962906710518534793755424384344138598612705458141585470878 | 80 |
UVM_INFO @ 287844954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|